JPH0710182B2 - Power supply protection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to, for example, a protection circuit for a power supply device that detects a phase loss in an inverter main circuit of an uninterruptible power supply device.

B. Outline of the Invention The present invention is a device for detecting and protecting a phase loss in an inverter main circuit having a switching element bridge-shaped, and an on-current is supplied to all the switching elements of arms connected in series with each other. By outputting the open phase detection signal when the dead time is longer than the preset time, the open phase is detected before the current flowing through the switching element exceeds the controllable current when the inverter main circuit fails. The main circuit is detected and separated.

C. Conventional technology In the uninterruptible power supply, due to its nature, a commercial power supply feature system or parallel redundant system is built in so that power can be supplied even if the device itself fails, and the failing machine instantly changes from a healthy system. Must dissociate. A thyristor switch has been often used as a method for dissociating the thyristor, but in recent years, a self-extinguishing element has been used in the inverter main circuit, and the thyristor is designed to dissociate the system by its self-extinguishing ability. The switchless type has become popular. However, even in this case, when the cause of the failure is the destruction (short-circuit state) of the self-extinguishing element of the inverter main circuit, it cannot be dissociated. That is, as shown in FIG. 3, six gate turn-off thyristors (hereinafter referred to as “GTO”) 1
_{In the} inverter with bridge configuration of ₁ to ₁₆ , GTO
When 1 ₁ is in the short-circuited state, when viewed from the AC output side of the inverter, the diode D ₂ or D ₃ causes U-V, U-W.
During this period, half of each cycle is short-circuited. In the figure, C ₁ is an electrolytic capacitor, and D ₁ , D _{4 to} D ₆ are diodes.

So how to put Hiyuzu F ₁ to F ₆ in each arm of the inverter main circuit as shown in FIG. 4 is often used to prevent it. This means that if GTO1 ₁ fails and is short-circuited, a direct-current short-circuit occurs when GTO1 ₄ turns on and the charging energy of electrolytic capacitor C ₁ causes fuses F ₁ , F
_This is a method of simultaneously blocking and dissociating ₄ . Since the slope of the rise of the short-circuit current at the time of DC short circuit is steep, there is no concern that only one fuse is cut off.

D. Problems to be solved by the invention However, even with this method, dissociation cannot be performed in the following situations. That is, when GTO1 ₁ of the gate drive circuit is GTO1 ₁ failed ceased to ignite the output transformer connected to the inverter is a DC magnetic deviation. Meanwhile GTO1 ₁
Since it does not ignite, DC short circuit does not occur and the fuse inserted in the arm cannot be cut off, so the iron core is saturated and the exciting current increases significantly, the current flowing through GTO1 ₄ exceeds the controllable current and GTO1 ₄ is destroyed. .

Further, as a method of detecting the phase loss, for example, in the case of a multiple inverter, there is a method of detecting the output current of each inverter by a current transformer and comparing the detected currents. However, in this method, since the output current of the inverter contains many harmonics, there is a drawback that malfunction tends to occur when trying to improve the response of failure detection.
It should be noted that this method cannot be used in the single inverter system as a matter of course.

The present invention has been made under such circumstances,
It is an object of the present invention to provide a protection circuit which has a fast response to failure detection of an inverter main circuit and which is free from the risk of malfunction.

E. Means for solving the problem The present invention relates to a detection unit for detecting the presence or absence of an on-current for igniting a switching element for each switching element, and a switching element of an arm connected in series to each other. An output circuit that outputs an output signal when any of the detection units detects a state in which there is no on-current, and an open-phase detection signal when the output signal of this output circuit exceeds a preset set time. And a timer unit for outputting.

In the inverter main circuit of F. action eg Figure 3, each GTO1 ₁ to 1
_When the drive circuit of ₆ is normal, for example, GTO1 ₁ is extinguished and then GTO1 ₄ is ignited. Here, if the GTO1 ₄ drive circuit has failed, since the on current for igniting GTO1 ₄ does not flow, the output signal from said output circuit is issued. On the other hand, when applied to a voltage source inverter, the storage time at the turn-off of the GTO is taken into consideration and the GTO1 ₁ and GTO
1 ₄ it is necessary to provide a period that does not supply the ON current (Detsudotaimu) to. Therefore, by setting the set time in the timer unit longer than the dead time, the open phase detection signal is issued from the timer unit.

G. Example FIG. 1 is a circuit diagram showing an essential portion of the embodiment of the present invention, shows a circuit for detecting a failure of the gate drive circuit of GTO1 ₁ or 1 ₄ inverter main circuit shown in Figure 3 There is. Although actually have One Kuwawa to the circuit shown in the circuit and the first diagram for detecting a failure of the gate drive circuit of the circuit and GTO1 ₃ or 1 ₆ for detecting a failure of the gate drive circuit of the GTO1 ₂ or 1 _5, which circuit Have the same configuration, the description will be made based on the circuit of FIG.

2A in FIG. 1, 2B indicates a gate drive circuit of each GTO1 _1, 1 _4, the gate drive circuit 2A (2B), the second
As shown in the figure, it is composed of an on-gate power supply E _ON , an on-gate circuit composed of a current limiting resistance R _ON and a transistor Tr, and an off-gate circuit composed of an off-gate power supply E _OFF and a field effect transistor F _OFF . In FIG. 1, 3A is a photocoupler as a detection unit for detecting the presence / absence of the ON current of the gate drive circuit 2A, and the input side has a resistor R ₁ in parallel with the current limiting resistor R _ON of the gate drive circuit 2A. Connected through. Reference numeral 3B is a photocoupler as a detection unit for detecting the presence / absence of an ON current of the gate drive circuit 2B, and is similarly connected to the gate drive circuit 2B via a resistor R ₂ . The collectors of the output transistors of the photocouplers 3A and 3B are connected to the power source V _CC via resistors R ₃ and R ₄ , respectively, and are also connected to the input side of the NAND circuit 5 via the shift trigger circuits 4A and 4B, respectively. The shift trigger circuits 4A and 4B have a role of shaping the rounded square wave, which is the output waveform of the photocouplers 3A and 3B, into a perfect square wave, respectively. The NAND circuit 5 outputs an output signal when any of the photocouplers 3A and 3B detects a state where there is no ON current,
In this example, it forms an output circuit that outputs an "L" level signal, and the output side thereof has a resistor R ₅ and a capacitor C ₂
Is connected to the input bin of the timer integrated circuit 6 via a time constant circuit consisting of The timer integrated circuit 6 outputs an "H" level signal as an open phase detection signal to the output pin when the input pin becomes lower than the set voltage (I / 3 of the power supply voltage), and together with the time constant circuit. It constitutes the timer unit.

Next, the operation of the above embodiment will be described. First, when the ON current is supplied to either one of the gate live circuits 2A and 2B, the output level of the NAND circuit 5 is "H" because the output level of the photocoupler 3A or 3B is "L". Therefore, since the capacitor C ₂ of the time constant circuit remains charged, the output level of the timer integrated circuit 6 is "L" because the voltage level of the input pin of the timer integrated circuit 6 is higher than the set voltage.

When the on-current is not supplied to either of the gate drive circuits 2A and 2B, the output level of the photocouplers 3A and 3B becomes "H", and the output level of the NAND circuit 5 becomes "L". The charge of ₂ is discharged and the voltage level of the input pin of the timer integrated circuit 6 drops. In this case for example, a voltage source inverter, because in view of the storage time at the turn-off of GTO GTO1 _1, 1 ₄ together period to turn off (Detsudotaimu usually 20～30Myuesu) is T provided, the output level of the NAND circuit 5 By setting the time constant so that the time from the transition of "H" to "L" until the voltage level of the input pin drops to the set voltage is longer than the above period T, Drive circuit 2
Only when the ON current stops flowing due to the failure of A and 2B, the voltage level of the input pin becomes equal to or lower than the set voltage, and the timer integrated circuit 6 outputs the open phase detection signal. As a result, all the phases of the inverter main circuit are turned off based on the open phase detection signal, whereby the inverter is disconnected from the system.

H. Effect of the Invention As described above, according to the present invention, the presence or absence of the on-current of the switching elements of the arms (upper and lower arms of the inverter main circuit) connected in series with each other is detected, and the on-current is detected in both cases. Since the open phase is detected when the non-supply period exceeds the set time, the response speed of open phase detection is increased to about 100 μs, and the exciting current increases due to the DC bias of the output transformer. However, all the phases can be turned off before the exciting current exceeds the controllable current of the GTO, and thus the destruction of the GTO can be prevented. Moreover, there is no problem that an erroneous detection is likely to occur unlike the method of comparing the output currents of the inverters, and the invention can be applied not only to the multiple inverters but also to a single inverter.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a gate drive circuit, FIG. 3 is a circuit diagram showing an inverter main circuit, and FIG. 4 is a circuit diagram showing a conventional example. . 1 ₁ to 1 ₆ ... Gate turn-off thyristor, F _{1 to} F ₆ ... fuse, 2A, 2B ... gate drive circuit, 3A, 3B ... photocoupler, 4A, 4B ... short-circuit trigger circuit, 5 ... NAND circuit, 6 …… Timer integrated circuit, Tr …… Transistor, F _OFF …… Field effect transistor.

Claims (1)

[Claims] 1. A protection circuit of a power supply device for detecting and protecting an open phase of an inverter main circuit having a bridge structure of switching elements, the presence or absence of an on-current for igniting the switching elements is detected for each switching element. An output circuit that outputs an output signal when both the detection unit and the detection units related to the switching elements of the arms connected in series to each other detect a state in which there is no on-current, and the output signal of this output circuit is preset. A protection circuit for a power supply device, comprising: a timer section that outputs an open phase detection signal when the signal is issued for more than a preset time.