JPH07101830B2 - Ceramic filter manufacturing method - Google Patents
Ceramic filter manufacturing methodInfo
- Publication number
- JPH07101830B2 JPH07101830B2 JP2131659A JP13165990A JPH07101830B2 JP H07101830 B2 JPH07101830 B2 JP H07101830B2 JP 2131659 A JP2131659 A JP 2131659A JP 13165990 A JP13165990 A JP 13165990A JP H07101830 B2 JPH07101830 B2 JP H07101830B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- rod
- piezoelectric ceramic
- laminated
- filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000919 ceramic Substances 0.000 title claims description 63
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000000758 substrate Substances 0.000 claims description 79
- 239000010408 film Substances 0.000 claims description 63
- 230000001681 protective effect Effects 0.000 claims description 22
- 239000010409 thin film Substances 0.000 claims description 20
- 238000005516 engineering process Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 description 27
- 239000002184 metal Substances 0.000 description 20
- 229910052751 metal Inorganic materials 0.000 description 20
- 238000007747 plating Methods 0.000 description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 8
- 238000005520 cutting process Methods 0.000 description 8
- 239000011347 resin Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 7
- 238000007639 printing Methods 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000010030 laminating Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical group [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000007733 ion plating Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229910001120 nichrome Inorganic materials 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910003336 CuNi Inorganic materials 0.000 description 1
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、通信機器等に用いられる小型のセラミックフ
ィルタの製造方法に関する。Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a small ceramic filter used for communication equipment or the like.
(発明の概要) 本発明は、圧電セラミック基板を用いたセラミックフィ
ルタの製造方法であって、棒状部が一体に形成された穴
あき圧電セラミック基板の前記棒状部の複数箇所に所定
のフィルタ電極膜パターンを形成し、前記穴あき圧電セ
ラミック基板と同様形状の穴あき保護基板を前記穴あき
圧電セラミック基板に接着一体化して積層基板を構成
し、該積層基板における積層棒状部の両端部に薄膜技術
により端部電極膜を形成した後に個々のセラミックフィ
ルタに切断分離することにより、工程の短縮、ひいては
生産性の改善を図り得る。また、得られたセラミックフ
ィルタは、フィルタ電極膜パターンを形成した圧電セラ
ミック基板と保護板とを接着一体化してなる積層構造体
の両端部に前記フィルタ電極膜パターンに接続する端部
電極膜を形成した構造となり、小型化を図り、また製品
寸法精度と製品強度とを向上させることができる。(Summary of the Invention) The present invention is a method for manufacturing a ceramic filter using a piezoelectric ceramic substrate, wherein a predetermined filter electrode film is provided at a plurality of positions of the rod-shaped piezoelectric ceramic substrate integrally formed with the rod-shaped part. A pattern is formed, and a perforated protective substrate having the same shape as the perforated piezoelectric ceramic substrate is bonded and integrated to the perforated piezoelectric ceramic substrate to form a laminated substrate, and thin film technology is applied to both ends of the laminated rod-shaped portion of the laminated substrate. By forming the end electrode film by cutting and separating into individual ceramic filters, the process can be shortened and the productivity can be improved. Further, in the obtained ceramic filter, end electrode films connected to the filter electrode film pattern are formed at both ends of a laminated structure formed by integrally bonding a piezoelectric ceramic substrate having a filter electrode film pattern formed thereon and a protective plate. With this structure, the size can be reduced, and the product dimensional accuracy and the product strength can be improved.
(従来の技術) 従来のセラミックフィルタの構造の一例を第10図及び第
11図に示す。これらの図において、50は所定のフィルタ
電極膜パターンを形成した圧電セラミック基板、51A,51
Bはカバーであり、該カバーは少なくとも前記圧電セラ
ミック基板50の動作時に振動する部分である振動領域の
両面に対応した対向面に空洞部53A,53Bを設けるように
絶縁樹脂で形成される。52A,52Bは前記カバー51を設け
た圧電セラミック基板50の両面を覆う樹脂製封止コート
を示す。前記カバー51A,51Bは、圧電セラミック基板50
両面の振動領域及び特定の電極位置を除いた部分面のそ
れぞれに絶縁樹脂を印刷塗布し硬化させた第1層と、該
第1層の上面に振動領域に対向する空洞部53A,53Bを形
成するように絶縁樹脂を印刷塗布し硬化させた第2層と
の2層構造となっている。前記樹脂封止コート52A,52B
も絶縁樹脂を印刷塗布し硬化させることによって設けら
れる。(Prior Art) FIG. 10 and FIG.
Shown in Figure 11. In these figures, 50 is a piezoelectric ceramic substrate on which a predetermined filter electrode film pattern is formed, 51A, 51
B is a cover, and the cover is formed of an insulating resin so that at least the cavity portions 53A and 53B are provided on the opposing surfaces corresponding to both surfaces of the vibrating region that is a portion that vibrates when the piezoelectric ceramic substrate 50 operates. 52A and 52B are resin sealing coats that cover both surfaces of the piezoelectric ceramic substrate 50 provided with the cover 51. The covers 51A and 51B are piezoelectric ceramic substrates 50.
A first layer is formed by printing and curing an insulating resin on each of the vibration areas on both surfaces and the partial surface excluding a specific electrode position, and cavities 53A and 53B facing the vibration area are formed on the upper surface of the first layer. As described above, a two-layer structure is formed with a second layer in which an insulating resin is applied by printing and cured. The resin sealing coat 52A, 52B
Is also provided by applying an insulating resin by printing and curing.
次に、圧電セラミック板50、カバー51A,51B、封止コー
ト52A,52Bからなる本体部の強度補強のため、アース電
極54を有するガラスエポキシ板56を前記本体部の下面に
接着剤57で固着し積層構造体58とする。そして、第11図
に示すように端部電極材としての金属キャップ59A,59B
を積層構造体58の両側端に装着する。この金属キャップ
59A,59Bは、弾性により積層構造体58の両側端をはさむ
ように装着され、圧電セラミック板50に形成されたフィ
ルタ電極膜パターン上面の電極55A,55Bにそれぞれはん
だ付けにより固着され、電気的に接続されて端部電極を
形成している。同時にガラスエポキシ基板56のアース電
極54とフィルタ電極膜パターン下面の電極55Cもはんだ
付けにより接続される。Next, in order to reinforce the strength of the main body portion including the piezoelectric ceramic plate 50, the covers 51A and 51B, and the sealing coats 52A and 52B, a glass epoxy plate 56 having a ground electrode 54 is fixed to the lower surface of the main body portion with an adhesive 57. Then, the laminated structure 58 is obtained. Then, as shown in FIG. 11, the metal caps 59A and 59B as the end electrode material are used.
Are attached to both ends of the laminated structure 58. This metal cap
59A and 59B are mounted by elastically sandwiching both side ends of the laminated structure 58, and are fixed to the electrodes 55A and 55B on the upper surface of the filter electrode film pattern formed on the piezoelectric ceramic plate 50 by soldering, respectively, and electrically. Connected to form an end electrode. At the same time, the ground electrode 54 of the glass epoxy substrate 56 and the electrode 55C on the lower surface of the filter electrode film pattern are also connected by soldering.
(発明が解決しようとする課題) ところで、前述の従来のセラミックフィルタは、空洞部
を設けるためのカバー51A,51Bと封止コート52A,52Bを施
す上で、絶縁樹脂を印刷塗布し硬化させて積層する層数
が多いため、製造工程が多くなる。また、端部電極材に
金属キャップ59A,59Bを用いているため、金属キャップ
の形成と装着の手間がかかりコスト高になり、製造の合
理化に適さないものであった。また、セラミックフィル
タが小型になるのに伴い、金属キャップの製造及び装着
工程などにおいてさらに取り扱いが面倒になり、生産性
や製品寸法精度の点で改善しなければならなかった。(Problems to be solved by the invention) By the way, the above-mentioned conventional ceramic filter, by applying the cover 51A, 51B for providing the cavity and the sealing coat 52A, 52B, by applying an insulating resin by printing and curing it. Since the number of layers to be laminated is large, the number of manufacturing steps is large. Further, since the metal caps 59A and 59B are used for the end electrode material, it takes time and effort to form and mount the metal caps, resulting in high cost, which is not suitable for rationalization of manufacturing. In addition, as the ceramic filter becomes smaller, the handling becomes more troublesome in the process of manufacturing and mounting the metal cap, and the productivity and the dimensional accuracy of the product must be improved.
本発明は、上記の点に鑑み、小型化及び製品寸法精度及
び製品強度の向上が可能で、製法上は製造工程の簡略化
及び合理化や量産性の改善が可能なセラミックフィルタ
の製造方法を提供することを目的とする。In view of the above points, the present invention provides a method of manufacturing a ceramic filter that can be downsized and can improve product dimensional accuracy and product strength, and that can simplify manufacturing processes, streamline manufacturing processes, and improve mass productivity. The purpose is to do.
(課題を解決するための手段) 上記目的を達成するために、本発明のセラミックフィル
タの製造方法は、棒状部が一体に形成された穴あき圧電
セラミック基板の前記棒状部の複数箇所に所定のフィル
タ電極膜パターンを形成する工程と、棒状部が一体に形
成されかつ少なくとも前記圧電セラミック基板の振動領
域に対応した対向面に空洞部を形成した穴あき保護基板
を前記穴あき圧電セラミック基板に接着一体化して積層
基板を構成する工程と、前記圧電セラミック基板の棒状
部と前記保護基板の棒状部とが積層された積層棒状部の
両端部に薄膜技術により端部電極膜を形成する工程と、
前記積層基板を1つのフィルタ電極膜パターンを有する
如く複数個に切断分離する工程とを備えている。(Means for Solving the Problems) In order to achieve the above object, a method for manufacturing a ceramic filter of the present invention is a method in which a rod-shaped portion is integrally formed with a predetermined number of portions of the rod-shaped piezoelectric ceramic substrate. The step of forming the filter electrode film pattern and the perforated protective substrate in which the rod-shaped portion is integrally formed and the cavity portion is formed on the facing surface corresponding to at least the vibration area of the piezoelectric ceramic substrate are bonded to the perforated piezoelectric ceramic substrate. A step of integrally forming a laminated substrate, a step of forming end electrode films by thin film technology at both ends of a laminated rod-shaped portion in which the rod-shaped portion of the piezoelectric ceramic substrate and the rod-shaped portion of the protective substrate are laminated,
And a step of cutting and separating the laminated substrate into a plurality of pieces so as to have one filter electrode film pattern.
(作用) 本発明のセラミックフィルタの製造方法においては、棒
状部を一体に形成した穴あき圧電セラミック基板を使用
し、製造時においては1枚の板として処理することによ
り(基板処理工法)、積層工程や端部電極形成工程等の
各工程において、多数個のセラミックフィルタの同時処
理がバレット等を使用することなく可能になり、工程の
ライン化(工程間搬送の統一化)や量産が容易になり、
製造原価の低減及び製造所要時間の短縮を図ることがで
きる。(Operation) In the method of manufacturing a ceramic filter of the present invention, a piezoelectric ceramic substrate having a hole is integrally formed with a rod-shaped portion, and is treated as one plate at the time of manufacturing (substrate processing method) to achieve lamination. In each process such as process and end electrode forming process, simultaneous processing of multiple ceramic filters is possible without using a buret, etc., making the process line (unification of transport between processes) and mass production easy. Becomes
It is possible to reduce the manufacturing cost and the manufacturing time.
端部電極材に金属キャップを使用せず、穴あき圧電セラ
ミック基板と同様形状の穴あき保護基板とを重ねた積層
基板の積層棒状部に、スパッタ、イオンプレーティン
グ、P−CVD等の薄膜技術による金属薄膜の端部電極膜
を被着形成するので、端部電極膜の厚みの管理を高精度
で行うことが容易で、端部電極形成工程の簡略化と同時
成膜による量産化が可能になり、材料費と製造工程の削
減とともに、製品寸法精度と搭載率の向上を図ることが
でき、さらに小型化や薄形化にも十分対応できる。Thin film technology such as sputtering, ion plating, P-CVD, etc. is applied to the laminated rod part of a laminated substrate in which a metal cap is not used for the end electrode material and a perforated protective substrate of the same shape as the perforated piezoelectric ceramic substrate is overlaid. Since the end electrode film of the metal thin film is formed by deposition, it is possible to easily control the thickness of the end electrode film with high accuracy, simplify the end electrode formation process and enable mass production by simultaneous film formation. Therefore, the material cost and the manufacturing process can be reduced, and the product dimensional accuracy and the mounting rate can be improved, and the size and the thickness can be sufficiently reduced.
また、圧電セラミック基板の両面を空洞部を有するアル
ミナ等の保護基板で挟み込み固着する積層構造とした場
合には、セラミックフィルタの抗折強度の向上を図り得
るとともに空洞部を確実に確保できる。Further, when the piezoelectric ceramic substrate has a laminated structure in which both surfaces are sandwiched and fixed by protective substrates such as alumina having a hollow portion, the bending strength of the ceramic filter can be improved and the hollow portion can be surely secured.
(実施例) 以下、本発明に係るセラミックフィルタの製造方法の実
施例を図面に従って説明する。(Example) Hereinafter, an example of a method for manufacturing a ceramic filter according to the present invention will be described with reference to the drawings.
第1図はセラミックフィルタの製造工程を説明する工程
図である。まず、未焼成の圧電セラミックス・シート基
板に第2図に示す如く複数のスリット穴11を所定間隔で
平行にパンチングもしくはレーザー加工で空け、平行な
スリット穴間に多数の棒状部12を形成する。それから、
前記圧電セラミック・シート基板を焼結した後、所要の
分極処理を施して分極済みの穴あき圧電セラミック基板
(PZT)1を作成する。FIG. 1 is a process drawing for explaining a manufacturing process of a ceramic filter. First, as shown in FIG. 2, a plurality of slit holes 11 are punched or laser-processed in parallel at predetermined intervals in an unfired piezoelectric ceramics sheet substrate to form a large number of rod-shaped portions 12 between the parallel slit holes. then,
After sintering the piezoelectric ceramic sheet substrate, a required polarization treatment is performed to form a polarized piezoelectric ceramic substrate (PZT) 1 with holes.
前記分極済みの穴あき圧電セラミック基板1には、電極
形成工程2において、各棒状部12両面の複数箇所に所定
のフィルタ電極膜パターンをそれぞれ設ける。フィルタ
電極膜パターンは、表裏の両面構成であり、第3図に示
すように各棒状部12の表側には所定の表側フィルタ電極
膜パターン14を、裏側には表側に対応した所定の裏側フ
ィルタ電極膜パターン15をスパッタ等の薄膜技術でそれ
ぞれ被着形成する。表側フィルタ電極パターン14におけ
る電極膜14A及び14Bは棒状部12の側面にもそれぞれ連続
して形成する。なお、棒状部12の1箇所のフィルタ電極
膜パターンに対応した振動領域(フィルタ作用を行う
所)は点線Pで囲まれた領域である。In the electrode forming step 2, the polarized piezoelectric ceramic substrate 1 with holes is provided with predetermined filter electrode film patterns at a plurality of positions on both surfaces of each rod-shaped portion 12. The filter electrode film pattern has a double-sided structure, and as shown in FIG. 3, a predetermined front side filter electrode film pattern 14 is provided on the front side of each rod 12 and a predetermined back side filter electrode corresponding to the front side is provided on the back side. The film patterns 15 are formed by thin film techniques such as sputtering. The electrode films 14A and 14B in the front side filter electrode pattern 14 are also continuously formed on the side surfaces of the rod-shaped portion 12, respectively. It should be noted that the vibrating region (where the filter action is performed) corresponding to one filter electrode film pattern of the rod-shaped portion 12 is a region surrounded by a dotted line P.
一方、第4図のように、少なくとも穴あき圧電セラミッ
ク基板1の各フィルタ電極膜パターン毎に設けられた振
動領域(第3図点線P)に対応した対向面に空洞部23,3
3を有する穴あきアルミナ保護基板20,30を用意する。こ
れらの穴あきアルミナ保護基板20,30は穴あき圧電セラ
ミック基板1と同様の平面形状である。On the other hand, as shown in FIG. 4, at least cavities 23, 3 are formed on the opposing surfaces corresponding to the vibration regions (dotted line P in FIG. 3) provided for each filter electrode film pattern of the perforated piezoelectric ceramic substrate 1.
Prepare perforated alumina protective substrates 20 and 30 having 3. These perforated alumina protective substrates 20 and 30 have the same planar shape as the perforated piezoelectric ceramic substrate 1.
表側の保護基板20は、未焼成のアルミナ・シート基板
に、第4図に示す如く、複数の空洞部23を所定間隔で並
列に加圧成型等でそれぞれ形成し、空洞部23の両側にス
リット穴21を所定間隔で平行にパンチングもしくはレー
ザー加工であけ、前記空洞部23を多数個有する棒状部22
を有するように焼結したものである。As shown in FIG. 4, the protective substrate 20 on the front side is formed by forming a plurality of cavities 23 in parallel at predetermined intervals by pressure molding or the like on an unsintered alumina sheet substrate, and slits on both sides of the cavity 23. Holes 21 are punched in parallel at a predetermined interval by laser processing or laser processing, and rod-like portions 22 having a large number of hollow portions 23 are formed.
And is sintered to have.
同様に、裏側の保護基板30は、未焼成のアルミナ・シー
ト基板に、第4図に示す如く、複数の空洞部33及び電極
穴35を所定間隔で並列に加圧成型等でそれぞれ形成し、
前記空洞部33及び電極穴35の両側にスリット穴31を所定
間隔で平行にパンチングもしくはレーザー加工で空け、
空洞部33及び電極穴35を多数個有する棒状部32を有する
ように焼結したものである。Similarly, the back side protective substrate 30 is formed by forming a plurality of cavities 33 and electrode holes 35 in parallel at predetermined intervals by pressure molding or the like on an unsintered alumina sheet substrate, as shown in FIG.
Slit holes 31 are formed on both sides of the cavity 33 and the electrode hole 35 in parallel at a predetermined interval by punching or laser processing,
It is sintered so as to have a rod-shaped portion 32 having a large number of hollow portions 33 and electrode holes 35.
なお、空洞部23,33は、セラミックフィルタ動作時に、
前記穴あき圧電セラミック基板1の振動領域の振動を円
滑に作動させ、保護するために設けられる。The cavities 23 and 33 are
It is provided in order to smoothly operate and protect the vibration in the vibration region of the perforated piezoelectric ceramic substrate 1.
積層工程3においては、前記穴あき圧電セラミック基板
1の両面に、空洞部23,33を有する穴あきアルミナ保護
基板20,30を接着一体化し、穴あき積層基板40を作成す
る。すなわち、第4図に示すように、フィルタ電極膜パ
ターン形成済みの穴あき圧電セラミック基板1の表側に
接着剤43を所定の接着部分に印刷し、その上に圧電セラ
ミック基板1の振動領域に対応した空洞部23を有する表
側保護基板20を圧着する。そして、裏側も同様に接着剤
43を印刷し、振動領域に対応する空洞部33と裏側電極膜
パターン15に対応する電極穴35を有する裏側保護基板30
を圧着し、第5図の如くスリット穴41と積層棒状部42を
有する積層基板40を作成する。In the laminating step 3, perforated alumina protective substrates 20 and 30 having cavities 23 and 33 are bonded and integrated on both surfaces of the perforated piezoelectric ceramic substrate 1 to form a perforated laminated substrate 40. That is, as shown in FIG. 4, an adhesive 43 is printed on a predetermined bonding portion on the front side of the perforated piezoelectric ceramic substrate 1 on which the filter electrode film pattern has been formed, and the vibration region of the piezoelectric ceramic substrate 1 is formed thereon. The front side protective substrate 20 having the hollow portion 23 is pressure-bonded. And the back side is also adhesive
43 is printed, and the back side protective substrate 30 has a cavity 33 corresponding to the vibration region and an electrode hole 35 corresponding to the back side electrode film pattern 15.
Is pressure-bonded to form a laminated substrate 40 having a slit hole 41 and a laminated rod-like portion 42 as shown in FIG.
それから、端部電極形成工程4において、第6図の如
く、端部電極膜の下層部分を構成する金属薄膜16A,16B
の成膜をスパッタにより前記積層基板40の状態で行な
い、すなわち各積層棒状部42の両端部を略コ字状に囲む
如く金属薄膜16A,16Bを形成し、また前記電極穴35を貫
通して裏側電極膜パターン15に接続する如く金属薄膜16
Cを形成する。Then, in the end electrode forming step 4, as shown in FIG. 6, the metal thin films 16A and 16B constituting the lower layer portion of the end electrode film are formed.
Is formed in the state of the laminated substrate 40 by sputtering, that is, the metal thin films 16A and 16B are formed so as to surround both end portions of each laminated rod-shaped portion 42 in a substantially U shape, and also penetrate the electrode hole 35. The metal thin film 16 is connected to the back side electrode film pattern 15.
Form C.
金属薄膜16A,16Bはそれぞれ第3図に図示した前記表側
フィルタ電極膜パターン14における電極膜14A,14Bの端
部に電気的に接続するもので、金属薄膜16Cは前記裏側
フィルタ電極膜パターンの電極穴35部分と電気的に接続
するものであり、それぞれ2層構造であり、例えば下層
がセラミックに付着性の良いNiCr,TiまたはCrのスパッ
タ膜、上層が抵抗抗のCuスパッタ膜である。なお、薄膜
形成時、積層基板40両面及び積層棒状部42側面の不要部
分を予めマスキング処理しておく。The metal thin films 16A and 16B are electrically connected to the end portions of the electrode films 14A and 14B in the front filter electrode film pattern 14 shown in FIG. 3, and the metal thin film 16C is an electrode of the back filter electrode film pattern. They are electrically connected to the holes 35 and each have a two-layer structure. For example, the lower layer is a NiCr, Ti or Cr sputtered film having good adhesion to ceramics, and the upper layer is a resistive Cu sputtered film. When forming the thin film, the unnecessary portions on both sides of the laminated substrate 40 and the side surfaces of the laminated rod-shaped portion 42 are masked in advance.
さらに、端部電極めっき工程5において、積層基板40の
ままで各積層棒状部42の基板薄膜16A,16B,16C上にめっ
きを施し、第7図に示すように、基板めっき膜17A,17B,
17Cを基板薄膜16A,16B,16C上に被着形成して第7図の如
く端部電極膜18A,18B及び端子電極膜18Cを構成する。こ
こで、金属めっき膜17A,17B,17Cは2層構造であり、金
属薄膜16A,16B,16C上に直接被着形成される下層が耐は
んだ性(はんだの拡散防止及びはんだ耐熱性)のNiめっ
き膜、上層がはんだ付着性の良いPb−SnまたはSnめっき
膜である。なお、めっきは電解(湿式)めっきであって
も無電解めっきであっても良い。Further, in the end electrode plating step 5, plating is performed on the substrate thin films 16A, 16B and 16C of each laminated rod-shaped portion 42 with the laminated substrate 40 as it is, and as shown in FIG. 7, substrate plated films 17A, 17B,
17C is deposited on the substrate thin films 16A, 16B and 16C to form the end electrode films 18A and 18B and the terminal electrode film 18C as shown in FIG. Here, the metal plating films 17A, 17B, 17C have a two-layer structure, and the lower layer directly deposited on the metal thin films 16A, 16B, 16C has a solder resistance (solder diffusion prevention and solder heat resistance) Ni. The plating film and the upper layer are Pb-Sn or Sn plating films with good solder adhesion. The plating may be electrolytic (wet) plating or electroless plating.
その後、切断工程6において、1個のフィルタ電極膜パ
ターンを有するように第7図に一点鎖線Xで示した切断
代(第3図及び第6図にも同様に図示した)に沿って前
記積層棒状部42をダイシングソー等により切断又はスリ
ット溝による分割にて、第8図及び第9図の如く内部に
1個のフィルタ電極膜パターンを持ち、かつこれに接続
する端部電極膜18A,18Bと端子電極膜18Cを有する1個の
セラミックフィルタが得られる。Then, in a cutting step 6, the lamination is performed along a cutting margin (also shown in FIGS. 3 and 6) indicated by a chain line X in FIG. 7 so as to have one filter electrode film pattern. The rod-shaped portion 42 is cut with a dicing saw or divided by slit grooves to have one filter electrode film pattern inside as shown in FIGS. 8 and 9, and end electrode films 18A and 18B connected to this. Thus, one ceramic filter having the terminal electrode film 18C is obtained.
個々のセラミックフィルタは、第8図の分解斜視図から
わかるように、表側フィルタ電極膜パターン14及び裏側
電極膜パターン15を形成した圧電セラミック基板45と、
少なくとも前記圧電セラミック基板の振動領域に対応す
る対向面に空洞部23を形成したアルミナ製上側保護板46
と、同様に空洞部33を形成したアルミナ製下側保護板47
とを接着剤43にて接着一体化してなる積層構造体48の両
端部に前記フィルタ電極膜パターンに接続する端部電極
膜18A,18Bを有し、さらに裏側フィルタ電極膜パターン1
5に接続する端子電極膜18Cを有している。As shown in the exploded perspective view of FIG. 8, each ceramic filter includes a piezoelectric ceramic substrate 45 on which a front filter electrode film pattern 14 and a back electrode film pattern 15 are formed,
An upper protective plate 46 made of alumina having a cavity 23 formed on at least the opposing surface corresponding to the vibration area of the piezoelectric ceramic substrate.
And a lower protective plate 47 made of alumina in which the cavity 33 is formed in the same manner.
And the back end filter electrode film pattern 1 having end electrode films 18A and 18B connected to the filter electrode film pattern at both ends of a laminated structure 48 formed by adhering and integrating
It has a terminal electrode film 18C connected to 5.
個々のセラミックフィルタに切断した後、必要に応じて
洗浄及び乾燥を行なって製品とする。After cutting into individual ceramic filters, washing and drying are performed as necessary to obtain products.
なお、上記実施例では電極形成工程2において、表側及
び裏側フィルタ電極膜パターン14,15をスパッタ等の薄
膜技術で形成したが、導体ペーストの印刷焼き付け等に
よる厚膜技術で形成しても良い。Although the front and back filter electrode film patterns 14 and 15 are formed by a thin film technique such as sputtering in the electrode forming step 2 in the above embodiment, they may be formed by a thick film technique such as printing by printing a conductor paste.
また、端部電極成膜工程4において、金属薄膜16A,16B,
16Cを2層のスパッタ膜で形成したが、最下層をNiCrの
スパッタ膜、中間層をCuNiのスパッタ膜、上層をCuのス
パッタ膜とした3層構造としてもよい。また、Cuのスパ
ッタ膜1層のみの構造としてもよい。In the end electrode film forming step 4, the metal thin films 16A, 16B,
Although 16C is formed by a two-layer sputtered film, a three-layer structure may be used in which the lowermost layer is a NiCr sputtered film, the intermediate layer is a CuNi sputtered film, and the upper layer is a Cu sputtered film. Further, the structure may be made of only one Cu sputtered film.
また、スパッタの代わりにイオンプレーティング、P−
CVD等で金属薄膜を形成しても良い。Also, instead of sputtering, ion plating, P-
The metal thin film may be formed by CVD or the like.
(発明の効果) 以上説明したように、本発明のセラミックフィルタの製
造方法は、棒状部を一体に形成した穴あき圧電セラミッ
ク基板及び同様形状の穴あき保護基板を使用することに
より(基板処理工法)、製造時においては1枚の板とし
て処理が可能であり、多数個のセラミックフィルタの同
時処理がパレット等を使用することなく可能である。従
って、工程のライン化(工程間搬送の統一化)や量産が
容易になり、製造原価の低域及び製造所要時間の短縮を
図ることができる。(Effect of the Invention) As described above, the method for manufacturing a ceramic filter of the present invention uses the perforated piezoelectric ceramic substrate integrally formed with the rod-shaped portion and the perforated protective substrate having the same shape (the substrate processing method). ), It can be processed as one plate at the time of manufacturing, and a large number of ceramic filters can be processed at the same time without using a pallet or the like. Therefore, it becomes easy to make the process lines (unification of conveyance between processes) and mass production, and it is possible to reduce the manufacturing cost range and the manufacturing time.
また、端部電極材に金属キャップを使用せず、面倒な金
属キャップの装着作業を省略でき、作業性も改善でき
る。さらに、圧電セラミック基板に保護基板を重ねた積
層基板の積層棒状部に、薄膜技術による端部電極膜を施
し、その積層基板を切断しチップ化しているので、材料
費と製造工程の削減とともに、製品寸法のばらつきを小
さくでき、さらに小型化や薄形化にも十分対応できる。Further, since a metal cap is not used for the end electrode material, the troublesome work of mounting the metal cap can be omitted, and the workability can be improved. Furthermore, since the end electrode film by thin film technology is applied to the laminated rod-shaped portion of the laminated substrate in which the protective substrate is overlaid on the piezoelectric ceramic substrate, and the laminated substrate is cut into chips, the material cost and the manufacturing process are reduced, Variations in product dimensions can be reduced, and further miniaturization and thinning can be supported.
第1図は本発明の実施例の製造工程を示す工程図、第2
図は分極済み圧電セラミック基板を示す斜視図、第3図
は電極形成工程を示す部分斜視図、第4図は積層工程を
示す部分分解斜視図、第5図は同工程における積層基板
を示す斜視図、第6図は端部電極形成工程を示す部分斜
視図、第7図は端部電極めっき工程を示す部分斜視図、
第8図は切断後のセラミックフィルタの構成を示す分解
斜視図、第9図は切断工程後のセラミックフィルタの完
成品を示す斜視図、第10図は従来のセラミックフィルタ
の一例の構成を示す分解斜視図、第11図は同正面図であ
る。 1…分極済み圧電セラミック基板、2…電極形成工程、
3…積層工程、4…端部電極形成工程、5…端部電極め
っき工程、6…切断工程、11,21,31,41…スリット穴、1
2,22,32…棒状部、14…表側フィルタ電極膜パターン、1
5…裏側フィルタ電極膜パターン、16A,16B,16C…金属薄
膜、17A,17B,17C…金属めっき膜、18A,18B…端部電極
膜、18C…端子電極膜、20…表側保護基板、30…裏側保
護基板、23,33…空洞部、35…電極穴、40…積層基板、4
2…積層棒状部、43…接着剤、45…圧電セラミック基
板、46,47…保護板。FIG. 1 is a process diagram showing a manufacturing process of an embodiment of the present invention, and FIG.
FIG. 4 is a perspective view showing a polarized piezoelectric ceramic substrate, FIG. 3 is a partial perspective view showing an electrode forming process, FIG. 4 is a partially exploded perspective view showing a laminating process, and FIG. 5 is a perspective view showing a laminated substrate in the same process. FIG. 6 is a partial perspective view showing an end electrode forming step, FIG. 7 is a partial perspective view showing an end electrode plating step,
8 is an exploded perspective view showing the structure of the ceramic filter after cutting, FIG. 9 is a perspective view showing the finished ceramic filter after the cutting process, and FIG. 10 is an exploded view showing the structure of an example of a conventional ceramic filter. A perspective view and FIG. 11 are front views of the same. 1 ... Polarized piezoelectric ceramic substrate, 2 ... Electrode forming step,
3 ... Laminating process, 4 ... End electrode forming process, 5 ... End electrode plating process, 6 ... Cutting process, 11, 21, 31, 41 ... Slit hole, 1
2,22,32 ... Rod-shaped part, 14 ... Front side filter electrode film pattern, 1
5 ... Back side filter electrode film pattern, 16A, 16B, 16C ... Metal thin film, 17A, 17B, 17C ... Metal plating film, 18A, 18B ... End electrode film, 18C ... Terminal electrode film, 20 ... Front side protective substrate, 30 ... Back side protective substrate, 23, 33 ... Hollow part, 35 ... Electrode hole, 40 ... Laminated substrate, 4
2 ... Laminated bar, 43 ... Adhesive, 45 ... Piezoelectric ceramic substrate, 46, 47 ... Protective plate.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 実開 平2−5929(JP,U) 実開 平1−74623(JP,U) 実開 昭58−76223(JP,U) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) Bibliography flat 2-5929 (JP, U) flat 1-74623 (JP, U) flat 58-76223 (JP, U)
Claims (1)
ミック基板の前記棒状部の複数箇所に所定のフィルタ電
極膜パターンを形成し、棒状部が一体に形成されかつ少
なくとも前記圧電セラミック基板の振動領域に対応する
対向面に空洞部を形成した穴あき保護基板を前記穴あき
圧電セラミック基板に接着一体化して積層基板を構成
し、前記圧電セラミック基板の棒状部と前記保護基板の
棒状部とが積層された積層棒状部の両端部に薄膜技術に
より端部電極膜を形成した後、前記積層基板を1つのフ
ィルタ電極膜パターンを有する如く複数個に切断分離す
ることを特徴とするセラミックフィルタの製造方法。1. A predetermined filter electrode film pattern is formed at a plurality of positions of the rod-shaped piezoelectric ceramic substrate integrally formed with the rod-shaped portion, and the rod-shaped portion is integrally formed and at least the piezoelectric ceramic substrate is formed. A perforated protective substrate having a cavity formed on the opposing surface corresponding to the vibration region is bonded and integrated with the perforated piezoelectric ceramic substrate to form a laminated substrate, and the rod-shaped portion of the piezoelectric ceramic substrate and the rod-shaped portion of the protective substrate are formed. Of the ceramic filter, wherein end electrode films are formed on both ends of the laminated rod-shaped part in which is laminated by thin film technology, and then the laminated substrate is cut and separated into a plurality of pieces so as to have one filter electrode film pattern. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2131659A JPH07101830B2 (en) | 1990-05-22 | 1990-05-22 | Ceramic filter manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2131659A JPH07101830B2 (en) | 1990-05-22 | 1990-05-22 | Ceramic filter manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0426213A JPH0426213A (en) | 1992-01-29 |
| JPH07101830B2 true JPH07101830B2 (en) | 1995-11-01 |
Family
ID=15063226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2131659A Expired - Fee Related JPH07101830B2 (en) | 1990-05-22 | 1990-05-22 | Ceramic filter manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07101830B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3012412B2 (en) * | 1992-10-07 | 2000-02-21 | ローム株式会社 | Package base substrate for piezoelectric oscillator |
| JP3014882B2 (en) * | 1992-12-18 | 2000-02-28 | ローム株式会社 | Package base substrate for built-in capacitor type piezoelectric oscillator |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5876223U (en) * | 1981-11-16 | 1983-05-23 | 日本特殊陶業株式会社 | piezoelectric filter |
| JPH0174623U (en) * | 1987-11-09 | 1989-05-19 | ||
| JPH0749860Y2 (en) * | 1988-06-24 | 1995-11-13 | 株式会社村田製作所 | Chip type piezoelectric resonator |
-
1990
- 1990-05-22 JP JP2131659A patent/JPH07101830B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0426213A (en) | 1992-01-29 |
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