JPH07105494B2 - Method for manufacturing semiconductor device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a field effect integrated circuit transistor having a low resistance gate electrode composed of a low resistance conductor. The present invention relates to a manufacturing method in which electrical characteristics are improved and dielectric breakdown of a gate insulating film is prevented.

2. Description of the Related Art In field-effect semiconductor integrated circuits, as the miniaturization of constituent elements progresses and the electric field strength inside the transistor increases, high-energy electrons accelerated in the electric field, that is, hot electrons are generated and reliability is improved. In order to prevent the decrease, it is common practice to use the LDD method or the DDD method to reduce the concentration of the electric field by providing a low-concentration impurity diffusion region in the source and drain regions facing each other. Has become.

On the other hand, in order to obtain a high-speed transistor, it is common practice to reduce the resistance of the gate electrode by forming a low-resistance conductor film on the gate electrode composed of a polycrystalline conductor film and subjecting it to heat treatment. It has become to. For example, when a refractory metal or its alloy with silicon, that is, silicide, is deposited as a low-resistance conductor on polycrystalline silicon to be a gate electrode and subjected to heat treatment at about 700 ° C., the refractory metal or silicide is easily polycrystallized. Reacting with silicon, the whole is silicidized to reduce the resistance. The sheet resistance of the conductor film thus formed is as low as about 1 to 10 Ω / □, and high speed operation of the semiconductor integrated circuit can be expected. On the other hand, other than polycrystalline silicon, it also reacts with a silicon oxide film, and particularly titanium or the like reacts with a silicon oxide film used as a gate insulating film, so that it has a very low resistance, but it is difficult to use as a gate electrode material. Therefore, tungsten or molybdenum, which is difficult to react with the silicon oxide film, is generally used. The reactivity of the refractory metal or silicide with the silicon oxide film and the energy of formation of the reaction product are determined by NG Einsprach; VLSI Electronics: Microstructure, Academic Press Publication, Volume 9, Chapter 2 (NGEINSPR
ACH; VLSI ELECTRONICS: MICROSTRUCTURE, Vol.9, Ch.2). Further, the easiness of reaction can be judged by the magnitude of the activation energy of the reaction, and it is known that the smaller the activation energy, the easier the reaction.

Problems to be Solved by the Invention Even when the LDD method or the like is used to alleviate the concentration of the electric field, there is no gate electrode on the low-concentration impurity diffusion region. The electrons accumulated between the film and the film cannot be emitted, and the reduction in reliability due to the injection of hot electrons due to the concentration of the electric field cannot be avoided. Therefore, there has been proposed a method for improving reliability by forming a gate electrode also on the low-concentration impurity diffusion region as shown in FIG. 2 (34th Spring Applied Physics Society, Lecture No. 28p-D). -5, 1987). However, in order to obtain this structure, it is necessary to place an insulator such as a silicon oxide film near the center of the gate electrode, and the electrical resistance increases because the cross-sectional area of the gate electrode is substantially reduced.
It adversely affected the operating speed of the transistor. The only way to avoid the reduction of the cross-sectional area is to increase the height of the gate electrode, but this increases the unevenness of the substrate surface, making it difficult to form multilayer wiring.

On the other hand, when a low resistance conductor film is formed on the gate electrode composed of the non-single crystal conductor film and subjected to heat treatment, mutual constituent atoms are not formed at the interface between the non-single crystal conductor film and the low resistance conductor film. When moved, the vicinity of the interface is alloyed and the resistance is reduced. However, at the interface between the crystal grains of the non-single-crystal conductor, that is, at the grain boundary, the mutual bonding force between the non-single-crystal conductor constituent atoms is weak, so that the atoms of the low-resistance conductor film constituent atoms are replaced. Progresses faster than in the crystal grains, and needle-shaped low-resistance conductors easily grow along the crystal grain boundaries. This needle-shaped low resistance conductor easily grows. When the needle-shaped low-resistance conductor becomes large, the insulating film under the gate electrode is broken, so that the gate electrode is short-circuited with other electrodes, which causes a decrease in reliability and manufacturing yield of the transistor.

The present invention solves such a problem by using a low resistance conductor as a gate electrode material in order to reduce the electric resistance of the gate electrode, and using a non-single crystal conductor constituent atom and a low resistance conductor film. By blocking the substitution of atoms among the constituent atoms,
Suppresses the growth of needle-shaped low-resistance conductors along the grain boundaries to prevent the breakdown of the gate insulating film, and evenly reduces the electrical resistance of the gate electrode, thereby increasing the operating speed of the transistor and reducing the concentration of Disclosed is a method for manufacturing a semiconductor device in which hot electrons are suppressed and a reliability is improved by disposing a gate electrode also on an impurity diffusion region.

Means for Solving the Problems In order to solve this problem, the present invention provides a step of forming a first insulating film on a main surface of a semiconductor substrate, and a first conductor on the first insulating film. Forming a film; forming a first reaction blocking layer on the first conductor film;
Forming a low resistance conductive film on the reaction blocking layer, selectively removing the low resistance conductive film and the first reaction blocking layer to form a first pattern, A step of introducing impurities into the semiconductor substrate using the first pattern as a mask; a step of forming a second reaction blocking layer on the first conductor film using the first pattern as a mask; Forming a second conductor film on the side surface of the pattern, and using the second pattern composed of the first pattern and the second conductor film as a mask, the second reaction blocking layer and the first conductor Provided is a method for manufacturing a semiconductor device, which comprises a step of selectively removing a film and a step of introducing an impurity into the semiconductor substrate using the second pattern as a mask.

Effect According to the method of the present invention, hot electrons injected into the boundary between the low-concentration impurity diffusion region and the insulating film are discharged by the action of the gate electrode placed on the low-concentration impurity region to improve reliability. Became possible. Furthermore, since the injected hot electrons are immediately discharged, an inversion layer can be easily formed in the low-concentration impurity diffusion region when a voltage is applied to the gate electrode, and as a result, the drain electrode passes from the source electrode under the gate to the drain electrode. It was possible to reduce the DC electric resistance in the region up to and to improve the effective amplification factor of the transistor. At the same time, it has become possible to prevent the diffusion of low-resistance conductor atoms by the reaction blocking layer, uniformly reduce the electric resistance of the gate electrode, and improve the operating speed of the transistor.

Example Hereinafter, with reference to FIG. 1, an example of the manufacturing method of the present invention using a field effect transistor in which polycrystalline silicon and titanium silicide are used as a gate electrode material and one of reaction blocking layers is formed by ion implantation And will be described in detail.

(1) An oxide film 110 of about 700 nm is formed on the surface of the silicon substrate 100 other than the portion where the transistor is to be formed by a selective oxidation method, and a gate oxide film 120 of about 10 nm is formed on the surface of the portion where the transistor is to be formed. Polycrystalline silicon film 130
Was deposited and phosphorus was diffused using POCl ₃ to reduce the resistance of the polycrystalline silicon film 130 [FIG. 1 (a)].

(2) Next, the HTO film 140 of about 100 nm to be the first reaction blocking layer was deposited by the low pressure CVD method, and the titanium silicide film 150 of about 150 nm was further deposited by the physical vapor deposition method [FIG. 1 (b)]. .

(3) Next, a resist pattern 160 for the gate electrode is formed by a photo process, the titanium silicide film 150 is etched by anisotropic dry etching using the resist pattern 160 as a mask, and the HTO film 140 is similarly etched [first Fig. 1 (c)].

In dry etching, generally, there is almost no difference between the etching rate of polycrystalline silicon and the etching rate of metal silicide, and when metal silicide is directly deposited on polycrystalline silicon, it is difficult to etch only metal silicide. is there. However, it is possible to make a difference in the etching rates of these and the HTO film, and it is possible to easily etch with leaving the polycrystalline silicon. That is, the HTO film 140 also functions as an etching stopper.

(4) Next, using the resist pattern 160 as a mask, 5.6
A low concentration impurity diffusion region 170 is implanted into the silicon substrate 100 by implanting × 10 ¹³ cm ^-2 phosphorus with an acceleration energy of 80 keV.
Then, N ₂ ions of about 2.5 × 10 ¹⁶ cm ^-2 are implanted at an acceleration energy of 15 keV to form a polycrystalline silicon film 1.
A second reaction blocking layer 175 was formed on the surface of 30 [Fig. 1 (d)].

(5) After removing the resist pattern 160, a titanium silicide film 180 of about 200 nm was deposited by physical vapor deposition [FIG. 1 (e)].

(6) Next, the titanium silicide film 180 and the polycrystalline silicon film 130 are etched by anisotropic dry etching (sidewall formation), and then 6 × 10 ¹⁵ cm ^-2 arsenic is ion-implanted at an acceleration energy of 80 keV, Source / drain region
Formed 190. Then, heat treatment was performed at 900 ° C. for 30 minutes in a nitrogen atmosphere to activate the impurities [FIG. 1 (f)].

A desired field effect transistor was formed by the above series of steps.

The second reaction blocking layer formed by ion implantation is 10 nm
It consists of the following extremely thin silicon nitride film layer and a silicon layer containing nitrogen. A part of the second reaction layer uniformly reacts with titanium atoms to prevent local diffusion of titanium atoms to prevent destruction of the gate insulating film, and at the same time, to electrically connect the polycrystalline silicon film and the titanium silicide film. The contact can be maintained, and it is not necessary to connect the polycrystalline silicon film and the titanium silicide film outside the transistor formation region.
Therefore, it is not necessary to provide a connecting portion for that purpose, and it is possible to further miniaturize.

In the present embodiment, titanium silicide is used as the low resistance conductor, but silicide such as molybdenum or tungsten may be used, or refractory metal may be used. Further, although the HTO film is used as the first reaction blocking layer, another film may be used as long as it can prevent the diffusion of the low resistance conductor atoms and also functions as an etching stopper.
Further, nitrogen is ion-implanted into the second reaction blocking layer, but similar effects can be expected by oxygen or silicon ion implantation.
It is also possible to form the first reaction blocking layer by ion implantation. Furthermore, the low-resistance conductor film can be a multi-layer film. For example, titanium silicide has low resistance to hydrofluoric acid. Therefore, tungsten is overlaid on titanium silicide to enhance resistance to hydrofluoric acid, and the cleaning process can be performed. It is possible to facilitate.

EFFECTS OF THE INVENTION According to the method of the present invention, it becomes possible to effectively discharge hot electrons injected into the boundary between the low-concentration impurity diffusion region and the insulating film and improve the reliability. Furthermore, the direct current electric resistance in the region from the source electrode to under the gate to the drain electrode can be reduced, and the effective amplification factor of the transistor can be improved. At the same time, it has become possible to prevent the diffusion of low-resistance conductor atoms by the reaction blocking layer, uniformly reduce the electric resistance of the gate electrode, and improve the operating speed of the transistor.

[Brief description of drawings]

1A to 1F are process sectional views showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 100 …… Silicon substrate, 120 …… Gate oxide film, 130 ……
Polycrystalline silicon film, 140 …… HTO film, 150 …… Titanium silicide film, 170 …… Low concentration impurity diffusion region, 175 …… Reaction blocking layer.

Claims (6)

[Claims] 1. A step of forming a first insulating film on a main surface of a semiconductor substrate, a step of forming a first conductor film on the first insulating film, and a step of forming a first conductor film on the first conductor film. A step of forming a first reaction blocking layer, a step of forming a low resistance conductive film on the first reaction blocking layer, and a step of selectively forming the low resistance conductive film and the first reaction blocking layer. To remove impurities to form a first pattern, introducing impurities into the semiconductor substrate using the first pattern as a mask, and using the first pattern as a mask on the first conductor film. A step of forming a second reaction blocking layer, a step of forming a second conductor film on a side surface of the first pattern, and a second pattern including the first pattern and the second conductor film. Selectively removing the second reaction blocking layer and the first conductor film using the mask as a mask, Method of manufacturing a semiconductor device comprising the step of introducing the impurity of the second pattern in the semiconductor substrate as a mask. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first insulating film is used as a gate insulating film. 3. The first reaction blocking layer maintains electrical continuity between the first conductor film and the low resistance conductor film, according to claim 1 or 2. Manufacturing method of semiconductor device. 4. The second reaction blocking layer maintains electrical continuity between the first conductor film and the second conductor film, as claimed in claim 1 or 2. Of manufacturing a semiconductor device of. 5. The method according to claim 1, wherein at least one of the first reaction blocking layer and the second reaction blocking layer is formed by introducing atoms by an ion implantation method.
Item 8. A method of manufacturing a semiconductor device according to any one of items. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the low resistance conductor film is a multilayer film.