JPH07105702B2 - Reset signal generation circuit - Google Patents

Description

The present invention relates to a reset signal generation circuit that generates a reset signal for resetting a microcomputer or the like, and is particularly suitable for IC (integrated circuit) implementation. And a reset signal generating circuit.

(B) Conventional Technology Recently, microcomputers are used in various consumer devices. In order to perform a normal operation, the microcomputer must be reset when the power is turned on or off, and the internal circuit must be reset once. However, the reset signal for resetting needs to be generated for a certain period when the power supply voltage of the microcomputer becomes sufficiently high. Therefore, it must be generated appropriately in relation to the power supply voltage of the microcomputer. I won't. Then, as the reset signal generating circuit, for example, one described in the magazine "Transistor Technology" published on December 1, 1982, December 1982, advertisement feature page 43 is known. This reset signal generation circuit is shown in a simplified form as shown in FIG. 2, and includes a power supply terminal (1) to which a power supply voltage is applied, a constant voltage circuit (2) which generates a constant voltage from the power supply voltage, and A capacitor (3) charged by a power supply voltage, a comparison circuit (4) for comparing a terminal voltage of the capacitor (3) with a reference voltage, and a reset signal generated according to an output signal of the comparison circuit (4) And a transistor (5) that operates. In the case of FIG. 2, charging of the capacitor (3) is started when the power is turned on, but the output of the comparison circuit (4) becomes “H” while the terminal voltage of the capacitor (3) is lower than the reference voltage. Becomes
The transistor (5) is on. When the terminal voltage of the capacitor (3) rises according to the time constant determined by the resistor (6) and the capacitor (3) and becomes higher than the reference voltage, the output of the comparison circuit (4) becomes “L”, The transistor (5) is turned off. Therefore, a predetermined reset signal can be generated at the output terminal (7) when the power is turned on,
If the reset signal is applied to a microcomputer as a controlled circuit (not shown), resetting at power-on can be performed.

When the power supply is cut off, the electric charge accumulated in the capacitor (3) is discharged via the resistor (8). Therefore, the terminal voltage of the capacitor (3) is lowered to be equal to or lower than the reference voltage, the output of the comparison circuit (4) becomes "H", and the transistor (5) is turned on. Therefore, the reset signal can be generated even when the power is cut off, and the microcomputer can be reset.

(C) Problems to be Solved by the Invention However, the circuit of FIG. 2 has a drawback that the number of external connection terminals becomes large when integrated into an IC. That is,
The circuit of FIG. 2 has an external connection terminal for externally connecting the capacitor (3) for setting the width of the reset signal to a predetermined value to the input terminal of the comparison circuit (4), and the reset signal for the controlled circuit. It requires an external connection terminal for applying the voltage. Therefore, if the reset signal generating circuit of FIG. 2 is incorporated in the power supply IC having another function such as the muting function in addition to the reset function, there is a risk that the external connection terminals are insufficient.

(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and a capacitor is connected to an output terminal where a reset signal is generated, and the capacitor has a first charging time constant. Charging circuit, a reference voltage generating circuit for generating a reference voltage, a comparison circuit for comparing the voltage at the output terminal with the reference voltage, and the first capacitor for the first circuit according to the output signal of the comparison circuit.
Is characterized in that a second charging circuit for charging with a second charging time constant shorter than the charging time constant of, and a discharging circuit for the capacitor are provided.

(E) Operation In the present invention, a capacitor for ensuring the pulse width of the reset signal is connected to the output terminal, and the capacitor is first
The charging circuit charges the battery with a first time constant, and when the terminal voltage of the capacitor reaches a predetermined value, the second charging circuit charges the capacitor with a second time constant.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, (9) is a power supply terminal to which a power supply voltage is applied, and (10) is a constant voltage circuit for obtaining a constant voltage from the power supply voltage. , (11) is a reference voltage generating circuit for generating the first and second reference voltages V ₁ and V ₂ (where V ₁ > V ₂ ), (12) is an output terminal from which a reset signal is obtained,
(13) is a capacitor connected to the output terminal (12),
(14) is due to the voltage V ₃ obtained at the power output terminal (15)
A charging resistor (first charging circuit) that charges the capacitor (13) with a first charging time constant T ₁ , (16) is an inverter (17)
And a second mirror which is composed of first and second transistors (18) and (19) connected in a current mirror and a diode (20), and which charges the capacitor (13) with a second charge shorter than the first charge time constant. A second charging circuit for charging with a time constant T ₂ , (21) comprising an inverter (22) and a discharging transistor (23), a discharging circuit for discharging the electric charge of the capacitor (13),
(24) is a voltage dividing circuit comprising resistors (25) and (26) for dividing the output voltage V ₃ of the constant voltage circuit (10), (27) is the second reference voltage V of the reference voltage generating circuit (11) ₂ and output terminals (12)
Comparing the voltage V _4, the first comparator circuit for driving the second charging circuit (16) by the output signal, and (28) and the first reference voltage V ₁ of the said reference voltage generating circuit (11) It is a second comparison circuit that compares the output voltage V _{5 of the} voltage dividing circuit (24 ) and drives the discharge circuit (21) by the output signal.

Next, the operation will be described. When the power is turned on, first, the first and second reference voltages V ₁ and V ₂ are generated from the reference voltage generation circuit (11), and the first and second reference voltages V ₁ and V ₂ are respectively changed to the second voltage.
And the negative input terminals of the first comparison circuits (28) and (27). On the other hand, the output voltage V ₃ of the constant voltage circuit (10) is not yet sufficiently high, and the output voltage V ₅ of the voltage dividing circuit (24) is V ₁ >
Because of the relationship of V ₅ , the output of the second comparison circuit (28) is "L".
Then, the discharge transistor (23) of the discharge circuit (21 ) is turned on. If the capacitor (13) is completely discharged in the initial state, the voltage V ₄ of the output terminal (12) applied to the positive input terminal of the first comparison circuit (27) is V ₂ > V ₄
Since the output of the first comparison circuit (27) is "L", the operation of the second charging circuit (16) is stopped. Therefore, the voltage of the output terminal (12) maintains the "L" state immediately after the power is turned on.

At time t ₁ , the output voltage V _{3 of the} constant voltage circuit (10) rises, and the voltage dividing circuit (24) generates a voltage V ₁ <V ₅ at the time t ₁ and the second comparison circuit (28 ) Output becomes "H", and the discharge transistor (23) of the discharge circuit (21 ) is turned off. Therefore, the capacitor (13) with the charging resistor (14)
However, since the first charging time constant T ₁ determined by the charging resistor (14) and the capacitor (13) is large, the terminal voltage of the capacitor (13) gradually increases. The voltage of the output terminal (12) is also adapted accordingly. Then, at time t ₂ , the voltage V ₄ at the output terminal (12) becomes V ₂ <
When it becomes V ₄ , the output of the first comparison circuit (27) becomes “H”, and the second charging circuit (16) starts operating. In the second charging circuit (16) , when the input of the inverter (17) is “L”, the output of the inverter (17) becomes “H”, the collector current of the first transistor (18) does not flow, The collector current of the 2-transistor (19) also does not flow. When the input of the inverter (17) is "H", the inverter (17)
Becomes "L", the collector current of the first transistor (18) flows, and a predetermined constant current is generated in the collector of the second transistor (19) in a mirror relationship. Therefore, when the output of the first comparison circuit (27) becomes "H", a charging current is generated from the second charging circuit (16) , and the capacitor (13) is charged with the first charging time constant.
Than T ₁ is charged by the shorter second charge time constant T _2, the terminal voltage of the capacitor (13), i.e. the voltage V ₄ of the output terminal (12) is substantially immediately "H".

As described above, when the power is turned on, the power output terminal (1
Since the voltage of the output terminal (12) is kept at "L" until the voltage of 5) becomes a constant voltage, the voltage "L" of the output terminal (12) is used as a reset signal to the controlled circuit, By applying a constant voltage of the power supply output terminal (15) as a power supply voltage to each of the controlled circuits, reliable resetting and driving of the controlled circuit can be achieved. In the embodiment, the first reference voltage V ₁ of the reference voltage generating circuit (11) is set to 4.
5V, the second reference voltage V ₂ is 1.2V, the output constant voltage of the constant voltage circuit (10) is 5.6V, the power supply voltage applied to the power supply terminal (9) is 8V
Is set to.

Next, the operation when the power is cut off will be described. When the power is cut off at time t ₃ , the output voltage V _{3 of the} constant voltage circuit (10) first drops,
V ₁ > V ₃ . Therefore, the output of the second comparison circuit (28) becomes "L", and the discharge transistor (2 ) of the discharge circuit (21) is
3) is turned on and the discharge of the capacitor (13) is started. Then, the discharge of the capacitor (13) progresses,
When the voltage V _{4 at} the output terminal (12) drops until V ₂ > V ₄ ,
The output of the first comparison circuit (27) becomes “L”, the operation of the second charging circuit (16) is stopped, and then the first power supply voltage applied to the power supply terminal (9) decreases in accordance with the first power supply voltage. The circuit in the figure returns to the initial state. The capacitor (13) when the power is cut off
Can be arbitrarily discharged using a discharge circuit other than the discharge circuit shown in the embodiment of FIG.

FIG. 3 shows the power supply voltage V ₃ (FIG. 3 (a)) for the controlled circuit obtained at the power output terminal (15) and the output voltage (reset signal, third signal) obtained at the output terminal (12). The relationship with the figure (b)) is shown. When the power is turned on at time t ₀ , the power supply voltage V ₃ rises, and at time t ₁ , the first reference voltage
Discharge transistor (23) of discharge circuit (21) when V ₁ is exceeded
Turns off. Therefore, the capacitor (13) is charged by the charging resistor (14), the output voltage V ₄ gradually rises, and when it exceeds the second reference voltage V ₂ at time t ₂ , the second charging circuit (16)
Is activated, and the output voltage V ₄ rapidly becomes “H”. Further, when cutting off power to the time t _3, wherein the discharge transistor (23) is turned on, so rapidly discharge the capacitor (13), the output voltage is "L".

(F) Effects of the Invention As described above, according to the present invention, it is possible to provide a reset signal generation circuit capable of generating a reset signal at a timing according to a change in the power supply voltage of a controlled circuit. Further, since the circuit configuration is such that the capacitor that determines the generation time of the reset signal is connected to the output terminal of the reset signal, according to the present invention, it is possible to provide a reset signal generation circuit having a small number of terminals when it is integrated into an IC. Furthermore, since the capacitor is sequentially charged by the first charging circuit having a long time constant and the second charging circuit having a short time constant, the pulse width of the reset signal can be reliably ensured and can be arbitrarily set.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional reset circuit, and FIG. 3 (a).
(B) is a characteristic diagram for explaining the present invention. Description of main drawing numbers (10) …… Constant voltage circuit, (11) …… Reference signal generation circuit,
(12) …… Output terminal, (13) …… Capacitor, (14)…
… Charging resistance, (16) … Second charging circuit, (21) … Discharging circuit, (27)… First comparison circuit.

Claims (1)

[Claims] 1. A circuit for generating a reset signal applied to a controlled circuit, the reference generating a first reference voltage and a second reference voltage smaller than the first reference voltage according to a power supply voltage. A voltage generating circuit, a constant voltage circuit that generates a constant voltage from the power supply voltage, a capacitor that charges and discharges the output of the constant voltage circuit, a discharge circuit that discharges the electric charge of the capacitor, the first reference voltage, and When the constant voltage is compared, the operation of the discharge circuit is permitted when the constant voltage that rises when the power supply voltage is turned on is lower than the first reference voltage, and when the constant voltage is higher than the first reference voltage. A second comparison circuit that inhibits the operation of the discharge circuit, a first charging circuit that charges the capacitor according to a first charging time constant, and a second charging circuit that charges the capacitor according to a second charging time constant that is smaller than the first charging time constant. A second charging circuit for charging, the second reference voltage and the terminal voltage of the capacitor are compared, and when the terminal voltage of the capacitor is smaller than the second reference voltage, the operation of the second charging circuit is prohibited; When the terminal voltage of the second is higher than the second reference voltage, the second voltage
A reset signal generation circuit, comprising: a first comparison circuit that permits the operation of a charging circuit; and a signal for releasing or resetting the controlled circuit from one end of the capacitor.