JPH07114282B2 - Thin film transistor and manufacturing method thereof - Google Patents

Description

The present invention relates to a thin film transistor applied to an active matrix type liquid crystal display, an image sensor, a three-dimensional integrated circuit and the like according to the present invention.

[Conventional technology]

The conventional thin film transistor is, for example, one of the International Display Research Canference.
It had a structure as shown in 985 p.30-p.31. This structure is generalized and its outline is shown in FIG.
A gate electrode 302 made of chromium or the like and a gate insulating film 303 so as to cover the gate electrode 302 are provided on an insulating substrate 301 made of glass, quartz, sapphire, or the like. A channel region 304 made of an amorphous silicon thin film and a source region made of an amorphous silicon thin film to which an impurity serving as a donor or an acceptor is added, in contact with the channel region 304 above the end of the channel region.
A drain region 306 and a drain region 306 are formed. Further, a source electrode 307 and a drain electrode 308 are provided in contact with this.

[Problems to be solved by the invention]

However, the conventional thin film transistor has the following problems.

That is, in order to reduce the OFF current (current between the source and the drain that flows when the transistor is off), when forming the source region 305 and the drain region 306 so that the channel region 304 can maintain high resistance, Impurities contained therein, which serve as donors or acceptors, must be prevented from diffusing into the channel region 304. However, conversely, for this reason, the impurity concentration of the source / drain region is lowered to increase the resistance of the region, or the impurities are less likely to diffuse into the channel region in contact with the source / drain region, and the high resistance channel is formed. The increase in parasitic resistance has been remarkable, such as the increase in resistance corresponding to the film thickness of the region. That is, the gate insulating film 303
Carriers in the inversion layer induced at the interface between the channel region 304 and the channel region 304 flow to the source region 305 or the drain region 306 through the parasitic resistance R _s. However, since R _s is large, how to reduce the equivalent resistance of the inversion layer. However, the ON current (current between the source and drain that flows when the transistor is in the ON state) was kept small.

FIG. 4 is an equivalent circuit diagram of a thin film transistor for quantitatively clarifying the above problems. V _G , V _D , and I _D are the gate voltage, drain voltage, and drain current, respectively.
V _GE and V _DE are the effective gate voltage and drain voltage applied to the transistor, respectively, and are expressed by the following equations.

V _GE = V _G −I _D R _S (1) V _DE = V _D −2I _D R _S (2) Therefore, effective gate voltage and drain voltage decrease due to series resistance component R _S , and ON current decreases. To do. At this time, under V _G −V _th >> V _D , I _D = β (V _GE −V _th ) V _DE (3) Therefore, from equations (1), (2), and (3), Becomes Where β is the gain of the transistor Is the channel length, W is the channel width, C _ox is the capacitance of the gate insulating film, μ is the mobility), and I _o is the drain current when R _s = 0. Therefore, I _D is reduced by the second term of the denominator of equation (4). Moreover, it can be seen that as β, V _G , and V _D are increased to increase the ON current, the effect of reducing I _D becomes more remarkable.

The present invention solves such a problem, and an object thereof is to provide a thin film transistor in which a source / drain region is formed in an island shape and a source / drain electrode is formed under a gate insulating film. Another object of the present invention is to provide a thin film transistor capable of reducing the parasitic resistance R _S while maintaining a high resistance in the channel region, and a manufacturing method thereof.

[Means for solving problems]

The thin film transistor of the present invention includes isolated island-shaped source and drain regions made of a silicon thin film to which an impurity serving as a donor or an acceptor is added, a part of upper surfaces of the source region and the drain region, the source region and the drain region. A silicon region forming a channel region formed between the drain region, an insulating film formed on the channel region and having the same shape as the silicon thin film forming the channel region, and the source region. A source electrode formed so as to be connected, a drain electrode formed so as to be connected to the drain region, and the source electrode, the source region, the insulating film, the drain region, and the drain electrode are covered. A gate insulating film formed on the channel region, and a gate electrode formed on the gate insulating film on the channel region. That.

〔Example〕

 Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is an example of a sectional structural view showing a thin film transistor according to an embodiment of the present invention. On an insulating substrate 101 such as glass, quartz, sapphire, etc., a source region 102 and a drain region 1 made of a silicon thin film such as polycrystalline silicon or amorphous silicon doped with impurities serving as donors or acceptors.
A channel region 104 made of a silicon thin film is formed so as to connect the upper side of the source region end where 03 is formed and the upper side of the drain region end so as to connect them, and SiO ₂ , SiNx, SiON.
Etc. is provided with an insulating film 105. A source electrode 106 made of metal, a transparent conductive film or the like is in contact with the source region 102, and a drain electrode 107 is also in contact with the drain region 103. The whole of these is covered with a gate insulating film 108 of SiO ₂ , SiNx, SiNx, SiiON or the like, and a gate electrode 109 is formed on the gate insulating film 108.
Is provided. The insulating film 105 forms a part of the gate insulating film. The gate insulating film 108 also serves as an interlayer insulating film that maintains insulation between wirings.

FIG. 2 shows a method of manufacturing a thin film transistor according to the present invention. First, as shown in FIG. 2A, polycrystalline silicon, amorphous silicon, or the like, to which impurities serving as donors or susceptors are added, is formed on an insulating substrate 201 such as glass, quartz, or sapphire by the CVD method or the like. Then, the source region 202 and the drain region 203 made of a silicon thin film are processed into a predetermined shape. Secondly, as shown in FIG. 2 (b), a silicon thin film such as polycrystalline silicon or amorphous silicon forming a channel region.
204 is formed by a CVD method or the like, and an insulating film 205 of SiO ₂ , SiNx, SiON or the like is further formed by a CVD method, a sputtering method, or the like. Next, the silicon thin film 204 and the insulating film 205 are brought into contact with the upper side of the end of the source region and the upper side of the end of the drain region, and processed into a predetermined shape so as to connect them. Third, Fig. 2 (c)
As shown in, metal, transparent conductive film, etc. are sputtered,
The source electrode 206 is formed by a vapor deposition method or the like, and the source electrode 206
Process so that it touches. Similarly, the drain electrode 207 is processed so as to contact the drain region 203. Fourth, as shown in FIG. 2 (d), a gate insulating film of SiO ₂ , SiNx, SiON, etc.
The 208 is formed by a CVD method or the like so as to cover the entire surface. The insulating film 205 forms a part of the gate insulating film. Gate insulating film 208
Also serves as an interlayer insulating film that maintains insulation between wirings. Next, a gate electrode 209 made of metal, a transparent conductive film, or the like is formed by a sputtering method, an evaporation method, or the like and processed into a predetermined shape. In the thin film transistor thus configured, it is possible to reduce the parasitic resistance R _S while keeping the OFF current low by making the channel region have high resistance. First, the source region 202 made of a silicon thin film containing a large amount of impurities
Since the silicon thin film to be the channel region 204 is formed where the drain region 203 and the drain region 203 are previously formed, impurities in the source / drain regions do not diffuse to the entire channel region and the high resistance of the channel region is maintained. As a result, the OFF current can be kept low. In addition, impurities in the source / drain regions diffuse into the silicon thin film in the channel region near the source / drain regions due to the temperature during the process of forming the silicon thin film itself, and the resistance decreases. Therefore, it is possible to reduce the parasitic resistance R _S.

Further, according to the present invention, the film thickness controllability of the silicon thin film in the channel region is improved. That is, unlike the conventional case, the film thickness of the silicon thin film in the channel region is not determined by the etching end point when patterning the source / drain regions, but the film thickness is defined only by the formation of the silicon thin film. Therefore, it is possible to accurately control the film thickness without being affected by variations in etching. In particular, in order to increase the resistance of the channel region to reduce the OFF current, and also to reduce the space charge amount in the silicon thin film to lower the threshold voltage and increase the ON current, the thickness of the silicon thin film in the channel region is set to It is important to make it as thin as possible, and to improve the characteristics of thin film transistors,
As described above, the ability to accurately control the thickness of the polar silicon thin film has a great effect.

Further, to the source region 202 and the drain region 203, without worrying about the diffusion of extra impurities into the channel region,
Since a sufficiently large amount of impurities can be added, the resistance of the source / drain region itself is lowered and the source electrode
The ohmic contact with 206 and the drain electrode 207 is improved, and as a result, it contributes to the further resistance of the parasitic resistance R _S.

Furthermore, since the insulating film 205 is continuously formed after the channel region 204 is formed, the trap density of impurities at the interface between the channel region 204 and the insulating film 205 can be significantly reduced. In order to reduce the trap density at the interface between the silicon thin film in the channel region and the gate insulating film and increase the ON current, it is important to form the gate insulating film after forming the silicon thin film in the channel region. In order to improve the characteristics, reducing the trap density at the interface as described above has a great effect.
Further, it is preferable to continuously form the silicon thin film and the insulating film in the channel region in the same chamber because the trap density can be further reduced.

Further, according to the present invention, different materials can be arbitrarily selected for the insulating film 205 and the gate insulating film 208. For example, insulating film 20
If SiO ₂ is selected as 5 and SiNx is selected as the gate insulating film 208, the upper side of the silicon thin film in the channel region becomes SiO ₂ and the silicon thin film becomes
Since the interface characteristics of SiO ₂ are good, the characteristics of the thin film transistor can be improved. Further, SiNx has a larger dielectric constant than SiO ₂ , so that it increases the ON current, and further has better moisture resistance than SiO ₂ , so that reliability can be improved. If different materials are selected as described above, it is possible to take advantage of each of them.

FIG. 5 is a graph showing an example of characteristics of the thin film transistor according to the present invention. The horizontal axis is the gate voltage V _GS , and the vertical axis is the logarithmic value of the drain current I _D. The drain voltage V _DS is 4 V, the channel length L is 20 μm, and the channel width W is 10 μm. Polycrystalline silicon is used for the silicon thin film in the channel region,
Its film thickness is 200Å. As you can see from the graph,
The high resistance of the polycrystalline silicon thin film itself is maintained at 10 ^-13 A
The following OFF current is obtained. In addition, since an extremely thin film thickness of 200Å can be adopted, the amount of space charge is reduced, the trap density at the interface between the silicon thin film in the channel region and the gate insulating film is reduced, and the threshold voltage is small, that is, from the OFF state. It makes a sharp transition to the ON state, and good characteristics with a large ON current are obtained. Further, according to the present invention, it is possible to apply a thinner silicon thin film.

〔The invention's effect〕

 The present invention has the following excellent effects.

First, the parasitic resistance R _S can be reduced while keeping the silicon thin film in the channel region at a high resistance. As a result, a small OFF current and a large ON current can be compatible for the first time.

Secondly, the thickness of the silicon thin film in the channel region can be controlled accurately. As a result, an extremely thin silicon thin film, which is an essential requirement for improving the characteristics of the transistor, can be realized uniformly and with good reproducibility.

Thirdly, since a large amount of impurities can be added to the source region and the drain region without adversely affecting the others, the auxic contact between the source region and the source electrode or the drain region and the drain electrode is improved. To be done.
This significantly improves the transistor characteristics especially when the drain voltage V _DS is small.

Fourth, the trap density of impurities at the interface between the silicon thin film in the channel region and the gate insulating film can be significantly reduced,
A thin film transistor with high current and good characteristics can be realized, and since an insulating film is formed on the channel region before the source / drain electrodes are formed, channel contamination at the time of source / drain current formation is eliminated and high performance and high reliability are achieved. Can be achieved.

Fifth, since two different kinds of materials can be selected for the gate insulating film, a gate insulating film that takes advantage of each material can be obtained, and a thin film transistor having high reliability and good characteristics can be realized. .

Sixth, since the silicon thin film in the channel region and the silicon thin film in the source / drain regions are completely covered with the gate insulating film, the passivation effect is automatically exhibited, and the high protective film without using an extra protective film. A thin film transistor having reliability can be realized.

Seventh, since no special high-temperature heat treatment is required for manufacturing the thin film transistor of the present invention, it can be manufactured on an inexpensive ordinary glass substrate and can be applied to an inexpensive and large-area active matrix substrate. is there.

As described above, the thin film transistor of the present invention has many excellent effects, and its application range is not only the active matrix substrate for the display but also its peripheral driving circuit, image sensor, three-dimensional integrated circuit, etc. A wide variety.

[Brief description of drawings]

FIG. 1 is a sectional view showing the structure of the thin film transistor of the present invention. 2A to 2D are cross-sectional views showing a method of manufacturing a thin film transistor of the present invention. FIG. 3 is a sectional view showing the structure of a conventional thin film transistor. FIG. 4 is an equivalent circuit diagram of the thin film transistor. FIG. 5 is a graph showing characteristics of the thin film transistor of the present invention. 101, 201, 301 ... Substrate 102, 202, 305 ... Source regions 103, 203, 306 ... Drain regions 104, 204, 304 ... Channel regions 105, 205 ... Insulating films 106, 206, 307 ... Source electrodes 107, 207, 308 ... Drain electrodes 108, 208, 303 ... Gate insulating films 109, 209, 302 ... Gate electrodes

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinji Ryukaku 3-3-5 Yamato, Suwa-shi, Nagano Seiko Epson Corporation (72) Inventor Ryosuke Araki 3-3.5 Yamato, Suwa-shi, Nagano Seiko Epson Co., Ltd. (72) Inventor Mutsu Matsuo 3-5 Yamato, Suwa City, Nagano Seiko Epson Co., Ltd. (56) References JP 60-251667 (JP, A) JP 58-91676 (JP) , A) JP 58-93277 (JP, A)

Claims (2)

[Claims] 1. An isolated island-shaped source region and drain region made of a silicon thin film to which an impurity serving as a donor or an acceptor is added, a part of upper surfaces of the source region and the drain region, the source region and the drain region. A silicon thin film forming a channel region formed between the drain region and an insulating film formed on the channel region and having the same shape as the silicon thin film forming the channel region,
A source electrode formed to be connected to the source region, a drain electrode formed to be connected to the drain region, the source electrode, the source region, the insulating film, the drain region, and the drain electrode. A thin film transistor comprising a gate insulating film formed so as to cover it, and a gate electrode formed on the gate insulating film on the channel region. 2. A step of forming isolated island-shaped source and drain regions made of a silicon thin film to which impurities serving as donors or acceptors are added, a part of upper surfaces of the source and drain regions, and A step of forming a silicon thin film forming a channel region between the source region and the drain region and an insulating film formed on the silicon thin film in the same shape, the source electrode, the source region, and
And a step of forming a gate insulating film so as to cover the insulating film, the drain region, and the drain electrode, and a step of forming a gate electrode on the gate insulating film on the channel region. A method of manufacturing a thin film transistor having the characteristics.