JPH07120766B2 - Method for manufacturing photoelectric conversion device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a photoelectric conversion device, and particularly to at least a photoelectric conversion unit, a charge storage unit that stores the output of the photoelectric conversion unit, and the charge storage unit. The present invention relates to a method for manufacturing a photoelectric conversion device in which a switch part connected to the part has an insulating layer and a photoconductive semiconductor layer provided on the insulating layer.

[Prior Art] Conventionally, a reading system using a reduction optical system and a CCD type sensor has been used as a reading system for a facsimile, an image scanner, or the like, but in recent years, hydrogenated amorphous silicon (hereinafter a-Si: H) has been used. By developing a photoconductive semiconductor material represented by (1), it is remarkable to develop a so-called contact type line sensor in which the photoelectric conversion part and the signal processing part are formed on a long substrate and read with an optical system of the same size as the original. .

In particular, since the a-Si: H can be used not only as a photoelectric conversion material but also as a semiconductor material of a field effect transistor, the photoconductive semiconductor layer of the photoelectric conversion section and the semiconductor layer of the signal processing section are separated from each other. It has the advantage that it can be formed at the same time.

FIG. 16 is a partial vertical cross-sectional view of a configuration example of a conventional line sensor.

As shown in the figure, on the substrate 1, the wiring section 2, the photoelectric conversion section 3,
A charge storage section 4 and a switch section 5 are provided. On the substrate 1, the lower layer electrode wiring 6 of the wiring section 2, the lower layer electrode wiring 7 of the charge storage section 4, and the lower layer electrode wiring 8 forming the gate electrode of the switch section 5 are formed.
Are formed, and these lower layer electrode wirings 6, 7, 8
An insulating layer 9 is formed on the top. A semiconductor layer (here, a-Si: H) 11 is formed on the insulating layer 9 of the switch section 5, and a photoconductive semiconductor layer made of a photoconductive material (here, a-Si: H) 11 is formed on the substrate 1 of the photoelectric conversion section 3. , A-Si: H) 10 is formed. Here, the semiconductor layer 11 and the photoconductive semiconductor layer 10 are simultaneously formed.

A matrix wiring portion is formed on the lower layer electrode wiring 6 and the upper layer electrode wiring 12 via an insulating layer. The photoconductive semiconductor layer 10 and the semiconductor layer 11 are connected by the upper layer electrode wiring 13.
The upper layer electrode wiring 13 is connected through the insulating layer 9 of the charge storage section 4, and the upper layer electrode wiring 13, the insulating layer 9 and the lower layer electrode wiring 7 form a storage capacitor. A portion of the upper layer electrode wiring 13 connected to one end of the semiconductor layer 11 becomes a drain electrode, and an upper layer electrode wiring 14 connected to the other end of the semiconductor layer 11 becomes a source electrode.

The above is the configuration in the case where the photoelectric conversion unit and the signal processing unit are formed on the same substrate. As shown in FIG.
And a semiconductor layer is formed only on the switch portion 5, and the insulating layer 9 and the photoconductive semiconductor layer 10 and the semiconductor layer 11 formed on the insulating layer 9 are both formed by a manufacturing method such as a glow discharge method. Then, patterning is performed by photolithography similarly to the patterning of the upper layer electrode wiring and the lower layer electrode wiring.

[Problems to be Solved by the Invention] However, in the above-described conventional line sensor, in the photoetching step of the semiconductor layer and the insulating layer, the etching selectivity between the semiconductor layer and the insulating layer is very poor, and When the etching is performed, the insulating layer is also etched, resulting in defective insulation, pinholes, etc., and the yield is remarkably reduced.

In order to solve the above-mentioned problems, the photoelectric conversion part, the charge storage part, the switch part, the wiring part, etc. may be formed by completely different film forming and element forming process steps, but the manufacturing process of the line sensor is complicated. Therefore, there is a problem that the number of steps increases, the advantage of integrally forming on the same substrate cannot be utilized, and the cost increases.

An object of the present invention is to provide a method for manufacturing a photoelectric conversion device that has simple steps, high yield, and low cost.

[Means for Solving the Problems] The above-mentioned problems are caused in a method for manufacturing a photoelectric conversion device in which a plurality of elements having a photoelectric conversion unit, a signal storage unit, and a transistor unit for signal transfer are provided on the same substrate. Forming a lower electrode of the signal storage unit and a gate electrode of the transistor unit on the substrate; forming an insulating film covering the lower electrode and the gate electrode; and forming a semiconductor on the insulating film. A step of forming a film, a step of forming a film for ohmic contact on the semiconductor film, an electrode for forming a light receiving part of the photoelectric conversion part on the film for ohmic contact and the signal accumulating part A step of forming an upper electrode and a source / drain electrode of the transistor part, wherein the ohmic contact film, the semiconductor film and the insulating film are patterned in the same step. It is solved by the manufacturing method of a photoelectric conversion device of the present invention, characterized in that ring to be separated into the respective elements.

Further, the above problem is a method for manufacturing a photoelectric conversion device in which a plurality of elements having a photoelectric conversion unit, a signal storage unit, and a transistor unit for signal transfer are provided on the same substrate, wherein the photoelectric conversion is performed on the substrate. A pair of electrodes, a lower electrode of the signal storage portion, and a source / drain electrode of the transistor portion, and ohmic contact on the pair of electrodes, the lower electrode, and the source / drain electrode. A step of forming a film, a step of forming a semiconductor film on the ohmic contact film, a step of forming an insulating film on the semiconductor film, and an upper electrode of the signal storage section on the insulating film. Forming a gate electrode of the transistor part, and patterning the insulating film, the semiconductor film, and the ohmic contact film in the same step. Is solved by the manufacturing method of a photoelectric conversion device of the present invention, characterized by separating each element.

[Operation] According to the method for manufacturing a photoelectric conversion device of the present invention, in the method for manufacturing a photoelectric conversion device in which a plurality of elements having a photoelectric conversion unit, a signal storage unit, and a transistor unit for signal transfer are provided on the same substrate, Since the insulating film, the semiconductor film, and the film for ohmic contact are stacked in this order or in the reverse order, these films are patterned in the same step to be separated into each element. The problem of etching selectivity with respect to is eliminated, deterioration of the insulating layer in the manufacturing process such as the etching process can be prevented, and reliability can be improved. Further, in each component of the photoelectric conversion device, the insulating layer and the photoconductive semiconductor layer can be formed simultaneously, so that the manufacturing process can be simplified, and a small photoelectric conversion device can be provided. it can.

Further, in the present invention, when the wiring portion having a laminated structure of a plurality of layers is provided in the photoelectric conversion device, the insulating layer and the photoconductive semiconductor layer provided on the insulating layer are laminated and then the insulating layer is formed. And the photoconductive semiconductor layer are patterned to form an interlayer insulating layer, whereby the interlayer insulating layer is formed in the same step as the photoelectric conversion unit, the charge storage unit, and the switch unit.
And it can be etched.

[Examples] Hereinafter, the present invention will be described in detail with reference to the drawings. As an example of the photoelectric conversion device manufactured by the present invention,
The line sensor will be described. In the following explanation,
The same members as those of the line sensor shown in FIG. 16 are designated by the same reference numerals.

FIG. 1 is a partial vertical sectional view of an embodiment of a line sensor according to the present invention.

In FIG. 1, the lower layer electrode wiring of the wiring portion 2 is formed on the substrate 1.
6, the lower layer electrode wiring 7 of the charge storage section 4 and the lower layer electrode wiring 8 which is the gate electrode of the switch section 5 are formed, and on the lower layer electrode wiring 6, 7, 8 and on the substrate 1 between them. The insulating layer 9 is formed. A photoconductive semiconductor layer 10 is formed on the insulating layer 9, and a part of the insulating layer 9 and the photoconductive semiconductor layer 10 on the wiring portion 2 is opened for connection. On the photoconductive semiconductor layer 10, upper electrode wiring 12, 12 ', 1
3, 14 are formed, and the opening between the upper layer electrode wiring 12 ′ and the upper layer electrode wiring 13 serves as a photoelectric conversion region of the photoelectric conversion unit 3. The upper electrode wiring 13, the photoconductive semiconductor layer 10, the insulating layer 9, and the lower electrode wiring 7 form a storage capacitor.
One end of the switch portion 5 side serves as a drain electrode. One end of the upper layer electrode wiring 14 on the switch section 5 side serves as a source electrode.
Although not shown, a doping layer is provided between the photoconductive semiconductor layer 10 and the upper layer electrode wirings 12, 12 ', 13, 14 to make ohmic contact. In this embodiment, the insulating layer 9 and the photoconductive semiconductor layer 10 are provided in each of the wiring section 2, the photoelectric conversion section 3, the charge storage section 4, and the switch section 5, and they are formed in the same step. In the wiring portion 2, the photoconductive semiconductor layer 10 is provided between the lower layer electrode wiring 6 and the upper layer electrode wiring 12 in addition to the insulating layer 9, but between the lower layer electrode wiring 6 and the upper layer electrode wiring 12. Is required to have insulating properties, and the presence of the photoconductive semiconductor layer 10 does not affect.

In the photoelectric conversion part 3, the photoconductive semiconductor layer 10 is provided on the substrate 1 via the insulating layer 9, which appears as a change in energy level at the interface between the photoconductive semiconductor 10 and the insulating layer 9. There is no change in the basic properties of photoconductive properties. In this case, it is possible to provide an electrode between the substrate 1 of the photoelectric conversion part 3 and the insulating layer 9 to control the energy level at the interface of the photoconductive semiconductor layer 10 for optimization.

In the charge storage section 4, the photoconductive semiconductor layer 10 provided on the insulating layer 9 affects the charge storage capacity. This effect is the bias dependence of the capacitance, and the capacitance changes due to band bending of the semiconductor layer at the insulating layer interface. However, in the charge / discharge operation of electric charges used in this embodiment, this bias dependence can be almost ignored by negatively biasing the electrode on the insulating layer 9 side.

The photoconductive semiconductor layer 10 has a good film thickness.
The photoelectric conversion characteristics and the switching characteristics of the switch unit 5 are set to values that can be obtained.

Next, a case where the switch part of the line sensor is formed by a matrix switch array will be described.

FIG. 2 shows an equivalent circuit of a line sensor having a matrix switch array.

In the figure, S1, S2, ..., SN (hereinafter referred to as SY1)
Is an optical sensor showing the photoelectric conversion unit 3. C1, C2, ..., C
N (hereinafter, referred to as CY1) is a storage capacitor indicating the charge storage unit 4, and stores the photocurrent of the photosensor SY1. ST1,
ST2, ..., STN (hereinafter referred to as ST Y1) are transfer switches for transferring the charge of the storage capacitor CY1 to the load capacitor CX1, SR1, SR2, ..., SR N (hereinafter referred to as SRY1). (Note) is a discharge switch for resetting the electric charge of the storage capacitor CY1. In this example, the switch unit 5 includes a transfer switch ST Y1 and a discharge switch SR Y1.

The optical sensor SY1, the storage capacitor CY1, the transfer switch ST Y1 and the discharge switch SR Y1 are arranged in a single row array and are divided into N × M blocks. Transfer switches ST Y1, arranged in an array, discharge switches
The gate electrode of SR Y1 is a wiring part 2 formed in a matrix.
Connected to. The gate electrode of the transfer switch ST Y1 is commonly connected to the gate electrodes of the transfer switches of the same rank in other blocks, and the gate electrode of the discharge switch SR Y1 is connected to the gate electrode of the transfer switch of the next rank in each block. It is circulated and connected to the gate electrode.

Common lines (gate drive lines G1, G2, ..., GN) of the wiring section 2 formed in the matrix are driven by the gate drive section 21. On the other hand, the signal output is the lead wire 23 (signal output lines D1, D2,
, DM) to the signal processing unit 22.

FIG. 3 is a timing chart showing the operation of the line sensor.

The gate drive line (G1, G2, ..., GN) has a gate drive unit 21
From then on, selection pulses (VG1, VG2, VG3, ..., VGN) are sequentially applied. First, when the gate drive line G1 is selected, the transfer switch ST1 is turned on, and the charge accumulated in the storage capacitor C1 is transferred to the load capacitor CX1. Next, when the gate drive line G2 is selected, the transfer switch ST2 turns off.
The N state is entered, and the charge accumulated in the storage capacitor C2 is transferred to the load capacitor CX1 and at the same time, the discharge switch SR.
1 resets the charge on the storage capacitor C1. Similarly, G3, G4, ..., GN are also selected and the reading operation is performed. In the figure, VC1, VC2, ..., V
CN indicates a change in the potential of the storage capacitor CY1. These operations are performed for each block, and the signal outputs VX1, VX2, ..., VXM of each block are the inputs D1, D2, ...
・ Sent to DM, converted to serial signal and output.

FIG. 4 shows a perspective view of the line sensor.

In FIG. 4, reference numeral 1 denotes a substrate on which wiring portions 2, a photoelectric conversion portion 3, a charge storage portion 4 for storing output charges of the photoelectric conversion portion 3, and a charge storage portion 4 are formed in a matrix. The transfer switches 5a are provided in an array for transferring the charges of 1 to the signal processing IC 24, and the discharge switches 5b are provided in an array for resetting the charge storage section 4. The transfer switch 5a and the discharge switch 5b are divided into blocks of N × M, the drain electrode of the transfer switch 5a is connected to the corresponding charge storage section 4, and the source electrode is one for each block. They are put together and connected to a load capacitor (not shown) and the signal processing IC 24. On the other hand, the gate electrode of each block is connected to the wiring portion 2 formed in a matrix so that the gate electrode lines of the same order in each block are commonly connected. The common electrode of the wiring portion 2 is connected to the gate drive IC 25. The signal processing IC 24 is composed of a switch array, a shift register, a buffer amplifier, etc., and reads and resets the signal transferred to the lead wire 23. The signal processing IC 24 is arranged near the center of the substrate 1 so as to minimize the wiring length of the lead wire 23.
In addition, a shield pattern (not shown) having a ground potential is arranged between the lead lines 23.

FIG. 5 shows a partial plan view of the line sensor.

In the figure, 2 is a wiring portion formed in a matrix, 3
Is a photoelectric conversion unit, 4 is a charge storage unit, 5a is a transfer switch,
5b is a discharge switch for resetting the charge of the charge storage unit 4, 23 is a lead line connecting the signal output of the transfer switch to the signal processing IC, and 26 is for accumulating and reading the charge transferred by the transfer switch 5a. Load capacitor.

In this embodiment, a-Si: H is used as the photoconductive semiconductor layer that constitutes the photoelectric conversion unit 3, the transfer switch 5a, and the discharge switch 5b.
A film is used, and a silicon nitride film (SiNH) by glow discharge is used as an insulating layer.

In addition, in FIG. 5, in order to avoid complexity, only upper and lower electrode wirings are shown, and the photoconductive semiconductor layer and the insulating layer are not shown. The photoconductive semiconductor layer and the insulating layer are formed on the photoelectric conversion unit 3, the charge storage unit 4, the transfer switch 5a and the discharge switch 5b, and also between the upper electrode wiring and the substrate. There is. A further at the interface between the upper electrode wiring and the photoconductive semiconductor layer doped with n ⁺
-SiH layer is formed and ohmic contact is established.

Further, in the wiring pattern of the line sensor of the present embodiment, all signal paths output from each photoelectric conversion unit are wired so as not to intersect with other wirings, and crosstalk between each signal component and gate electrode wiring It prevents the generation of induction noise from the.

FIG. 15 shows a partial plan view of the lead wire 23 shown in FIG.

In the figure, a ground pattern 28 is arranged between the lead lines 23 of adjacent blocks. With this ground pattern 28, crosstalk due to capacitive coupling between adjacent lead lines can be avoided. The line capacitance generated between the lead wire 23 and the ground pattern 28 operates as a part of the load capacitor. Due to the difference in capacitance due to the difference in the length of the lead wire of each block, the effective capacitance of the load capacitor in each block is made constant by adjusting the area of the load capacitor 26. Reference numeral 29 is a lead terminal connected to the lead wire 23.

In the circuit configuration of the present embodiment, the matrix wiring is performed on the gate electrode side of the switch section, and the source electrodes of the transfer switches in each block are integrated into one, but the embodiment of the present invention has this circuit configuration. The present invention is not limited to this, and can be applied to various circuit configurations such as a configuration in which matrix wiring is provided on the source electrode side.

6 is a partial vertical sectional view of FIG. 5, FIG. 6 (a) is an AA ′ sectional view, and FIG. 6 (b) is a BB ′ sectional view.
FIG. 7C is a sectional view taken along the line CC ′.

FIG. 6 (a) is a vertical cross-sectional view of the photoelectric conversion section 3, 8'is a lower layer electrode wiring connected to the gate electrode of the transfer switch 5a, 9 is an insulating layer, 10 is a photoconductive semiconductor layer, and 12 is a photoconductive semiconductor layer. Reference numerals 13 denote upper layer electrode wirings. The incident light changes the conductivity of the a-Si: H photoconductive semiconductor layer 10 and changes the current flowing between the upper layer electrode wirings 12 and 13 facing each other in a comb shape.

FIG. 6B is a vertical cross-sectional view of the charge storage portion 4, which includes the lower electrode wiring 7, the insulating layer 9 and the photoconductive semiconductor layer 10 formed on the lower electrode wiring 7. Dielectric of
The upper layer electrode wiring 13 is formed on the photoconductive semiconductor layer 10. The structure of this charge storage unit 4 is the so-called MIS
It has the same structure as a capacitor (Metal-Insulator-Semiconductor). Both positive and negative bias conditions can be used, but stable capacitance and frequency characteristics can be obtained by using the lower electrode wiring 7 in a state of always being negatively biased.

FIG. 6 (c) shows a transfer switch 5a and a discharge switch 5b.
The transfer switch 5a includes a lower electrode wiring 8 serving as a gate electrode, an insulating layer 9 forming a gate insulating layer, and
Photoconductive semiconductor layer 10 and upper electrode wiring 14 as a source electrode
And an upper electrode wiring 13 which is a drain electrode. The gate insulating layer and the photoconductive semiconductor layer of the discharge switch 5b are the same layers as the insulating layer 9 and the photoconductive semiconductor layer 10, the source electrode is the upper layer electrode wiring 13, the gate electrode is the lower layer electrode wiring 8, and the drain. The electrode is the upper layer electrode wiring 14. The transfer switch 5a and the discharge switch 5b form a thin film field effect transistor (TFT).

As described above, the n ⁺ layer of a-Si: H is present at the interface between the upper electrode wirings 13 and 14 and the photoconductive semiconductor layer 10 to form ohmic contact.

The upper part of the TFT is usually a passivation film (SiNH, SiO
₂ , silicon-based, organic resin, etc. are formed, but
It is not shown in FIG.

As described above, in the line sensor according to the present invention, the photoelectric conversion section, the accumulated charge section, the transfer switch, the discharge switch, and the wiring section formed in the matrix are all composed of the photoconductive semiconductor layer and the insulating layer. Since it has a laminated structure, each part can be formed simultaneously by the same process.

Next, a method of manufacturing the line sensor according to the present invention will be described.

First, as a first embodiment, a method of manufacturing the line sensor shown in FIG. 1 will be described.

7 (a) to 7 (e) are partial vertical cross-sectional views showing the respective manufacturing steps of the line sensor of this embodiment.

First, as shown in FIG. 7 (a), Al / Cr was formed on the cleaned glass substrate having good flatness by the vacuum deposition method.
Is deposited to a thickness of 0.1 μm. A resist pattern is formed by photolithography and wet etching is performed to form lower layer electrode wirings 6, 7, 8 on the wiring portion 2, charge storage portion 4, and transfer switch portion which is a switch portion 5 formed in a matrix.

Next, as shown in FIG. 7 (b), an insulating layer 9 made of silicon nitride is formed on a glass substrate by RF glow discharge using SiH ₄ gas and NH ₃ gas or N ₂ gas as a raw material by a plasma CVD method. Deposit to a thickness of 0.3 μm. Subsequently, a photoconductive semiconductor layer 10 which is an amorphous silicon intrinsic layer is similarly deposited to a thickness of 0.1 to 1 μm using SiH ₄ gas as a raw material. Subsequently, an n ⁺ layer 15 which is an ohmic contact layer is similarly deposited to a thickness of 0.1 μm using SiH ₄ gas and PH ₃ gas as raw materials.

Next, as shown in FIG. 7 (c), a resist pattern is formed by photolithography, and dry etching using CF ₄ gas is performed to partially expose the n ⁺ layer, the photoconductive semiconductor layer, and the insulating layer. Is removed to form a contact hole 16. At this time, selective etching of the n ⁺ layer, the photoconductive semiconductor layer, and the insulating layer is not necessary.

Next, as shown in FIG. 7 (d), Al is deposited by a vacuum deposition method.
/ Cr is deposited to a thickness of 1.0 to 1.5 μm. Then, a resist pattern is formed by photolithography and wet etching is performed to partially remove the Al / Cr and n ⁺ layers to form upper layer electrode wirings 12, 12 ', 13, 14. At this time, the lower layer electrode wiring 6 and the upper layer electrode wiring 12 of the wiring portion 2 formed in the matrix are electrically connected through the contact holes 16. In addition, the gap of the photoelectric conversion unit 3 and the switch unit 5
A channel of the barrel transfer transistor portion is formed.

Next, as shown in FIG. 7 (e), a resist pattern is formed by photolithography, and dry etching using CF ₄ gas is performed to partially expose the n ⁺ layer, the photoconductive semiconductor layer, and the insulating layer. Then, the respective elements that have been electrically connected through the photoconductive semiconductor layer until now are independently separated, and are electrically connected only by necessary electrode wiring.

Next, a line sensor is manufactured by forming a passivation film (not shown) with silicon nitride or organic resin.

Next, a second embodiment of the present invention will be described.

FIG. 8 is a partial plan view showing a second embodiment of the line sensor according to the present invention. FIG. 10 is a partial vertical sectional view thereof.

The line sensor of this embodiment emits light from the substrate 1 side,
This is a so-called lensless type photoelectric conversion device in which the photoelectric conversion unit 3 directly reads the reflected light of the original brought into contact with the photoelectric conversion unit 3.

The photoelectric conversion unit 3 is provided with a light blocking layer 17 that blocks the illumination light incident from the substrate side. Further, an illumination window 27 for illuminating the original is provided.

9 is a partial vertical sectional view of FIG. 8, FIG. 9 (a) is a DD 'sectional view, and FIG. 9 (b) is an EE' sectional view.

As shown in FIG. 9A, the illumination window 27 has the upper electrode wiring 12
A part of the inside is opened. This lighting window 27
May be formed by lower layer electrode wiring.

As shown in FIG. 9B, the light shielding layer 17 is formed by the lower electrode wiring. A negative bias voltage is usually applied to the light shielding layer 17 and the dark current is controlled to be sufficiently small.

The line sensor of the second embodiment is also shown in FIGS. 7 (a) to 7 (e).
The line sensor is manufactured by the method for manufacturing the line sensor according to the first embodiment described above. However, in order to provide the light shielding layer 17 in FIG. 10, when forming the lower layer electrodes 6, 7, 8 shown in FIG. 7 (a), the light shielding layer 17 is simultaneously formed by the same material and the same processing method. .

Next, as a third embodiment of the present invention, a configuration example in which the pattern shapes of the lower layer electrode and the upper layer electrode of the first embodiment are exchanged will be described. The transfer transistor in the first embodiment is a so-called lower gate stagger type thin film transistor, and this embodiment is a so-called upper gate stagger type thin film transistor.

11 (a) to 11 (e) are partial vertical cross-sectional views showing respective manufacturing steps of the line sensor of this embodiment. First, the sectional structure of the present embodiment will be described with reference to FIG. 11 (e).

In FIG. 11 (e), the lower layer electrode wiring 6 of the wiring portion 2, the lower layer electrode wiring 7 of the charge storage portion 4, and the lower layer electrode wiring 8 of the switch portion 5 are formed on the substrate 1. An n ⁺ layer 15 which is an ohmic contact layer is formed on the wirings 6, 7, and 8. A photoconductive semiconductor layer 10 is formed on the n ⁺ layer 15 and between the lower layer electrodes of the photoelectric conversion section 3 and the switch section 5, and an insulating layer 9 and upper layer electrode wirings 12, 13 and 14 are laminated and formed. Has been done. In the switch portion 5, the upper layer electrode wiring 14 serves as a gate electrode, the lower layer electrode wiring 8 serves as a source electrode, and one end of the lower layer electrode wiring 7 serves as a drain electrode.

When the photoelectric conversion unit 3 is irradiated with light, a current flows from the photoelectric conversion unit 3 to the charge storage unit 4 through the lower electrode wiring 7 due to the photoconductive effect, and the charges are stored. The charge storage portion 4 is formed of the lower layer electrode wiring 7, the n ⁺ layer 15, the photoconductive semiconductor layer 10, the insulating layer 9 and the upper layer electrode 13 as in the first embodiment. The accumulated charge is turned on / off by the upper electrode 14, that is, the gate electrode of the transfer transistor portion, which is the switch portion 5, by the signal sequentially sent from the wiring portion 2 formed in the matrix, and thereby the photoconductive semiconductor layer 10 and the lower electrode 8 through which it is transferred for sequential reading.

Hereinafter, a method for manufacturing the above line sensor will be described.

First, as shown in FIG. 11 (a), Al / Cr is deposited to a thickness of 0.1 μm on a cleaned glass substrate having good flatness by a vacuum deposition method. Further, using the plasma CVD method, the n ⁺ layer 15 which is an ohmic contact layer is deposited to 0.1 μm by RF glow discharge using SiH ₄ gas and PH ₃ gas as raw materials. After that, a resist pattern is formed by photolithography, and wet etching is performed to form the wiring section 2, charge storage section 4, lower electrode wiring 6, 7, 8 and n ⁺ layer 15 in the transfer switch section, which is a switch section. To form.

Next, as shown in FIG. 11 (b), a photoconductive semiconductor layer 10 which is an amorphous silicon intrinsic layer is formed on the glass substrate by RF glow discharge using SiH ₄ gas as a raw material by the plasma CVD method. Deposit 0.1 to 1 μm thick. Then SiH ₄
An insulating layer 9 made of silicon nitride is similarly deposited to a thickness of 0.3 using gas and NH ₃ gas or N ₂ gas as raw materials.

Next, as shown in FIG. 11 (c), a resist pattern is formed by photolithography, and dry etching is performed using CF ₄ gas to partially remove the insulating layer, photoconductive semiconductor layer, and n ⁺ layer. Then, the contact hole 16 is formed. At this time, selective etching of the insulating layer, the photoconductive semiconductor layer, and the n ⁺ layer is not necessary.

Next, as shown in FIG. 11 (d), Al is deposited by a vacuum deposition method.
/ Cr is deposited to a thickness of 1.0 to 2.0 μm. Then, a resist pattern is formed by photolithography, wet etching is performed to partially remove Al / Cr, and the upper layer electrode 12,
Form 13,14. At this time, the lower layer electrode wiring 6 and the upper layer electrode wiring 12 of the wiring portion 2 formed in the matrix are electrically connected through the contact holes 16. Switch part 5
In the barrel transfer transistor portion, the upper electrode wiring 14 serves as a gate electrode.

Next, as shown in FIG. 11 (e), a resist pattern is formed by photolithography, and dry etching using CF ₄ gas is performed to partially remove the insulating layer, the photoconductive semiconductor layer, and the n ⁺ layer. After that, each element that has been electrically connected through the photoconductive semiconductor layer until now is made independent, and electrical connection is made only by necessary electrode wiring. By the above manufacturing process,
A line sensor is manufactured.

It is desirable that the electric characteristic distributions of the photoelectric conversion unit, the charge storage unit, and the switch unit of the line sensor arranged in an array are uniform in performing electric driving, and the insulating layer and the photoconductive semiconductor layer film are formed. Since the thickness distribution is greatly related to the characteristic distribution, it is desired that the film thickness distribution be uniform.

In this embodiment, the film thicknesses of the insulating layer and the photoconductive semiconductor layer are determined at the time of film deposition (FIG. 11 (b)), and subsequent fabrication steps (FIG. 11 (c), (d), ( In e)), the film thickness does not change. Therefore, if a deposition condition with a good film thickness distribution is required, the uniformity of the electrical characteristic distribution is improved, and a line sensor with excellent uniformity can be easily manufactured.

Next, a fourth embodiment of the present invention will be described.

FIG. 12 is a partial vertical sectional view showing the structure of the line sensor of the fourth embodiment.

In this embodiment, a light shielding layer is provided on the upper layer of the photoelectric conversion unit 3 of the third embodiment.
This is a so-called lensless type line sensor having a structure in which 12 'is provided, and light is incident from the front surface side of the substrate element and the reflected light from the original document brought into contact with the rear surface side of the substrate is directly read by the photoelectric conversion unit. The illumination light illuminates the original from the surface side where the substrate element is manufactured. At this time, the light shielding layer 12 'prevents the illumination light from entering the photoconductive semiconductor layer of the photoelectric conversion unit 3 and prevents the generation of noise current.

The manufacturing process for manufacturing the line sensor of the fourth embodiment is the same as that of the third embodiment described above. However, in order to provide the light shielding layer 12 ', the upper layer electrode wirings 12,1 shown in FIG.
When forming the layers 3 and 14, the light shielding layer 12 'is also made of the same material,
It is formed by the same processing method.

As shown in FIG. 12, the light shielding layer 12 'is provided on the photoelectric conversion portion, and when a bias voltage (usually a negative voltage) is applied, it is possible to control the dark current to be sufficiently small. Have. The light shielding layer 12 ′ may be provided not in the upper layer part of the photoelectric conversion part 2 but in the unit housing part to which the present line sensor is fixed so that the irradiation light does not enter the photoelectric conversion part. However, in this case, it is necessary to align the light shielding layer of the unit housing with the line sensor.

Generally, in the lensless type line sensor, it is necessary to arrange the document near the photoelectric conversion unit 3, and in this embodiment, the document is arranged on the back surface of the substrate 1. A glass substrate is generally used as the substrate 1, but the glass substrate has excellent optical characteristics and abrasion resistance, and can be used as a spacer for fixing the positional relationship between the photoelectric conversion unit 2 and the original.
That is, in this embodiment, by appropriately designing the thickness of the substrate, the incident angle of the illumination light, etc., a lensless type line sensor can be manufactured without requiring any special member. Further, in this embodiment, since the photoelectric conversion unit is provided on the substrate, only two smooth interfaces, that is, the interface between the document surface and the substrate surface and the interface between the substrate surface and the photoelectric conversion unit are reflected from the document. Because light does not pass,
Optical design becomes very easy.

In addition to the above-described embodiments, the present invention may have an element structure in which the photoconductive semiconductor layer, which is important for the characteristics of the photoelectric conversion section and the switch section, is protected from damage, contamination, etc. during manufacturing.

The configuration and manufacturing process will be described below with reference to the fifth and sixth embodiments.

In the fifth embodiment, an insulating layer made of silicon nitride is formed in place of the n ⁺ layer of the first embodiment, and then this silicon nitride is opened, and the photoconductive semiconductor layer and the upper electrode wiring are formed through this opening. Is configured to obtain electrical continuity.

FIGS. 13A to 13E are partial vertical cross-sectional views showing the manufacturing process of the line sensor.

First, as shown in FIG. 13 (a), Al / Cr is deposited to a thickness of 0.1 μm on a cleaned glass substrate having good flatness by a vacuum deposition method. A resist pattern is formed by photolithography, and wet etching is performed to form the wiring section 2, the charge storage section 4, and the lower layer electrode wiring 6, 7, 8 in the transfer switch section, which is the switch section 5, forming a matrix.

Next, as shown in FIG. 13 (b), an insulating layer made of silicon nitride is formed on a glass substrate by RF glow discharge using a plasma CVD method and SiH ₄ gas and NH ₃ gas or N ₂ gas as raw materials. 9a is deposited to a thickness of 0.3 μm. Subsequently, a photoconductive semiconductor layer 10 which is also an amorphous silicon intrinsic layer is deposited to a thickness of 0.1 to 1 μm using SiH ₄ gas as a raw material. Subsequently, the insulating layer 9b made of silicon nitride is deposited to a thickness of 0.3 using SiH ₄ gas and NH ₃ gas or N ₂ gas as a raw material.

Next, as shown in FIG. 13 (c), a resist pattern is formed by photolithography and dry etching using CF ₄ gas is performed to form an opening in the silicon nitride 9b. Next, using SiH ₄ and PH ₃ as raw materials, an n ⁺ layer 15 that is an ohmic contact layer is deposited to a thickness of 0.1 μm.

Next, as shown in FIG. 13 (d), a resist pattern is formed by photolithography, and dry etching using CF ₄ gas is performed to partially remove the n ⁺ layer, the insulating layer, and the photoconductive semiconductor layer. Then, the contact hole 16 is formed. At this time, selective etching of the n ⁺ layer, the insulating layer, and the photoconductive semiconductor layer is not necessary. Next, Al / Cr was removed by vacuum deposition.
Deposit to a thickness of 1.0 to 1.5 μm. After that, a resist pattern is formed by photolithography and wet etching is performed to partially remove the Al / Cr and n ⁺ layers to form upper layer electrode wirings 12, 13, and 14. At this time, the lower layer electrode wiring 6 and the upper layer electrode wiring 12 of the wiring portion 2 formed in the matrix are electrically connected through the contact holes 16. Further, a gap of the photoelectric conversion unit 3 and a channel of the transfer transistor unit which is the switch unit 5 are formed.

Next, as shown in FIG. 13 (e), a resist pattern is formed by photolithography and dry etching using CF ₄ gas is performed to partially remove the n ⁺ layer, the photoconductive semiconductor layer, and the insulating layer. After removal, each element that has been electrically connected through the photoconductive semiconductor layer until then is made independent, and electrical connection is made only with necessary electrode wiring.

Next, a line sensor is manufactured by forming a passivation film (not shown) with silicon nitride, an organic resin, or the like.

It is desirable that the electric characteristic distributions of the photoelectric conversion unit and the switch unit of the line sensor provided in an array are uniform,
In the case of the present embodiment, the characteristic distribution may be controlled only by the film thickness distribution during film formation. That is, in this embodiment, the important gap portion and channel portion in the photoelectric conversion portion and the switch portion are protected by the insulating layer formed in the film forming step, and the structure is not affected in the subsequent steps. ing. Further, since the films are continuously formed, the interface between the semiconductor layer and the insulating layer can be prevented from being contaminated by impurities or the like. Furthermore, because the photoconductive semiconductor layer is already covered with the insulating layer,
It also has an advantage that the material of the final passivation film can be selected from a wide range.

Next, a sixth embodiment will be described.

The sixth embodiment has a configuration in which a light shielding layer 17 is provided in the lower layer portion of the photoelectric conversion unit 3 of the fifth embodiment described above, and light from the original is incident from the substrate side and brought into contact with the surface of the photoelectric conversion unit. This is a so-called lensless type line sensor in which the photoelectric conversion unit directly reads the reflected light.

FIG. 14 is a partial vertical cross-sectional view of a structural example of the sixth embodiment.

As shown in FIG. 14, the illumination light enters the document from the substrate side.

The manufacturing process for manufacturing the sixth embodiment is the same as that of the fifth embodiment described above. However, the light shielding layer 17 is formed at the same time by the same material and the same processing method when forming the lower layer electrode wirings 6, 7, 8 shown in FIG.

In the present embodiment, the second embodiment, and the fourth embodiment, the incident light to the photoelectric conversion portion enters from above, and therefore, the upper side interface in the photoconductive semiconductor layer especially in the gap portion of the photoelectric conversion portion. The state will affect the photoelectric conversion characteristics. In this embodiment, since the interface of the gap portion is formed by continuous film formation and is protected by the insulating layer in the subsequent steps, compared with the case where the gap portion is formed by using an etching process, for example. Further, stable characteristics can be obtained without being easily affected by contamination by impurities.
Further, similarly to the fifth embodiment described above, since the photoconductive semiconductor layer is already covered with the insulating layer, the material of the final passivation film can be selected from a wide range. .

[Effects of the Invention] As described in detail above, according to the method for manufacturing a photoelectric conversion device of the present invention, a plurality of elements having a photoelectric conversion unit, a signal storage unit, and a transistor unit for signal transfer are provided on the same substrate. In the provided method for manufacturing a photoelectric conversion device, after insulating films, semiconductor films, and ohmic contact films are laminated in this order or vice versa, these films are patterned in the same step to form each element. By separating into
It is possible to prevent the deterioration of the insulating layer in the manufacturing process such as the etching process, and to significantly reduce short-circuit defects at the charge storage part and the upper and lower wiring intersections, the variation in capacitance, the insulation deterioration at the electrode wiring intersections, etc. It is possible to improve the sex.

In addition, since each component of the photoelectric conversion device can be formed at the same time, manufacturing steps such as film formation and element formation process can be simplified, and further, since each component has the same basic configuration, it can be integrated. Therefore, a small-sized photoelectric conversion device can be provided. As a result of these, the cost can be reduced and a photoelectric conversion device having a high degree of freedom in setting can be provided.

In the present invention, when the photoelectric conversion device is provided with a wiring portion having a laminated structure of a plurality of layers, after the insulating layer and the photoconductive semiconductor layer provided on the insulating layer are laminated and formed, By patterning the photoconductive semiconductor and using it as an interlayer insulating layer, the interlayer insulating layer can be formed in the same step as the step of forming the photoelectric conversion section, the charge storage section, and the switch section.

[Brief description of drawings]

FIG. 1 is a partial vertical sectional view of an embodiment of a line sensor according to the present invention. FIG. 2 shows an equivalent circuit of a line sensor having a matrix switch array. FIG. 3 is a timing chart showing the operation of the line sensor. FIG. 4 shows a perspective view of the line sensor. FIG. 5 shows a partial plan view of the line sensor. FIG. 6 is a partial vertical sectional view of FIG. FIG. 7 is a partial vertical sectional view showing each manufacturing process of the above line sensor. FIG. 8 is a partial plan view showing a second embodiment of the line sensor according to the present invention. FIG. 9 is a partial vertical sectional view of FIG. FIG. 10 is a partial vertical sectional view of the partial plan view shown in FIG. 11 (a) to 11 (e) are partial vertical sectional views showing respective manufacturing steps of the above line sensor. FIG. 12 is a partial vertical sectional view showing the configuration of the line sensor. FIGS. 13A to 13E are partial vertical cross-sectional views showing the manufacturing process of the line sensor. FIG. 14 is a partial vertical cross-sectional view of a structural example of the sixth embodiment. FIG. 15 shows a partial plan view of the lead wire 23 shown in FIG. FIG. 16 is a partial vertical cross-sectional view of a configuration example of a conventional line sensor. 1 ... Substrate 2 ... Wiring part 3 ... Photoelectric conversion part 4 ... Charge storage part 5 ... Switch part 6,7,8 ... Lower layer electrode wiring 9 ... Insulating layer 10 ... Photoconductive semiconductor layer 12 , 12 ′, 13,14 …… Upper layer electrode wiring

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Nobuko Kitahara 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Hideyuki Suzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Incorporated (56) Reference JP 56-138968 (JP, A) JP 57-30882 (JP, A) JP 60-91666 (JP, A)

Claims (2)

[Claims] 1. A method of manufacturing a photoelectric conversion device comprising a plurality of elements having a photoelectric conversion unit, a signal storage unit, and a transistor unit for signal transfer provided on the same substrate, wherein a lower portion of the signal storage unit is provided on the substrate. Forming an electrode and a gate electrode of the transistor portion, forming an insulating film covering the lower electrode and the gate electrode, forming a semiconductor film on the insulating film, and forming a semiconductor film on the semiconductor film A step of forming a film for ohmic contact on the electrode, an electrode for forming a light receiving part of the photoelectric conversion part on the film for ohmic contact, an upper electrode of the signal storage part, and a source / drain electrode of the transistor part. And forming the ohmic contact film, the semiconductor film, and the insulating film in the same step to separate the elements. A method for manufacturing a photoelectric conversion device, comprising: 2. A method of manufacturing a photoelectric conversion device, wherein a plurality of elements having a photoelectric conversion part, a signal storage part, and a transistor part for signal transfer are provided on the same substrate, wherein a pair of the photoelectric conversion parts are provided on the substrate. Forming a film for ohmic contact on the pair of electrodes, the lower electrode, and the source / drain electrodes, and the step of forming the electrode, the lower electrode of the signal storage unit, and the source / drain electrodes of the transistor unit. A step of forming, a step of forming a semiconductor film on the ohmic contact film, a step of forming an insulating film on the semiconductor film, and an upper electrode of the signal storage part and the transistor part on the insulating film. And a step of forming a gate electrode of the device, the insulating film, the semiconductor film, and the film for ohmic contact are patterned in the same process. A method for manufacturing a photoelectric conversion device, characterized by comprising: