JPH07120808B2 - Varactor diode manufacturing method - Google Patents
Varactor diode manufacturing methodInfo
- Publication number
- JPH07120808B2 JPH07120808B2 JP61129580A JP12958086A JPH07120808B2 JP H07120808 B2 JPH07120808 B2 JP H07120808B2 JP 61129580 A JP61129580 A JP 61129580A JP 12958086 A JP12958086 A JP 12958086A JP H07120808 B2 JPH07120808 B2 JP H07120808B2
- Authority
- JP
- Japan
- Prior art keywords
- electron concentration
- epitaxial layer
- substrate
- varactor diode
- junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特にバラクター
ダイオードの製造方法に関する。The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a varactor diode.
バラクタダイオードは第2図に示すように低比抵抗基板
9の上に例えば気相成長法により基板と同導電型のエピ
タキシャル層10及び基板と逆導電型のエピタキシャル層
11を順次成長させこのエピタキシャル層11の上に金属層
12を蒸着法により形成し、PR法及び化学的蝕刻法により
メサ部13を形成することによりp−n接合を形成しこの
接合にかける逆方向電圧による空乏層の厚さ即ち接合容
量の変化を利用している。素子の動作層となるエピタキ
シャル層10の電子濃度はそれが大きい程p−n接合に直
列な抵抗値が減少し素子の熱雑音の原因が減少すること
になるので好都合であるがその一方では接合の逆耐圧を
設計値に維持するためにはむしろ不都合な方向でありむ
やみに増大させることは出来ない。現状では動作層とな
るエピタキシャル層10の電子濃度が一定で3〜5×1015
cm-3の範囲にありエピタキシャル層厚として2.5〜3.5μ
mのものが使用されている。As shown in FIG. 2, the varactor diode is formed on the low resistivity substrate 9 by, for example, vapor phase epitaxy, an epitaxial layer 10 of the same conductivity type as the substrate and an epitaxial layer of the opposite conductivity type to the substrate.
11 are sequentially grown and a metal layer is formed on the epitaxial layer 11.
12 is formed by a vapor deposition method, and a mesa portion 13 is formed by a PR method and a chemical etching method to form a pn junction, and a change in the thickness of the depletion layer, that is, the junction capacitance due to the reverse voltage applied to this junction is changed. We are using. The higher the electron concentration of the epitaxial layer 10 which is the operating layer of the device, the smaller the resistance value in series with the pn junction, and the more the cause of the thermal noise of the device is reduced. It is rather inconvenient to maintain the reverse withstand voltage at the design value and cannot be increased unnecessarily. At present, the electron concentration of the epitaxial layer 10, which is the operating layer, is constant at 3 to 5 × 10 15
cm in the range of -3 2.5 to 3 as an epitaxial layer thickness. 5 mu
m is used.
パラクタダイオードが接合容量の逆バイアスによる変化
を利用することからこの容量の変化幅が大きい程変化す
る周波数巾が大きくなるため例えばこの素子を用いてつ
くられるマイクロ波帯で使用されるチューナの特性が向
上する。Since the varactor diode uses the change in the junction capacitance due to reverse bias, the larger the change width of this capacitance, the larger the changing frequency width.For example, the characteristics of the tuner used in the microwave band made by using this element improves.
この容量の変化幅を大きくするためにはエピタキシャル
層10の電子濃度を深さ方向に対して一定ではなく表面か
ら基板との界面に近づくに従い減少する様にすればよ
い。In order to increase the change width of the capacitance, the electron concentration of the epitaxial layer 10 may not be constant in the depth direction but may be decreased as the surface approaches the interface with the substrate.
この電子濃度の傾斜の程度はそれがあまり大きすぎると
動作層10と基板9との界面の電子濃度が減少し従ってシ
リーズ抵抗の増大をもたらすからゆるやかな傾斜を持つ
ことが必要である。If the gradient of the electron concentration is too large, the electron concentration at the interface between the operating layer 10 and the substrate 9 is reduced, and thus the series resistance is increased. Therefore, it is necessary to have a gentle gradient.
このように電子濃度分布に傾斜をつけるためにはドーピ
ングガスの流量を少しづつ増加させながらエピタキシャ
ル(動作)層を気相成長すればよいがこの制御は難しく
再現性にも問題があり又気相成長でP+層を形成すると高
濃度にできずシリーズ抵抗が大きくなるという欠点を持
つ。In order to obtain a gradient in the electron concentration distribution in this way, the epitaxial (operating) layer may be grown in vapor phase while gradually increasing the flow rate of the doping gas, but this control is difficult and there is a problem in reproducibility. If the P + layer is formed by growth, the concentration cannot be increased and the series resistance increases.
本発明はこの点に鑑み簡単な制御で再現性よく傾斜した
電子濃度分布を持つバラクターダイオードの製造方法を
提供するものである。In view of this point, the present invention provides a method for manufacturing a varactor diode having an electron concentration distribution inclined with good reproducibility by simple control.
本発明による方法は、N型の砒化ガリウム低比抵抗基板
上に前記N型であって前記基板よりも低電子濃度のエピ
タキシャル層を形成せしめ、このエピタキシャル層にシ
リコンのダブルチャージイオンを350kevのエネルギで打
込み、かかる打込んだシリコンイオンを活性化せしめ、
更に前記エピタキシャル層の表面よりP型を呈する不純
物を拡散してp−n接合を形成し、このp−n接合界面
から基板とエピタキシャル層との界面に向かって電子濃
度がなだらかに減少する電子濃度分布を持たせたことを
特徴とする。According to the method of the present invention, an N type epitaxial layer having a lower electron concentration than that of the N type gallium arsenide substrate is formed on the N type gallium arsenide low resistivity substrate. And activate the implanted silicon ions,
Further, P-type impurities are diffused from the surface of the epitaxial layer to form a pn junction, and the electron concentration is gradually decreased from the pn junction interface to the interface between the substrate and the epitaxial layer. It is characterized by having a distribution.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図(a)〜(f)に示すように2〜3×1018cm-3の
電子濃度を有する低比抵抗砒化ガリウム基板1上に2.5
〜3.5μmの層厚で3〜5×1015cm-3の電子濃度を有す
るエピタキシャル層2を形成しこれにシリコンのダブル
チャージイオンを350kevで1013cm-2打ち込みイオン注入
層3を形成しこの半導体基板上をSiO2膜4で覆い800℃
の温度で20分間アニールを行ない次にSiO2膜を化学的に
エッチングした後石英管による真空封止を行い閉管法に
よりZnを620℃で60分ほど拡散して拡散層5を形成す
る。次に蒸着法により電極6及び電極7を形成した後PR
法により化学的蝕刻を行いメサ部8を形成しCV測定法に
より電子濃度分布を測定したところ第3図の14に示した
結果が得られた。2. on the low resistivity gallium arsenide substrate 1 having an electron concentration of 2~3 × 10 18 cm -3, as shown in FIG. 1 (a) ~ (f) 5
To 3. 5 [mu] m layer 3-5 thick × 10 15 cm -3 in to form an epitaxial layer 2 having an electron concentration of double charge ions of the silicon at 350 kev 10 13 cm -2 implanted ion implanted layer 3 And cover this semiconductor substrate with a SiO 2 film 4 800 ℃
Annealing is carried out for 20 minutes at the temperature, then the SiO 2 film is chemically etched, vacuum sealed with a quartz tube, and Zn is diffused by a closed tube method at 620 ° C. for about 60 minutes to form a diffusion layer 5. Next, after forming the electrodes 6 and 7 by the vapor deposition method, PR
When the mesa portion 8 was formed by chemical etching by the method and the electron concentration distribution was measured by the CV measuring method, the result shown in FIG. 3 at 14 was obtained.
又、第3図の15は上記の方法でシリコンイオンを100kev
で5×1012cm-2打ち込んだときの電子濃度分布を示し
た。第3図の14は確かにバラクタダイオード用とに最適
な電子濃度の傾斜した分布をもつエピタキシャル層が得
られている。Further, 15 in FIG. 3 is 100 kev of silicon ion by the above method.
Shows the electron concentration distribution when 5 × 10 12 cm -2 is implanted. Reference numeral 14 in FIG. 3 shows that an epitaxial layer having a sloped distribution of electron concentration, which is optimum for a varactor diode, is obtained.
次に本発明による効果について述べる。まず第3図示す
様に低比抵抗基板上の3〜5×1015cm-3の一定な電子濃
度を有する試料16と本方法を実施しp−n接合部近傍で
の濃度がほぼ4〜6×1016cm-3で深くなるに従い電子濃
度がゆっくり減少する試料14及びp−n接合部近傍での
濃度がほぼ0.9〜1.0×1017cm-3で深くなるに従い電子濃
度が急激に減少する試料15を用意して接合容量の逆バイ
アス依存を測定した。第4図に示したのがその結果であ
る。Next, the effect of the present invention will be described. First, as shown in FIG. 3 , the sample 16 having a constant electron concentration of 3 to 5 × 10 15 cm -3 on the low resistivity substrate and this method were carried out, and the concentration in the vicinity of the pn junction was approximately 4 to 5. The electron concentration decreases slowly as it gets deeper at 6 × 10 16 cm -3. The concentration near the sample 14 and the pn junction is 0.9 to 1.0 × 10 17 cm -3 , and the electron concentration decreases sharply as it gets deeper. Sample 15 was prepared and the reverse bias dependence of the junction capacitance was measured. The result is shown in FIG.
本発明を実施して得た試料14では第4図の17に示すよう
に試料15での結果18に対してゆるやかなC−Vカーブを
示しており周波数−電圧の直線性が良い。試料14での結
果17は試料16での結果19に対しては容量変化比が大きく
周波数幅を広くとることができる。The sample 14 obtained by carrying out the present invention shows a gentle C-V curve with respect to the result 18 of the sample 15 as shown in 17 of FIG. 4, and the frequency-voltage linearity is good. The result 17 of the sample 14 has a larger capacitance change ratio and a wider frequency width than the result 19 of the sample 16.
又、第3図からわかるように試料14は試料15、試料16に
比べて全体的に電子濃度分布が高くシリーズ抵抗が小さ
く熱雑音の原因が減少するという効果もある。Further, as can be seen from FIG. 3, the sample 14 has an effect that the electron concentration distribution is higher overall, the series resistance is small, and the cause of the thermal noise is reduced as compared with the samples 15 and 16.
本発明の他の効果はシリコンのダブルチャージイオンを
注入する際エピタキシャル層を適当なマスク例えばフォ
トレジストや誘電体マスク等で部分的に覆うことにより
容易に任意の位置に選択的にC−Vカーブのゆるやかな
バラクターダイオードを形成することが可能であるとい
うことである。Another advantage of the present invention is that when the double-charged ions of silicon are implanted, the epitaxial layer is partially covered with an appropriate mask, such as a photoresist or a dielectric mask, so that the CV curve can be easily and selectively applied to an arbitrary position. That is, it is possible to form a gradual varactor diode.
このことは現在開発が進められている砒化ガリウム集積
回路を考えた場合従来の気相成長法では選択的に気相成
長することが難しいことと併せて考えると大きな長所で
ある。This is a great advantage when considering the gallium arsenide integrated circuit, which is currently being developed, together with the fact that it is difficult to selectively perform vapor phase growth by the conventional vapor phase growth method.
以上のとおり、本発明によれば、傾斜した電子濃度分布
を有するダイオードが制御性よく再現性よく製造され
る。As described above, according to the present invention, a diode having a tilted electron concentration distribution is manufactured with good controllability and reproducibility.
第1図(a)〜(f)は本発明の製造方法を示す断面
図、第2図は従来法によるバラクタダイオードの断面
図、第3図は電子濃度分布図、第4図は容量−逆バイア
ス特性である。 1,9……砒化ガリウム半導体基板、2,10……基板と同導
電型エピタキシャル層、3……イオン注入層、4……Si
O2、5,11……基板と逆導電型の拡散層、6,12……金属層
(表)、7……金属層(裏)、8,13……メサ部、14……
本発明による電子濃度分布、15……本発明同様の方法で
シリコンイオンを100kev,5×1012cm-2で注入した時の電
子濃度分布、16……一般的なバラクタダイオード(注入
なし)17……試料14による容量−逆バイアス特性、18…
…試料15による容量−逆バイアス特性、19……試料16に
よる容量−逆バイアス特性。1 (a) to 1 (f) are sectional views showing the manufacturing method of the present invention, FIG. 2 is a sectional view of a varactor diode according to a conventional method, FIG. 3 is an electron concentration distribution diagram, and FIG. It is a bias characteristic. 1,9 …… Gallium arsenide semiconductor substrate, 2,10 …… Epitaxial layer of the same conductivity type as the substrate, 3 …… Ion implantation layer, 4 …… Si
O 2 , 5, 11 …… Diffusion layer of the opposite conductivity type to the substrate, 6, 12 …… Metal layer (front), 7 …… Metal layer (back), 8, 13 …… Mesa part, 14 ……
Electron concentration distribution according to the present invention, 15 ... Electron concentration distribution when silicon ions are implanted at 100 kev , 5 × 10 12 cm -2 by the same method as the present invention, 16 ... General varactor diode (without implantation) 17 …… Capacitance-reverse bias characteristics of sample 14, 18…
... Capacity-reverse bias characteristics of sample 15; 19-Capacity-reverse bias characteristics of sample 16.
Claims (1)
N型であって前記基板よりも低電子濃度のエピタキシャ
ル層を形成せしめ、このエピタキシャル層にシリコンの
ダブルチャージイオンを350kevのエネルギで打込み、か
かる打込んだシリコンイオンを活性化せしめ、更に前記
エピタキシャル層の表面よりP型を呈する不純物を拡散
してp−n接合を形成し、このp−n接合界面から基板
とエピタキシャル層との界面に向かって電子濃度がなだ
らかに減少する電子濃度分布を持たせたことを特徴とす
るバラクタダイオードの製造方法。1. An N-type gallium arsenide low-resistivity substrate is formed with an N-type epitaxial layer having a lower electron concentration than that of the substrate, and silicon double charge ions are applied to the epitaxial layer at an energy of 350 kev. Implanting, activating the implanted silicon ions, diffusing impurities exhibiting P-type from the surface of the epitaxial layer to form a pn junction, and from this pn junction interface, the substrate and the epitaxial layer are formed. A method for manufacturing a varactor diode, which has an electron concentration distribution in which the electron concentration gradually decreases toward an interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61129580A JPH07120808B2 (en) | 1986-06-03 | 1986-06-03 | Varactor diode manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61129580A JPH07120808B2 (en) | 1986-06-03 | 1986-06-03 | Varactor diode manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62285476A JPS62285476A (en) | 1987-12-11 |
| JPH07120808B2 true JPH07120808B2 (en) | 1995-12-20 |
Family
ID=15012972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61129580A Expired - Fee Related JPH07120808B2 (en) | 1986-06-03 | 1986-06-03 | Varactor diode manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07120808B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01270277A (en) * | 1988-04-21 | 1989-10-27 | Nec Corp | Manufacture of gallium arsenide hyper abrupt varactor diode |
| JPH03227574A (en) * | 1990-02-01 | 1991-10-08 | Nec Corp | Manufacture of varactor diode |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53144277A (en) * | 1977-05-21 | 1978-12-15 | Hitachi Ltd | Semiconductor variable capacity diode |
| JPS60189270A (en) * | 1984-03-08 | 1985-09-26 | Nec Corp | Method for manufacturing compound semiconductor device |
-
1986
- 1986-06-03 JP JP61129580A patent/JPH07120808B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62285476A (en) | 1987-12-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |