JPH0712082B2 - Selective dope heterostructure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to an improvement in a selectively-doped hetero structure obtained by laminating a compound semiconductor crystal layer on a silicon (Si) substrate.
ransistor (HEMT), etc., which enables the selective doping heterostructure to be formed on the Si substrate and prevents the wafer from warping. Formed B _X Ga _1-X P (0 ≦ x <0.02
2) A buffer layer, GaAs _X P _1-X (0.7 <x <1) carrier transit layer, and one conductivity type B _X Ga _1-X (0 ≦ x <0.022) carrier supply layer are provided.

[Industrial application field]

The present invention relates to improvement of a selectively doped hetero structure obtained by stacking a compound semiconductor crystal layer on a Si substrate.

[Conventional technology]

In recent years, many attempts have been made to grow a compound semiconductor crystal layer on a Si substrate.

The reason is that, firstly, it is effective in increasing the area of a wafer in which a compound semiconductor device can be manufactured, reducing its weight, and reducing its price.

[Problems to be solved by the invention]

When manufacturing the above-mentioned wafer, specifically, Ga on the Si substrate
As layers are often formed. This is because GaAs is widely used in compound semiconductor devices.

However, GaAs has a lattice constant as large as 4% as compared to Si, and Si is an elemental crystal, whereas GaAs is GaAs.
It is very difficult to obtain a good quality GaAs layer by performing the above-mentioned growth due to the fact that it is an ionic crystal.

Various techniques have been proposed in an attempt to solve such a problem, and in any of them, the basis is to interpose an amorphous layer between a Si substrate and a GaAs layer. By adopting such a technique, it is possible to grow a crystal, but the influence due to the difference in the lattice constants as described above remains, the wafer is warped, and the wafer is exposed in the exposure process when manufacturing the semiconductor device. This causes a problem that the pattern to be formed is not precise.

The present invention is a high electron mobility transistor (high electron mobility transistor).
mobility selective transistor (HEMT) etc., it becomes possible to form a selectively doped heterostructure on a Si substrate.
Moreover, the wafer is prevented from warping.

[Means for solving problems]

From a number of experiments conducted by the present inventor, when growing a compound semiconductor crystal layer on a Si substrate, using a III-V group compound semiconductor with a small difference in lattice constant and lattice constant is a factor that reduces the warp of the wafer. It has been determined that, and moreover, good results can be obtained by using GaP.

GaP has a smaller difference in lattice constant from Si, which is 3 × 10 ^−3, and no wafer warpage occurred even when grown to a thickness of about 1 μm.

Therefore, it is considered very preferable to form this GaP layer on the Si substrate to form a buffer layer.

Now, in the carrier transit layer, which is the most important in the selectively doped heterostructure, the mobility of the carrier must be high, and as described above, the carrier layer must be Ga as a buffer layer.
If P is used, it is better that the lattice constant difference with it is small.

The present inventors have found that GaAs _X P _1-X is a direct transition in the range of 0.7 <x <1, and the carrier mobility is GaAs in the range.
Noting that the GaAs _X P _1-X (0.7 <x <1) carrier transit layer is formed on the Si substrate via the GaP buffer layer,
When a GaP carrier supply layer was grown on each of them, a good selectively-doped heterostructure was obtained.
Moreover, the HEMT fabricated using the wafer showed characteristics comparable to those of AlGaAs / GaAs system using GaAs substrate.

Further, by adding a small amount of boron (B) to GaP used as the buffer layer to make B _X Ga _1-X P, and 0 <x <0.022, preferably 0.022, almost completely lattice-matched to Si. It is possible to

From the above, in the selectively-doped heterostructure according to the present invention, B _X Ga _1-X P sequentially formed on the Si substrate
(0 ≦ x <0.022) buffer layer and GaAs _X P _1-X (0.7 <x
<1) The carrier traveling layer and the one conductivity type B _X Ga _1-X P carrier supply layer are provided.

[Action]

By adopting the above means, selective doping on the Si substrate
Even though the hetero structure was formed, the wafer did not warp at all, and therefore, when a semiconductor device was manufactured using the wafer, a precise pattern was easily obtained, and a HEMT was manufactured. In this case, characteristics comparable to the case of using the AlGaAs / GaAs system formed on the GaAs substrate can be obtained.

〔Example〕

A case of forming a B _X Ga _1-X P / GaP-based selectively-doped heterostructure on a Si substrate will be exemplified.

(1) The Si substrate is heat-treated at a temperature of 800 ° C to 900 ° C to make the surface amorphous.

(2) Metalorganic chemical vapor deposition
By applying a vapor deposition (MOCVD) method, a B _X Ga _1-X P buffer layer having a thickness of, for example, about 5000 [Å] is grown. Here, x = 0.022.

In this case, B ₂ H ₆ , trimethylgallium (TMG: (CH ₃ ) ₃ Ga) and phosphine (PH ₃ ) are used as the source gas.

(3) Similarly, by applying the MOCVD method, a GaAs _X P _1-X electron transit layer having a thickness of, for example, 100 [Å] is grown.
In this case, x = 0.7.

In this case, TMG, PH _3, and arsine (AsH ₃ ) are used as the source gas.

(4) Similarly, by applying the MOCVD method, an n-type B _X Ga _1-X P electron supply layer having a thickness of, for example, about 400 [Å] is grown. Also in this case, x = 0.022.

In this case, as the source gas, monosilane (SiH ₄ ) for a dopant is used in addition to the case where the buffer layer is formed, and the impurity concentration is 1.4 × 10 ¹⁸ [m ⁻³ ].

In each of the above steps, hydrogen (H ₂ ) was used as the carrier gas.

The wafer thus obtained did not warp at all.

The figure represents an energy band diagram for a wafer manufactured as described above.

In the figure, E _C is the bottom of the conduction band, E _V is the top of the valence band, E _F is the Fermi level, 1 is the n-type B _X Ga _1-X P electron supply layer, and 2 is
GaAs _X P _1-X electron transit layer, 3 B _X Ga _1-X P buffer layer, 4 S
i substrate is shown respectively.

〔The invention's effect〕

In the selectively-doped heterostructure according to the present invention, a B _X Ga _1-X P buffer layer and a GaAs _X P P sequentially formed on a Si substrate
_{It is provided with a 1-X} carrier running layer and one conductivity type B _X Ga _1-X P carrier supply layer.

By adopting the above means, selective doping on the Si substrate
Although the wafer has a tehro structure, no warpage occurs on the wafer, so when a semiconductor device is manufactured using the wafer, a precise pattern can be easily obtained, and a HEMT is manufactured. In this case, characteristics comparable to the case of using the AlGaAs / GaAs system formed on the GaAs substrate can be obtained.

[Brief description of drawings]

The figure represents an energy band diagram of one embodiment of the present invention. In the figure, E _C is the bottom of the conduction band, E _V is the top of the valence band, E _F is the Fermi level, 1 is the n-type B _X Ga _1-X P electron supply layer, and 2 is
GaAs _X P _1-X electron transit layer, 3 B _X Ga _1-X P buffer layer, 4 S
i substrate is shown respectively.

Claims (1)

[Claims] 1. A B _X Ca _1-X P (0 ≦ x <0.022) buffer layer, a GaAs _X P _1-X (0.7 <x <1) carrier transit layer, and one conductivity type formed in this order on a Si substrate. A selectively doped heterostructure comprising a B _X Ga _1-X P (0 ≦ x <0.022) carrier supply layer.