JPH07121075B2 - Parabolic wave generation circuit - Google Patents

Description

The present invention relates to a parabola wave (quadratic curve) generating circuit used in a deflection circuit of a projection TV receiver or a TV receiver using a large-sized picture tube. Is.

(B) Prior Art A parabolic wave generating circuit capable of generating a parabolic wave is disclosed in Japanese Patent Laid-Open No. 61-125217. FIG. 2 is a circuit diagram showing the parabolic wave generation circuit described in FIG. 1 of the above publication, and includes a switch (1) which opens and closes in response to a vertical trigger pulse, a constant current source (2), and the constant current. Source (2)
A capacitor (3) that is charged according to a constant current from
It is composed of an integrating circuit (4) for integrating a signal generated at the upper end A of the capacitor (3) and an output terminal (5). When a vertical drive pulse as shown in FIG. 3 (a) is applied to the switch (1), the switch (1) is opened and closed accordingly, and a sawtooth wave as shown in FIG. can get.

Therefore, if the signal shown in FIG. 3B is integrated by the integrating circuit (4), a parabolic wave can be obtained at the output terminal (5).

By the way, as the integrating circuit of FIG. 2, an integrating circuit using a differential amplifier circuit is generally used, and the reference voltage thereof is the third
Average DC level of the signal in Figure (b) (a in Figure 3 (b))
Is set to. However, since the center time t ₁ of the sawtooth wave in FIG. 3B is later than the time t ₂ at which the average DC level and the sawtooth wave cross, the charge / discharge of the capacitor built in the integrating circuit is performed. There is a problem that the time does not match, and the time of the center of the sawtooth wave and the time of the center of the parabola wave do not match. Then, what solved such a problem is described in FIG. 3 of the said publication.

FIG. 5 is a circuit diagram showing a parabolic wave generation circuit described in FIG. 3 of the above publication, which includes a first switch (1) which opens and closes in response to a vertical trigger pulse, a constant current source (2), A capacitor (3) charged according to the constant current from the constant current source (2), a coupling capacitor (4), and an integrating circuit ( 5 )
And an output terminal (6) and a second switch (7) to obtain a parabolic wave at the output terminal (6). When a vertical trigger pulse such as that shown in FIG. 6A is applied to the first and second switches (1) and (7), the first switch ( 1) is opened and the second switch (7) is closed. Then, the capacitor (3) is charged, and the voltage at the upper end A of the capacitor (3) rises as shown in FIG. 6 (b). Further, since the first switch (1) is closed and the second switch (7) is opened during the "H" level period of FIG. 6 (a), the capacitor (3) is discharged and the upper end thereof is discharged. The voltage of A drops rapidly as shown in FIG. Since the voltage of the terminal (8) is at the ground level while the second switch (7) is open, a sawtooth wave as shown in FIG. 6 (c) is generated at the terminal (8). Then, the signal of FIG. 6 (c) is integrated by the integrator circuit ( 5 ). At that time, the signal waveform of FIG. 6 (c) has an upper area and a lower area with respect to the ground level. Since they are equal, a parabolic wave with good symmetry can be obtained at the output terminal (6) as shown in FIG.

(C) Problem to be Solved by the Invention However, the circuit of FIG. 5 requires the coupling capacitor (4) and cannot be constructed as a direct connection type, which is not suitable for use in an IC. Further, since the second switch (7) is directly inserted in the signal path, noise is generated during switching, which is a problem.

(D) Means for Solving the Problems The present invention has been made in view of the above points, and a sawtooth wave creating circuit that creates a sawtooth wave according to a vertical trigger pulse, and the sawtooth wave creating circuit. Of the output sawtooth wave to generate a parabolic wave, a differential integration circuit, a peak detection circuit for peak detection of the output sawtooth wave of the sawtooth wave creating circuit, and an output voltage of the peak detection circuit. And a discharge circuit for comparing with a reference voltage of a reference power source and discharging an electric charge charged in a capacitor in the peak detection circuit according to a difference between the reference voltage and the reference voltage, and the integration circuit according to an output voltage of the peak detection circuit. It is characterized in that the reference voltage of is set.

(E) Function According to the present invention, the sawtooth wave is subjected to peak detection, and the voltage corresponding to the peak detection output is used as the reference voltage of the integrating circuit. Therefore, a coupling capacitor or switch is not required in the signal path. It is possible to create a desired parabolic wave without having to do so. Further, according to the present invention, when the value of the peak detection output rises above a predetermined value, the charge stored in the capacitor in the peak detection circuit is discharged, so that the frequency of the input vertical trigger pulse increases. Even if there is such a change, it can respond immediately and an appropriate detection output can be obtained.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention. (6) is a control transistor (8) to which a vertical trigger pulse is applied to the base from an input terminal (7), and a constant current. A sawtooth wave generation circuit including a charge / discharge capacitor (10) supplied with a constant current from a source (9), (11) a first level shift circuit for level shifting the sawtooth wave generated at a point B, (12) ) Is a second level shift circuit for further level-shifting the level-shifted sawtooth wave from the first level shift circuit (11), and (13) is a transistor (23) together with the first level shift circuit (11). Capacitor for peak detection of the sawtooth wave, (14) is a third level shift circuit for level shifting the sawtooth wave, and (15) is a first built-in first level shift circuit (14). And a second resistor (16) and (17) Voltage divider circuit, ( 18 ) is a differential amplifier circuit (19)
And a capacitor (20) connected between the output terminal of the differential amplifier circuit (19) and the negative input terminal (-), and a resistor (21) having one end connected to the capacitor (20). An integrating circuit comprising: (40) a comparing circuit for comparing the voltage at the point C with the reference voltage of the reference power source (41); and (42) for the capacitor (13) according to the output signal of the comparing circuit (40). It is a discharge circuit that discharges the charge.

Next, the operation will be described. When a vertical trigger pulse as shown in FIG. 4 (a) is applied to the input terminal (7), the control transistor (8) is turned off during the "L" level period of the vertical trigger pulse, so that the constant current source ( The constant current from 9) flows into the charging / discharging capacitor (10), and the voltage at the upper end B of the charging / discharging capacitor (10) gradually rises. Further, since the control transistor (8) is turned on during the “H” level period of the vertical trigger pulse, the charge / discharge capacitor (1
0) discharges rapidly. Therefore, a sawtooth wave as shown in FIG. 4B is obtained at the point B, and the first level shift circuit (11) shifts the level by + 4V _BE (where V _BE is the forward voltage of the PN junction). The level-shifted sawtooth wave is
It is applied to the base of the transistor (22) in the level shift circuit (12) and is applied to the base of the transistor (23). Since the peak detection capacitor (13) is connected to the emitter of the transistor (23), the applied sawtooth wave is subjected to peak detection and converted into a DC voltage. Here, assuming that the maximum amplitude of the sawtooth wave at the point B is V _S , the voltage V _{(C) at the} point C becomes V _(C) = V _S + 3V _BE (1), and FIG. 4 (C) It is represented as the one-dot chain line C.

Also, at point D, which is the emitter of the transistor (22), -V
_{A BE} level-shifted sawtooth wave is obtained, and the maximum value V _(D) max of the amplitude of the sawtooth wave is V _(D) max = V _S + 3V _BE (2), and the maximum value V _D min Becomes V _D min = 3V _BE (3) and becomes like the solid line D in Fig. 4 (c).

The above-mentioned voltage obtained at the point C is − in the transistor (24).
After the V _BE level shift, it is divided by the voltage dividing circuit (15). When the resistance values of the first and second resistors (16) and (17) forming the voltage dividing circuit (15) are set equal, the voltage V _{(E) at the} point E becomes V _(E) = 1 / 2V _s + 2V _BE ...... (4), as shown by the solid line E in Fig. 4 (c). The voltage V
_{Since (E)} is further level-shifted by the transistor (25), the voltage V _{(F) at} point F becomes V _(F) = 1 / 2V _S + V _BE (5), which is shown in Fig. 4 (C). It becomes like the solid line F.

On the other hand, since the sawtooth wave obtained at the point D is shifted by −2V _BE level in the transistors (26) and (27), the voltage at the point G is
The maximum value V _G max of V _(G) is V _G max = V _S + V _BE …… (6), and the minimum value V _(G) min is V _(G) min ＝ V _BE …… (7) , As shown by a dotted line G in FIG.

Here, as is clear from the equations (5), (6) and (7), the solid line F in FIG. 4 (c) is exactly 1/2 of the amplitude of the dotted line G.

The sawtooth wave G of FIG. 4 (C) generated at the point G is applied to the negative input terminal (−) of the integrating circuit ( 18 ), and the voltage F of FIG. Applied to the positive input terminal (+). Therefore, 4 (c) a capacitor current flows in the direction shown in the capacitor (20) constituting the integrating circuit (18) during the period T ₁ of the (20) is charged, and the during the period T ₂ The capacitor (20) is discharged. Further, in the period T ₃ of FIG. 4C, the switch (28) is closed in response to the vertical trigger pulse of FIG. 4A, so that the integration operation is stopped. The slope of the sawtooth wave G in FIG. 4C is constant, and the voltage at the positive input terminal (+) of the differential amplifier circuit (19) is
Since it is half the amplitude of the sawtooth wave, the capacitor (2
The charge and discharge amount of 0) can be made the same.

Therefore, at the output terminal (29) of the integrating circuit ( 18 ), as shown in FIG. 4 (d), it is possible to obtain a parabolic wave whose peak coincides with time t when the capacitor (20) switches from charging to discharging. .

By the way, in the above description, the frequency of the vertical trigger pulse applied to the input terminal (7) is 60 Hz (in the case of the NTSC system) and the signal is of a regular frequency (hereinafter, referred to as synchronization). However, the frequency of the vertical trigger pulse is
There is a case where it changes when the channel is switched or when the power is turned on and becomes low (hereinafter referred to as asynchronous time). For example, in the asynchronous state when the power is turned on, the "L" level period of the vertical trigger pulse becomes long, and the amplitude of the sawtooth wave generated at the point B becomes larger than that at the time of synchronization. Then, the charging voltage of the capacitor (13) also rises accordingly. From this state, when the deflection circuit system becomes stable and is in the synchronous state, the large charged charge of the capacitor (13) is discharged because the discharge path is formed only at the base of the transistor (24). It took a long time, and it might take time to obtain a correct peak detection output. Generally, when such a problem occurs, a resistor is connected in parallel with the capacitor (13) so that desired discharge can be performed. However, in the peak detection circuit of FIG. 1, if the discharge current is large, a correct peak detection output cannot be obtained, and such a method cannot be used.

Therefore, in the present invention, paying attention to the point that the peak detection output at the time of non-synchronization is unnecessary, and when the charging voltage of the capacitor (13) becomes equal to or higher than the reference voltage of the reference power supply (41) of the comparison circuit (40), the discharge is performed. Drives the circuit (42) and the capacitor (1
The electric charge of 3) is automatically discharged, and even if the charging voltage becomes an excessive value, it is controlled so that it immediately becomes the predetermined value or less. FIG. 7 is a circuit diagram showing a specific circuit example thereof, in which (30) is a reference power source which generates a voltage equal to the maximum amplitude V _S of the sawtooth wave applied to the base of the transistor (23) at the time of synchronization, (31a ) To (31c) are diodes for level shifting the reference voltage of the reference power source (30), and (32) has a base connected to one end H of the diodes (31a) to (31c) and an emitter having a discharge resistor (33). ) Via point C
Is a discharge transistor connected to. The same circuit elements as those in FIG. 1 are designated by the same reference numerals.
Assuming now that they are in a synchronized state, the voltage at the point C, which is the upper end of the capacitor (13), is V ₃ +
It will be 3V _BE . Since the voltage at the point H is V _S + 3V _BE , the discharge transistor (32) is off. Therefore, the voltage at the point C is applied to the transistor (24) as it is. If the state is changed to the asynchronous state, the voltage at the point C rises while the transistor (23) is on. Then, the discharge transistor (32) is turned on, and the current from the emitter of the transistor (23) flows through the discharge resistor (33) and the discharge transistor (32). When the transistor (23) turns off, the capacitor (1
The charge stored in 3) flows through the discharge resistor (33) and the discharge transistor (32). Therefore, the voltage at the point C gradually decreases according to the time constants of the capacitor (13) and the discharge resistor (33) and decreases to the original value, that is, V _S + 3V _BE . Therefore, the normal peak detection output (V _S + 3V _BE ) can be applied to the base of the transistor (24) immediately after the next synchronization state, and the peak detection response can be improved. .

(G) Effect of the Invention As described above, according to the present invention, it is possible to create a parabolic wave having a good waveform symmetry without requiring a coupling capacitor or a switch in the signal path. Further, according to the present invention, an appropriate peak detection output can be immediately obtained even when the input vertical trigger pulse is switched from the asynchronous state to the synchronous state, so that it is possible at the time of power-on or channel switching. The desired parabolic wave can be created immediately.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional parabolic wave generating circuit, and FIGS. 3 (a) and 3 (b) are for explaining FIG. Waveform diagrams of FIGS. 4A to 4D are waveform diagrams for use in the description of FIG.
FIG. 5 is a circuit diagram showing a conventional parabola wave generation circuit, and FIG.
5 (a) to (d) are waveform diagrams for explaining FIG. 5, and FIG. 7 is a circuit diagram showing a specific circuit example of the present invention. (6) ... Sawtooth wave creating circuit, (11) ... First level shift circuit, (12) ... Second level shift circuit, (13) ... Detection capacitor, (14) ... Third level shift circuit, ( 18 )
… Integrator circuit.

Claims (4)

[Claims] 1. A sawtooth wave creating circuit that creates a sawtooth wave according to a vertical trigger pulse, and a differential integrating circuit that integrates the sawtooth wave output from the sawtooth wave creating circuit to generate a parabolic wave. And a peak detection circuit for peak-detecting the output sawtooth wave of the sawtooth wave generation circuit, and an output voltage of the peak detection circuit and a reference voltage of a reference power source are compared, and according to the difference, in the peak detection circuit And a discharge circuit for discharging the electric charge charged in the capacitor, wherein the reference voltage of the integration circuit is set according to the output voltage of the peak detection circuit. 2. The reference voltage of a reference power supply in the discharge circuit is set to a value equal to the output voltage of the peak detection circuit during synchronization (when a normal vertical trigger pulse is applied). The parabolic wave generation circuit according to item 1. 3. The discharge circuit comprises a PNP transistor having a base connected to a reference power source and an emitter connected to one end of a capacitor in the peak detection circuit through a resistor. The parabolic wave generation circuit according to the second item. 4. A voltage dividing circuit for dividing the output voltage of the peak detection circuit into halves and applying the divided voltage as a reference voltage to the integrating circuit. The parabolic wave generation circuit according to the third item.