JPH07123153B2 - Method for manufacturing lead frame for semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a lead frame for a semiconductor device, which is manufactured by pressing a striped plated strip, and particularly for a medium output and a large output for a regulator for a three-terminal IC. The present invention relates to a method for manufacturing a semiconductor device lead frame.

[Prior Art] Conventionally, as a method for manufacturing a lead frame for a semiconductor device by pressing a striped strip, particularly a method for manufacturing a medium output and a large output lead frame for a regulator for a three-terminal IC, FIG. ), (B) and (c), the striped strip to be used is a copper or copper alloy strip 1 which is entirely nickel-plated 3 on which a continuous portion is formed at predetermined positions in the longitudinal direction. Stripe plating (silver stripe plating 2) is applied, and a die bonding area and a wire bonding area are formed on this partial stripe plating strip as the same surface. FIG. 5 (c) is a perspective view of a strip plating strip used for arranging the lead frame in two strips on both sides.

At this time, silver plating is mainly used as the partial stripe plating in consideration of solderability and wire bonding.

FIG. 6 shows the stripe plating strips (a), (b),
The middle output regulator lead frame for 3-terminal IC manufactured by pressing using (c) etc. is shown.

FIG. 8 is a plan view of a large output regulator lead frame for a 6-terminal IC, FIG. 7 (a) is a side view of a stripe plating strip used for it, and FIG. 8 (b) is used for taking two lead frames on both sides. It is a perspective view of a strip plating strip. In FIG. 2 (b), reference numeral 4 is a striped copper alloy strip on which nickel plating 3 is applied over the entire surface, and a silver plated strip 2 is further arranged thereon.

[Problems to be Solved by the Invention] In the conventional manufacturing method, however, the stripe plating strips used are die-bonding areas and wire-bonding areas formed by the same silver-plated stripes, which are punched by press working. Since the lead frame was manufactured by the above method, it had the following problems.

That is, (1) The solder with pellets used at the time of die bonding flows out (transmits) through the same silver-plated surface,
A clean surface flows into the required wire bonding pad, making wire connection difficult. Due to manufacturing problems, it is necessary to support a part of the die bonding area where the pellets are attached by connecting it to the lead portion until the packaging is completed.

(2) Even if wire bonding is possible, when solder flows in, it alloys at high temperature and the connection becomes brittle, which makes the strength uneasy and lacks long-term reliability.

(3) In order to prevent the solder from flowing out, press working such as grooves and V notches is performed around the die bonding pad (see JP 58-44858 A, JP 60-4246 JP 60-99547 JP).
No. 60-103651, JP-A No. 60-103651). There is a limit to the processing because it must be contained within a certain range.

(4) The variation of the surface condition of the plated surface (size of crystal grains) immediately affects the solder flow, and in order to adjust the solder flow, the control factor of the plated crystal grains in the quality of the lead frame becomes large.

The object of the present invention is to solve the above-mentioned problems of the prior art, prevent the solder in the die bonding area from flowing to the wire bonding portion, and make the press working and wire connecting work easy and reliable, and to prevent the crystal grains on the plated surface It is an object of the present invention to provide a method for manufacturing a lead frame for a semiconductor device, which has high reliability and high manufacturing yield regardless of the size.

[Means for Solving the Problems] The gist of the present invention has, as stripe plating strips to be used, stripe plating for a die bonding area on which a silicon chip of a semiconductor is mounted and stripe plating for a wire bonding area for connecting wires, separately. I used it.

That is, the present invention relates to a method for manufacturing a lead frame for a semiconductor device by punching a stripe plating strip, which is obtained by performing stripe-shaped plating in advance in a longitudinal direction region including a die bonding area and a wire bonding area, by press working, to obtain the stripe plating. The gist of the method is a method for manufacturing a lead frame for a semiconductor device, characterized in that stripe plating for die bonding area and stripe plating for wire bonding area are separately used.

The striped strip used in the present invention includes:
For example, a copper or copper alloy strip which is entirely nickel-plated is used as a partial plating stripe, and silver plating is used in consideration of solderability and wire bonding. In other words, separating the stripe plating for the die bonding area and the stripe plating for the wire bonding area is to form stripes independent of each other, and the interval between both stripes is in the range of 0.5 to 1.5 mm.

[Operation] The present invention is a method of manufacturing a lead frame for a semiconductor device by pressing a stripe plating strip, wherein the stripe plating strip has a die plating area stripe plating and a wire bonding area stripe plating separately. The solder flow during die bonding does not flow into the wire bonding area because of the use of the one, which enables press working,
Wire connection work can be performed easily and reliably, and it is not necessary to control the crystal grains on the plated surface, and it is possible to manufacture a highly reliable lead frame with a high manufacturing yield.

Example An example of the present invention will be described with reference to the drawings. 2 and 4 are plan views of the lead frame manufactured according to the present invention, and FIGS. 1 and 3 are perspective views of the strip plating strips used in FIGS. 2 and 4, respectively.

Referring to FIG. 1, copper or copper alloy strip 1 which is entirely plated with nickel 3 is provided with silver stripe plating 6a having a width of about 5 mm as stripe plating for the die bonding area.
This was applied, and a 1 mm wide space was provided, and about 3 mm wide silver stripe plating 5a was further applied as wire bonding stripe plating. The dimensional intersection with a 1 mm width between stripes is within ± 0.2 mm. Fig. 2 shows a 3-terminal IC manufactured using the strip plating strip shown in Fig. 1.
This is a lead frame for medium-duty output regulator.

FIG. 4 is a plan view of a lead frame for a large output (power) regulator for a three-terminal IC, and FIG. 3 is a perspective view of a strip plating strip used for manufacturing the lead frame.

In FIG. 3, the entire surface is nickel-plated on the deformed copper alloy strip 4.
After that, silver stripe plating with a width of about 7 mm is used as a plating stripe for the die bonding area (soldered part) 6
Apply two b to the left and right, and make a gap with a 1 mm wide stripe on each of the outer sides, and further, as a stripe plating for wire bonding, a silver stripe plating of about 3.5 mm width 5
This is an example in which one b is applied. Using this striped plating strip, it is possible to manufacture two lead-frames for large output regulators for 3-terminal ICs on the left and right.

[Effects of the Invention] The following items can be listed as effects of the present invention.

(1) Solder used during die bonding did not flow out from a predetermined area.

(2) Since the wire bonding area is not attacked by the solder from the die bonding air, the characteristics and quality of the semiconductor device can be improved.

(3) During pressing, it is not necessary to excessively deepen the grooves for preventing solder flow or to increase the number, which facilitates pressing.

(4) Since the marking of the solder flow stop and the V groove can be made shallow, it is also possible to prevent Ni plating cracks on the back and back surfaces, especially in the case where the entire surface is nickel plated.

(5) It became unnecessary to control the variation (size of crystal grains) on the plating surface, and the process was stabilized.

As described above, according to the present invention, the manufacturing of the lead frame becomes easy and reliable, the reliability in quality is further improved, the yield is further improved, and the cost is reduced.

[Brief description of drawings]

1 and 3 are perspective views of an embodiment of a stripe plating strip according to the method for manufacturing a lead frame for a semiconductor device of the present invention, and FIGS. 2 and 4 are the stripes of FIGS. 1 and 3, respectively. FIGS. 5 and 7 are cross-sectional views and perspective views of continuous partial plating strips used in a conventional manufacturing method, respectively, showing a plan view of an embodiment of a medium-power and high-power regulator lead frame manufactured by a plating strip manufacturing method. 6 and 8 are plan views of the lead frames for the medium output regulator and the large output regulator, respectively, which are manufactured by the manufacturing method using the continuous partial plating strips of FIGS. 5 and 7. 1: Copper or copper alloy strip, 2: Silver stripe plating, 3: Nickel plating, 4: Deformed copper alloy strip, 5a, 5b: Silver stripe plating for wire bonding, 6a, 6b: Silver stripe plating for die bonding.

Claims (1)

[Claims] 1. A method for manufacturing a lead frame for a semiconductor device by punching a stripe plating strip, which is obtained by performing stripe-shaped plating in advance in a longitudinal direction portion including a die bonding area and a wire bonding area, by press working, the stripe plating being performed. A method for manufacturing a lead frame for a semiconductor device, characterized in that a strip plating for die bonding area and a strip plating for wire bonding area are separately used as strips.