JPH0713963B2 - Method for manufacturing semiconductor device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device.

Conventional technology Nowadays, as devices are required to be more miniaturized and faster, silicide gate transistors using high melting point metals (W, Mo, etc.), silicide wiring, and a polysilicon layer between an insulating film and a silicide film are used. A technology using a transistor with a polycide structure and wiring provided with is adopted. This technique has a lower wiring resistance and a higher speed than the case where polysilicon is used, and at the same time, a high temperature heat treatment is possible in a post process.

FIG. 5 shows a conventional method for manufacturing a semiconductor device. After forming the insulating film 2 on the semiconductor substrate 1 on which the semiconductor element is formed, a contact is formed by an etching method such as dry etching (FIG. 5A). After that, the metal-based film 3 used as the wiring and the gate electrode is formed by the sputter deposition method or the chemical vapor deposition (CVD) method, and the pattern is formed by the dry etching method or the like (FIG. 5B). Further, in order to improve the insulation with the upper wiring, the metal-based film 3
A method of forming the oxide insulating film 4 on the above by a thermal oxidation method or a CVD method (FIG. 5 (c)) is used. However, some metal materials are easily oxidized. Moreover, since the silicide film is formed by using the sputter deposition method or the CVD method, the silicide film is formed in an unstable crystalline state due to a slight difference in the film forming conditions.
This unstable crystal state occurs due to a difference in crystal structure and inclusion of impurities in the film. The change in the crystalline state depending on the film forming conditions greatly affects the increase and decrease of the film stress. Also,
The unstable crystalline silicide film undergoes heat treatment in the step of forming the oxide insulating film, and changes to a safer crystalline state. At this time, if the silicide film is excessively oxidized by heat treatment in an oxidizing atmosphere, the film is broken. Further, the film stress also changes due to the change of the crystalline state. Therefore, peeling occurs at the interface between the silicide film and the insulating film and the silicide film and the polysilicon film.

Problems to be Solved by the Invention A silicide film is formed in an unstable crystalline state due to slight differences in film forming conditions. This unstable crystal state occurs due to a difference in crystal structure and inclusion of impurities in the film. The change in the crystalline state depending on the film forming conditions greatly affects the increase and decrease of the film stress. Moreover, the silicide film in an unstable crystalline state undergoes heat treatment in the step of forming the oxide insulating film, and changes to a more stable crystalline state. The rearrangement of atoms in the direction in which the crystalline state is stabilized in the heat treatment in the later step is
If it occurs in an oxidizing atmosphere, there is a problem that the silicide film is excessively oxidized and destroyed.

Moreover, the film stress changes due to the change of the crystalline state. Therefore, there is a problem that peeling occurs at the interface between the silicide film and the insulating film and between the silicide film and the polysilicon film.

Means for Solving the Problems In order to solve the conventional problems, a method for manufacturing a semiconductor device of the present invention includes a step of forming an insulating film on a semiconductor substrate,
Etching a predetermined region of the insulating film to expose the surface of the semiconductor substrate; forming a refractory metal silicide film on the semiconductor substrate; and forming a polysilicon film on the refractory metal silicide film in a heating atmosphere. A step of thermally diffusing impurities into the polysilicon film, a step of simultaneously etching a predetermined region of the polysilicon film and the refractory metal silicide film, the polysilicon film and the refractory metal silicide And a step of forming a polysilicon film before the step of forming a refractory metal silicide film on the semiconductor substrate in the method of manufacturing a semiconductor device described above. Be prepared.

In this way, after forming the refractory metal silicide film,
A polysilicon film is formed and a pattern is formed. Since the conductive film is formed at a lower temperature than oxidation or annealing conditions, the crystal structure of the refractory metal silicide film is gradually changed, and the crystal structure of the refractory metal silicide film becomes more stable and abrupt. Peeling defects due to changes in stress are eliminated. Further, since the surface of the refractory metal silicide film is covered with the polysilicon film, even if a high temperature treatment is performed in an oxidizing atmosphere, the polysilicon film is oxidized on the surface portion, so that the refractory metal silicide film is not formed. The portion that is directly oxidized is reduced, and the failure due to abnormal oxidation is eliminated.

Embodiment An embodiment of the present invention will be described with reference to FIG.

FIG. 1 is a cross-sectional view in order of the steps of a method for manufacturing a semiconductor device according to the present invention. CVD-SiO ₂ film on single crystal silicon (Si) substrate 11
12 using an atmospheric pressure CVD device, for example, using two systems of silane (SiH ₄ ) gas and N ₂ O gas at a forming temperature of about 450 ° C.
After forming a film with a thickness of 0 nm, annealing is performed at about 900 ° C. in a N ₂ atmosphere for 30 minutes, a resist is applied and exposed to form a 1 μmφ pattern. Further, by making a gas of CF ₄ + O ₂ into a plasma state, so-called dry etching is performed by a reactive ion etching (RIE) method for anisotropically etching an oxide film to form a contact (FIG. 1 (a)). .
Then, using a low pressure CVD device, at a forming temperature of, for example, 360 ° C.
A tungsten silicide film 13 having a thickness of about 300 nm is formed by two systems of WF ₆ and SiH ₄ gas (FIG. 1 (b)). Furthermore, after stopping the film-forming gas once, the temperature of the low pressure CVD system was raised to about 610
Up to ℃ and using only SiH ₄ gas
With a thickness of about 100 nm. After that, the sheet resistance of polysilicon is set to about 30Ω for the purpose of keeping the oxidation rate constant when it is oxidized.
In order to make cm, for example, phosphine (PH ₃ ) gas is used to perform thermal diffusion of phosphorus (P) in a diffusion furnace at a temperature of about 800 ° C. (FIG. 1 (c)). Next, a resist is applied and exposed to form a contact pattern of 1 μm rule. Further, dry etching is performed by the RIE method to simultaneously etch the polysilicon film 14 and the tungsten silicide film 13. Next, the polysilicon film 4 and the tungsten silicide film are formed for the purpose of enhancing the insulating effect from the upper wiring.
The sidewalls of 13 were heated at about 900 ° C in a mixed atmosphere of hydrogen and oxygen.
Oxidized for a minute to change the polysilicon film 14 to a polysilicon oxide film.
It is set to 15 (Fig. 1 (d)).

When the polysilicon film 14 is formed on the tungsten silicide film 13, the crystal structure of the silicide film becomes more stable due to the heating when forming the polysilicon film 14. Furthermore, the Si used when forming the polysilicon film 14
The H ₄ gas is thermally decomposed into a form of SiH ₄ → Si + 2H ₂ , and hydrogen causes a reduction reaction to expel a small amount of oxygen in the silicide film and reduce impurities. Further, since heat is applied in the process of thermally diffusing phosphorus into polysilicon, the crystalline state of the silicide film becomes more stable, and the stress of the silicide film is relaxed. The stress of the silicide film is concentrated on the contact corner portion, and there is an effect of preventing peeling at the interface between the silicide film and the CVD-SiO ₂ film at the corner portion. In addition, in the oxidation for enhancing the insulating effect after the pattern formation, since the crystal state of the silicide film is stable and the surface of the silicide is covered with polysilicon, abnormal oxidation of the metal material forming the silicide is prevented. It has the effect of preventing.

When SEM observation was performed using the sample thus produced, it was found that there was no peeling or abnormal oxidation in any part of the contact.

Next, in order to confirm the electrical characteristics, a large number of transistors as shown in FIG. 2 were arranged in a matrix form, and these were connected in series and in parallel to manufacture. A method for manufacturing this transistor will be described with reference to FIG. Isolation is performed by LOCOS 16 which partially forms an oxide film on the single crystal silicon substrate 11 for the purpose of isolation. next,
Gate oxide film 19 is about 20 at about 1000 ℃ in dry oxygen atmosphere.
nm to form. A tungsten silicide film 13 having a thickness of about 300 nm is formed thereon by a low pressure CVD apparatus at a forming temperature of, for example, 360 ° C. using two systems of WF ₆ and SiH ₄ gas. further,
After stopping the film-forming gas once, the temperature of the low pressure CVD device was raised to about 6
The temperature is raised to 10 ° C., and a polysilicon film of about 100 nm is formed using only SiH ₄ gas. Then, for the purpose of making the oxidation rate constant in the case of oxidation, for example, PH ₃ is used to set the sheet resistance of polysilicon to about 30 Ωcm.
Thermal diffusion of phosphorus is performed in a diffusion furnace at a temperature of ℃. next,
A resist is applied and exposed to form a pattern with a gate width of 1 μm. Further, dry etching is performed by the RIE method to form the polysilicon film 14 and the tungsten silicide film.
13 is etched at the same time. Next, an n ⁺ diffusion layer 17 is formed to form a source / drain diffusion layer. The n ⁺ diffusion layer 17 was formed by arsenic ion implantation. The implantation conditions are acceleration energy of about 40 KeV and dose of about 4 × 10 ¹⁵ cm.
^-2 . Then, recrystallization treatment of the single crystal silicon substrate 11 was performed at 900 ° C. for 30 minutes in a nitrogen atmosphere. The sidewalls of the polysilicon film and the tungsten silicide film 13 are oxidized for 45 minutes in a mixed atmosphere of hydrogen and oxygen at about 900 ° C. for the purpose of enhancing the insulating effect from the upper wiring, and the polysilicon film is converted into a polysilicon oxide film 15 And At this time, the sidewall of the tungsten silicide film 13 is oxidized to become the silicide oxide film 20. Next, using a normal pressure CVD device as an interlayer film between the gate electrode and the upper wiring, a boron phosphorus silicon glass (BPSG) film 22 containing, for example, phosphorus and boron is formed at about 500 ° C.
The film is formed at a temperature of about 800 nm. Furthermore, about 900 ℃, N ₂
Anneal in the atmosphere for 30 minutes. Next, a resist is applied and exposed to form a pattern of 1 μmφ on the source / drain. Further, a mixed gas of CF ₄ and O ₂ is put into a plasma state, so-called dry etching is performed by a reactive ion etching (RIE) method in which an oxide film is anisotropically etched to form a source / drain contact. Next, the A1-Si film 18 is deposited to about 1 μm by the sputter deposition method.
m vapor deposition. Further, a resist is applied and exposed to form a pattern, and the A1-Si film 18 is anisotropically etched by the RIE method so that a voltage is applied to the source side A1-Si film 18, and the transistor is turned on. -A device was prepared by arranging 1 million transistors in a matrix form such that a current would flow through the drain side A1-Si film 18 when turned off, and connecting these in series and in parallel.

The access time of 1 million transistors was measured.
As a result, the access time of the transistor was 10 nsec, and high-speed operation could be confirmed stably. From this result, it was found that the present invention has a great effect in preventing abnormal oxidation of the silicide wiring and separation of the silicide film interface.

Next, a second embodiment of the present invention in the case of using a polycide structure wiring in which a polysilicon layer is formed between a silicide wiring and an insulating film will be described with reference to FIG. FIG. 3 is a cross-sectional view in order of the steps of the method for manufacturing the semiconductor device of the present invention. Atmospheric pressure CVD of CVD-SiO ₂ film 12 on single crystal silicon (Si) substrate 11
After forming a film of about 800 nm at a forming temperature of about 450 ° C. using two systems, for example, SiH ₄ gas and N ₂ O gas, the
Annealing is performed in a N ₂ atmosphere at 0 ° C. for about 30 minutes, a resist is applied and exposed to form a 1 μmφ pattern. Further, a mixed gas of CF ₄ and O ₂ is put into a plasma state, so-called dry etching is performed by the RIE method of anisotropically etching the oxide film to form a contact (FIG. 3 (a)). Next, by using a low pressure CVD apparatus, first, the second polysilicon film 21 in a state where the formation temperature is about 610 ° C. and the phosphorus-doped state is doped with two system gases of SiH ₄ gas and PH ₃ gas.
Form 200 nm. Next, after stopping the film forming gas once,
The formation temperature of the low pressure CVD equipment is lowered to about 360 ℃, and WF ₆ gas and S
A tungsten silicide film 13 of about 300 nm is formed by two systems of iH ₄ gas (FIG. 3 (b)). Further, the temperature of the low pressure CVD apparatus is raised to about 610 ° C., and the polysilicon film 14 is formed to about 100 nm using only SiH ₄ gas. After that, in order to make the sheet resistance of polysilicon, for example, 30 Ωcm, in order to keep the oxidation rate constant when it is oxidized, for example, PH
Thermal diffusion of phosphorus is carried out in a diffusion furnace at a temperature of about 800 ° C using ₃ gases (Fig. 3 (c)). Next, a resist is applied and exposed to form a contact pattern of 1 μm rule. Further, dry etching is performed by the RIE method to simultaneously etch the polysilicon film 14 and the tungsten silicide film 13. Next, the polysilicon film 14 and the tungsten silicide film are formed for the purpose of enhancing the insulation effect with the upper wiring.
13 side walls at about 900 ℃, in a mixed atmosphere of hydrogen and oxygen about 4
It is oxidized for 5 minutes to form the polysilicon film 14 as a polysilicon oxide film 15 (FIG. 3 (d)).

In the step of forming the polysilicon film 14 on the tungsten silicide film 13, the crystal state in the silicide film becomes more stable due to the heating when forming the polysilicon film 14. Further, the SiH ₄ gas used to form the polysilicon film 14 is thermally decomposed into SiH ₄ → Si + 2H ₂ , and hydrogen causes a reduction reaction to cause the silicide film and the second film.
A trace amount of oxygen in the polysilicon film 21 is expelled and impurities are reduced. Furthermore, since heat is applied in the process of thermally diffusing phosphorus into polysilicon, the crystalline state of the silicide film becomes more stable and the stress of the silicide film is relaxed. The stress of the silicide film is concentrated on the contact corner portion, and there is an effect of preventing peeling at the interface between the silicide film and the second polysilicon film 21 at the corner portion. In addition, in the oxidation for enhancing the insulating effect after the pattern formation, since the crystal state of the silicide film is stable and the surface of the silicide is covered with polysilicon, abnormal oxidation of the metal material forming the silicide is prevented. It has the effect of preventing.

When SEM observation was performed using the sample thus produced, it was found that there was no peeling or abnormal oxidation in any part of the contact.

Next, in order to confirm the electrical characteristics, a large number of transistors as shown in FIG. 4 were arranged in a matrix form, and these were connected in series and in parallel to produce a transistor. A method for manufacturing this transistor will be described with reference to FIG. Isolation is performed by LOCOS 16 which partially forms an oxide film on the single crystal silicon substrate 11 for the purpose of isolation. Next, the gate oxide film 19 is formed in a dry oxygen atmosphere at about 1000 ° C. for about 20 nm.
Form. Further, using a low pressure CVD apparatus, a second polysilicon film 21 in which phosphorus is doped by two system gases of SiH ₄ gas and PH ₃ gas at a formation temperature of about 610 ° C. is formed by about 20.
Form 0 nm. Next, after stopping the film forming gas once, the forming temperature is lowered to about 360 ° C., and the tungsten silicide film 13 is formed to about 300 nm by two systems of WF ₆ gas and SiH ₄ gas. Furthermore, raise the temperature of the low pressure CVD device to about 610 ° C,
A polysilicon film of about 100 nm is formed using only silane gas. After that, in order to make the oxidation rate constant in the case of oxidation, in order to make the sheet resistance of polysilicon, for example, 30 Ωcm, for example, PH ₃ is used to perform thermal diffusion of phosphorus by a diffusion furnace at a temperature of about 800 ° C. . Next, a resist is applied and exposed to form a pattern with a gate width of 1 μm.
Further, dry etching is performed by the RIE method, and the polysilicon film 14 and the tungsten silicide film 13 and the second
The polysilicon film 11 is simultaneously etched. Next, an n ⁺ diffusion layer 17 is formed to form a source / drain diffusion layer. The n ⁺ diffusion layer 17 was formed by arsenic ion implantation. The implantation conditions are an acceleration energy of about 40 KeV and a dose of about 4 × 10 ¹⁵ cm ^-2 . Then, the single crystal silicon substrate 11
Was recrystallized at 900 ° C. for 30 minutes in a nitrogen atmosphere. The sidewalls of the polysilicon film and the tungsten silicide film 13 are reduced to about 10 μm in order to enhance the insulating effect from the upper wiring.
It is oxidized in a mixed atmosphere of hydrogen and oxygen at 900 ° C. for about 45 minutes to form a polysilicon film as a polysilicon oxide film 15. At this time, the sidewalls of the polysilicon film and the second polysilicon film 21 become the polysilicon oxide film 15, and the sidewalls of the tungsten silicide film 3 are oxidized to become the silicide oxide film 20. Next, by using an atmospheric pressure CVD apparatus as an interlayer film between the gate electrode and the upper wiring, a boron phosphorus silicon glass (BPSG) film 22 containing, for example, phosphorus and boron is formed at a temperature of about 500 ° C. and a thickness of about 800 nm. To film. Further, anneal at about 900 ° C. in N ₂ atmosphere for about 30 minutes. Next, a resist is applied and exposed to form a pattern of 1 μmφ on the source / drain. Further, a mixed gas of CF ₄ and O ₂ is put into a plasma state, so-called dry etching is performed by a RIE method in which an oxide film is anisotropically etched to form a source / drain contact. Next, by the sputter deposition method,
The A1-Si film 18 is vapor-deposited by about 1 μm. Furthermore, a resist is applied and exposed to form a pattern, and the A1-Si film is formed by the RIE method.
Anisotropically etching 18 to put a voltage on the source-side A1-Si film 18 and turn on / off the transistor to generate a current of 1 million on the drain-side A1-Si film 18. A device was prepared by arranging transistors in a matrix and connecting them in series and in parallel.

The access time of 1 million transistors was measured.
As a result, the access time of the transistor was 15nsec, and high-speed operation could be confirmed stably. From this result, it was found that the present invention has a great effect in preventing abnormal oxidation of the silicide film in the polycide wiring and separation of the interface between the silicide film and the second polysilicon film 21.

The polysilicon film 14 of the present invention may or may not be doped with p-type and n-type impurities. Furthermore, the second polysilicon film 21 may be doped with p-type impurities. Furthermore, the present invention is an effective method for manufacturing a semiconductor device on a material substrate such as a compound semiconductor other than silicon.

EFFECTS OF THE INVENTION By forming a polysilicon film on the tungsten silicide film of the present invention, the abnormal oxidation of the silicide film does not occur in a large number of contacts of 1 μmφ, so that no destruction occurs and no separation occurs at the silicide film interface. Wiring of a semiconductor device can be formed, and a high-speed transistor can be manufactured stably.

[Brief description of drawings]

FIG. 1 is a sectional view in the order of steps of a method for manufacturing a semiconductor device with a silicide wiring according to the present invention, FIG. 2 is a sectional view showing a structure of a silicide gate transistor evaluated by using the present invention, and FIG. FIG. 4 is a cross-sectional view showing the structure of a transistor having a polycide structure gate evaluated according to the present invention, and FIG. 5 is a process according to a conventional method. FIG. 1 ... Single crystal silicon substrate, 2 ... CVD-SiO ₂ , 3 ... Tungsten silicide film, 4 ... Polysilicon film, 5 ...
... polysilicon oxide film, 6 ... LOCOS, 7 ... n ⁺ diffusion layer, 8 ... A1-Si film, 9 ... gate oxide film, 10 ... silicide oxide film, 11 ... second polysilicon film, 12 …… BPSG
Film, 21 ... Semiconductor substrate, 22 ... Insulating film, 23 ... Metal film, 24 ... Oxidation insulating film.

Claims (2)

[Claims] 1. A step of forming an insulating film on a semiconductor substrate,
Etching a predetermined region of the insulating film to expose the surface of the semiconductor substrate; forming a refractory metal silicide film on the semiconductor substrate; and forming a polysilicon film on the refractory metal silicide film in a heating atmosphere. A step of thermally diffusing impurities into the polysilicon film, a step of simultaneously etching a predetermined region of the polysilicon film and the refractory metal silicide film, the polysilicon film and the refractory metal silicide And a step of oxidizing the surface of the film at the same time. 2. A step of forming an insulating film on a semiconductor substrate,
Etching a predetermined region of the insulating film to expose the surface of the semiconductor substrate, forming a first polysilicon film on the semiconductor substrate, and refractory metal silicide film on the first polysilicon film. Forming a second polysilicon film on the refractory metal silicide film in a heating atmosphere, thermally diffusing impurities into the second polysilicon film, and the first polysilicon film. A step of simultaneously etching predetermined regions of the polysilicon film, the second polysilicon film and the refractory metal silicide film;
A step of simultaneously oxidizing the surfaces of the first polysilicon film, the second polysilicon film and the refractory metal silicide film.