JPH0716159B2 - Frequency / phase estimation device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a frequency / phase estimating apparatus for estimating a frequency and a phase from a noise-weighted sine wave.

(Prior art and its problems) A well-known conventional art is a phase-locked loop, and a method in which a fixed phase error is set to 0 by a secondary system when there is a frequency error is most commonly used. However, it is difficult to say that the normal phase lock loop is necessarily suitable for the purpose of accurately adjusting the frequency and the phase within a short time. Especially, in a noisy environment, accurate estimation takes a very long time.

(Object of the Invention) It is an object of the present invention to provide a means for accurately estimating a frequency and a phase in an extremely short time even in an environment with a large amount of noise by eliminating such a conventional drawback.

(Structure of the Invention) In order to achieve the above object, the present invention provides a sample hold for sampling a sine wave on which noise is superimposed, an A / D converter for digitizing the output of the sample hold, and an A / D converter. 2) and the sine wave output from the sine wave generator are input to output the phase error, the first register to input the output of the phase detector, and the counter contents K as an address 2 / Holds a first coefficient generator that outputs a numerical value corresponding to K, a first multiplier that multiplies the output of the first coefficient generator and the output of the first register, a multiplication result, and an initial phase estimation value The first register for adding the contents of the second register
Of the first adder, a second register for storing the output of the first adder as an updated value of the initial phase estimation value, and a second adder for inputting the output of the first adder to one input terminal. , A second coefficient generator that outputs a numerical value corresponding to 6 / [K (K + 1)] with the content K of the counter as an address, and a second coefficient generator that multiplies the output of the second coefficient generator and the output of the first register. 2 multiplier, a subtracter that subtracts the multiplication result from the contents of the third register that holds the frequency estimated value, a third register that stores the output of the subtractor as an updated value of the frequency estimated value,
A third multiplier that multiplies the output of the subtractor and the contents of the counter, a second adder that inputs the output of the third multiplier to the other input terminal, and an output of the second adder And a sine generator that

(Detailed Description of Configuration) The present invention is directed to noise {ei} superposed on a sine wave whose phase θ _i is represented by θ _i = θ _o + i · w at time i and is equivalent to θ _i = Θ _o + i · w + e _i When observed as a phase, it is a problem of estimating θ _o and w with the influence of {ei} as little as possible. The least-squares method is well known as an estimation method that minimizes the variance of the estimation error using observation values from time 1 to k. Applying the method of least squares to the above problem, it becomes as follows.

The evaluation function It is defined as If the partial derivatives with respect to θ _o and w of the evaluation function are set to 0, the following equation is obtained.

Or The best estimate of the variance of θ o and w is the solution of equation (1). Is given. The sequential regression method is known as a means for sequentially obtaining the optimum solution every hour. At time K the estimated value of the estimated value theta o i, w of theta o at time i according to which the w i θ k represents the phase at time K.

Y ^t represents the transpose of Y.

I will correct it.

The inverse matrix A _K ^-1 can be easily obtained, and the equation (3) is simplified as follows.

here Is called the phase error, the initial phase estimated value θ _o ^K is multiplied by the time-varying coefficient (specifically 2 / K) that depends on the time K and added to the estimated value θ _o ^K-1 before the temporary time. Fixed by
The frequency estimation value w ^K is also corrected by multiplying the phase error by a time-varying coefficient that depends on the time K (specifically, 6 / K (K + 1) and subtracting it from the estimation value w ^K-1 before the temporary time. Equation (4) is realized by taking Eq. (4), which is extremely short compared to a normal phase-locked loop, because the best estimation using the observed values up to that point in time is given in the form of solving the equation. The best estimate for time is given.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. A noise-weighted sine wave coming from the terminal 1 is sampled by the sample hold 2 and digitized by the A / D converter 3. In the digital phase detector 4, the digitized sine wave has a phase error compared with the sine wave generated by the sine wave generator 5 which generates a sine wave matching the frequency and phase estimated by the means described later. It appears at the output of the phase detector and is stored in register 6. A phase detector can be implemented by, for example, the literature (W. Lindsey “A surver of Digital P
hase-Locked Loop "Proc.IEEE, vol.69, No.4, April 198
It is shown in detail in 1). Further, the sine wave generator 5 can be composed of a read-only memory (ROM), and outputs a sample value of the sine wave with a phase estimation value described later as an address. The counter 7 counts up every phase comparison time from the start of the operation of the present device. First coefficient generator 8
Is a ROM and uses the content K of the counter 7 as an address 2
Output the numerical value corresponding to / K. The output is multiplied by the content of the register 6 which holds the value of the phase error in the multiplier 9, and the multiplication result is the register which holds the initial phase estimation value.
The contents of 10 and the adder 11 are added. The output of the adder 11 is again stored in the register 10 as an updated value of the initial phase estimation value and is given to one input of the adder 12 at the same time. The second coefficient generator 13 is also a ROM and outputs a numerical value corresponding to 6 / K (K + 1) with the content K of the base counter 7 as an address. The output is multiplied in the multiplier 14 with the contents of the register 6 holding the value of the phase error. The multiplication result is subtracted by the subtracter 16 from the contents of the register 15 holding the frequency estimated value. The initial value of the register 15 is
If the nominal value is known, for example, the local oscillation frequency for demodulation, it is set to that value. The output of the subtracter 16 is again stored in the register 15 as the updated value of the frequency estimation value, and at the same time, is multiplied by the content of the counter 7 in the multiplier 17. The output of the multiplier 17 is given as the other input of the adder 12, and is added to the updated value of the initial phase estimation value. The output of the adder 12 is used as the optimum phase estimation value at time K as the ROM address of the sine wave generator 5. The phase estimation value is modulo 2π by making the maximum value of this address correspond to 2π. As described above, it is possible to sequentially estimate the minimum variance of the frequency and the phase from the sine wave in which the weight of the input noise is weighted. The estimated value is given as the contents of registers 15 and 10, respectively. It is obvious that the programmable signal processing processor can easily realize the operation equivalent to the above.

(Effects of the Invention) While the conventional phase-locked loop is a simple filter, the present invention corresponds to a Kalman filter that estimates a time-invariant parameter, and considering that the Kalman filter is an optimal linear filter, It can be said that the frequency and phase can be estimated accurately in a much shorter time than in the example.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 2 ... Sample hold, 3 ... A / D converter, 4 ... Phase detector, 5
… Sine wave generator, 6,10,15… Register, 7… Counter, 8,13
... Coefficient generator, 9, 14, 17 ... Multiplier, 11, 12 ... Adder, 16 ... Subtractor.

Claims (1)

[Claims] 1. A sample hold for sampling a sine wave on which noise is superimposed, an A / D converter for digitizing the output of the sample hold, a sine output from the A / D converter and a sine wave generator. Phase detector that receives a wave and outputs a phase error, a first register that inputs the output of the phase detector, and a first coefficient that outputs a numerical value corresponding to 2 / K with the content K of the counter as an address. A generator, a first multiplier that multiplies the output of the first coefficient generator and the output of the first register, and a sum of the multiplication result and the contents of the second register that holds the initial phase estimation value. 1 adder, a second register that stores the output of the first adder as an updated value of the initial phase estimation value, and a second adder that inputs the output of the first adder to one input end And the content K of the counter as an address, 6 / [K (K + 1)] A second coefficient generator that outputs a corresponding numerical value, a second multiplier that multiplies the output of the second coefficient generator and the output of the first register, and a third that holds the multiplication result as a frequency estimation value. A subtractor for subtracting from the contents of the register of, a third register for storing the output of the subtractor as an updated value of the frequency estimation value, and a third multiplier for multiplying the output of the subtractor by the contents of the counter, A frequency / phase estimation apparatus comprising a second adder for inputting the output of the third multiplier to the other input terminal and a sine wave generator for inputting the output of the second adder.