JPH0716197B2 - Packet bus external loopback test method and packet transfer device - Google Patents

Description

The present invention relates to a packet bus external loopback test method and a packet transfer device in a bus type packet switching device.

[Conventional technology]

In the conventional packet bus external loopback test method of this type, the external loopback request source packet transfer device issues a bus capture request to the bus arbiter to acquire the transmission right to the bus, and then transmits a loopback data return instruction to the external loopback request destination packet. Transfer to the transfer device and abandon the right to use the bus (release the bus). On the other hand, the request destination packet transfer device that received the external loopback instruction packet set the loopback data in response to the external loopback request by software processing or hardware processing, and made a transmission request to the bus arbiter to acquire the bus transmission right. After that, the method has been adopted in which the reception return data is transmitted to the request source packet transfer device.

[Problems to be Solved by the Invention]

The conventional packet bus external loopback test method described above is
When sending an external loopback request packet and an external loopback response packet (status information packet to be sent to the request source) as a response to the external loopback request packet, the bus arbiter must capture a bus when each packet transfer device transfers packet data. However, the time required from the external loopback instruction request to the reception of the external loopback response is not constant due to the traffic state of the bus. For this reason, there is a drawback that the real-time property is lost when testing each device connected to the bus and testing the packet bus.

[Means for Solving the Problems]

The external loopback test method of the packet bus of the first invention is m
A bus type transmission line with a bit width, a bus arbiter that arbitrates the transmission right for a plurality of transmission requests, and a transmission request to this bus arbiter, and at least two 1-to-n (n ≧ 1) by transmission permission from the bus arbiter. ) In a packet switching device configured with a packet transfer device that transfers packets between devices, the test data is transmitted to another packet transfer device, and the destination packet transfer device transmits the received test data (return data) to the source. It is a packet bus external loopback test method that confirms the normality of the packet bus and the mutual normality of the packet transfer devices by returning to the packet transfer device and comparing the transmission test data and the reception test data at the transmission packet transfer device. An external loopback request for requesting loopback of the test data transmitted to the other packet transfer device. A transmission request holding unit that holds a transmission request for the bus arbiter for the source packet transfer device to transmit return data until the return data transmitted from the destination packet transfer device is received; External return response means for extracting the source address and the return data from the instruction packet and transmitting the return data to the source packet transfer device without making a transmission request to the bus arbiter, and storing and reading the received return data The external loopback request source packet transfer device receives the loopback data from the request destination device in a state in which the transmission right from the bus arbiter is acquired, and the packet transfer device of the second invention is Bus-type transmission line with m-bit width and arbitration of transmission right for multiple transmission requests The bus arbiter and, at least two one-to-n by transmitting permission from the bus arbiter performs transmission request to the bus arbiter (n ≧ 1)
In a packet switching device configured with a packet transfer device for performing packet transfer between devices, when an external loopback instruction request packet transfer device issues a bus acquisition request to the bus arbiter and acquires a transmission right, an external loopback instruction request packet is sent. A packet transfer unit for transferring, a transmission right holding unit that does not release the transmission right until an external loopback response packet is received from a partner device, an extraction unit that extracts a source address and loopback data from the external loopback instruction request packet, and The present invention is characterized by including a transmission unit that transmits reception return data to the return instruction transmission source packet transfer device without acquiring a transmission right from the bus arbiter, and a storage unit that stores and reads the received return response data.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. A packet transfer device 1 and a packet transfer device 2 are connected by a arbiter bus 4 to a bus arbiter 3 which arbitrates a transmission request from each packet transfer device and gives a transmission right. Then, the packet transfer device that has acquired the transmission right can transfer data to the destination packet transfer device via the packet bus 5.

FIG. 2 is a block diagram showing an example of the packet transfer device in FIG.

Each packet transfer device 10 includes, for example, a packet transfer unit 101 that transfers an external return instruction request packet when the external return instruction request packet transfer device 1 makes a bus acquisition request to the bus arbiter 3 and acquires a transmission right, and a partner packet. The transmission right holding unit 102 that does not release the transmission right until the external return response packet is received from the transfer device 2, the extraction unit 103 that extracts the source address and the return data from the external return instruction request packet, and the transmission right from the bus arbiter 3 A transmission unit 104 that transmits the reception loopback data to the packet transfer device 1 that is the loopback instruction transmission source without acquiring it, a storage unit 105 that stores and reads the received loopback response data, and a timer 106 that monitors the data transmission / reception operation. It has and.

FIG. 3 is a diagram showing a packet bus external loopback test sequence between the packet transfer devices in the embodiment shown in FIG.

Next, the operation of this embodiment will be described with reference to FIGS.

The packet transfer device 1 makes a transmission request to the bus arbiter 3 via the arbiter bus 4, and when the transmission right is given as a result, an external loopback instruction request packet is sent from the packet transfer unit 101 to the packet transfer device 2 via the packet bus 5.
The transmission right holding unit 102 does not release the transmission right until the external reply response packet is received from the packet transfer device 2. When the external loopback request packet is received, the extraction unit 103 of the packet transfer device 2 extracts the source address and the loopback data from the external loopback instruction request packet, assembles the external loopback response packet, and does not make a transmission request to the bus arbiter 3. The external loopback data is returned from the transmission unit 104 to the packet transfer device 1 which is the loopback request source via the packet bus 5. The requesting packet transfer device 1 receives the external loopback data (external loopback response) and stores it in the storage unit 105, then cancels the transmission request to the bus arbiter 3 and releases the packet bus 5. Further, the packet transfer device 1 stores the received return data in the storage unit 105.
Since it can be read from, it is possible to confirm the normality of the packet bus 5 and the normality of the transfer operation between the packet transfer devices by comparing the transmission return data with the software processing. The timer 106 monitors the data transmission / reception operation and can avoid the stack of operations due to a failure during external loopback transfer control.

〔The invention's effect〕

As described above, according to the present invention, when the external loopback request packet and the external loopback response packet are transmitted during the external loopback transfer control, the external loopback response is transferred while the external loopback request source is capturing the bus. Since the transmission right is not acquired for each transfer, the response to the external loopback instruction can be received without depending on the traffic of the packet bus. Therefore, it is possible to make the time required to confirm the normality of the packet bus and the normality of the transfer control between the packet transfer devices almost constant and to shorten the time. In addition, when capturing the bus for each packet transfer,
Since the external return response is not always received in the order of request, the source address of the received external return response must be recognized by software processing. However, according to the present invention, the external return response packet can be received at the time of the external return request. Is unnecessary, and there is an effect that the load of software processing can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG.
A block diagram showing an example of a packet transfer device in the figure,
FIG. 3 is a diagram showing an external loopback test sequence of the packet bus between the packet transfer devices in the embodiment shown in FIG. 1,2 ...... Packet transfer device, 3 ...... Bus arbiter, 4 ...
... arbiter bus, 5 ... packet bus, 101 ... packet transfer unit, 102 ... transmission right holding unit, 103 ... extraction unit, 104
...... Sending unit, 105 …… Storage unit, 106 …… Timer.

Claims (2)

[Claims] 1. A bus type transmission line having an m-bit width, a bus arbiter that arbitrates transmission rights for a plurality of transmission requests, and a transmission request to the bus arbiter, and at least two 1s are permitted by the transmission permission from the bus arbiter. In a packet switching device configured with a packet transfer device that performs packet transfer between a pair of devices (n ≧ 1), test data is transmitted to another packet transfer device, and the destination packet transfer device receives the test data ( (Return data) to the transmission source packet transfer device, and the transmission packet transfer device compares the transmission test data and the reception test data to confirm the normality of the packet bus and the mutual normality of the packet transfer devices. An external loopback test method, which requests the loopback of the test data transmitted to the other packet transfer device. Copy back requesting means, and a transmission request holding means for holding a transmission request for the bus arbiter for the source packet transfer device to transmit return data until receiving the return data transmitted from the destination packet transfer device, External return response means for extracting the source address and return data from the received return instruction packet and transmitting the return data to the source packet transfer device without making a transmission request to the bus arbiter, and accumulating the received return data And an external loopback request source packet transfer apparatus which receives loopback data from the request destination apparatus in a state in which the transmission right from the bus arbiter has been acquired. . 2. A bus type transmission line having an m-bit width, a bus arbiter that arbitrates the transmission right for a plurality of transmission requests, and a transmission request from the bus arbiter, and at least two 1s are permitted by the transmission permission from the bus arbiter. In a packet switching device configured with a packet transfer device for performing packet transfer between a pair of devices (n ≧ 1), an external loopback instruction request packet transfer device makes a bus acquisition request to the bus arbiter and acquires a transmission right. When the external loopback instruction request packet is transferred, the packet transfer section, the transmission right holding section that does not release the transmission right until the external loopback response packet is received from the partner device, the source address and the loopback data from the external loopback instruction request packet. Extractor to retrieve the data and loop back the received loopback data without acquiring the transmission right from the bus arbiter Instruction transmitting a transmission unit for transmitting to the source packet transfer apparatus, accumulates folded response data received packet transfer apparatus, characterized in that it comprises a storage unit for read.