JPH0720116B2 - Data transmission / reception method using multiple loops - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a slotted ring type data communication system having a plurality of loops, in which data addressed to other nodes is distributed to each loop and transmitted, and The present invention relates to a method of collectively receiving data distributed and transmitted to its own node.

(Prior Art) When constructing a large-capacity communication system by the slotted ring method, it is conceivable to adopt a multiple loop configuration in order to suppress an increase in loop speed as shown in FIG. At that time, if each time lot of a plurality of loops is logically treated as a time slot of one loop, the plurality of loops can be efficiently used with various data without using a complicated loop selection algorithm. In that case, the transmission unit of each node sequentially outputs the data from the own node to the vacant time slots of the loop that are logically one.

For example, when sending data from one node to another node, as shown in FIG. 3, the first data is stored in the first slot of loop 1, the second data is stored in the first slot of loop 3, and the loop 4 is stored. 3rd data in the 2nd slot of the loop, 4th data in the 3rd slot of loop 2 and loop 1
5th data in the 4th slot of the
The sixth data is sent to the slot.
That is, a series of data is sent over a plurality of loops. In the receiving unit, the data distributed to each loop and transmitted to its own node is stored in the buffer memory in the order of the data at the transmission source and output to the terminal or the outgoing line.

In the conventional data communication system using a plurality of loops, each node is configured as shown in FIG. 5 in order to realize such communication. That is, in FIG. 5, the transmission data destined for another node stored in the transmission buffer memory 20 is sequentially read in the empty time slots on the loop detected by the data transmission unit 22 of each loop, and sent out on the loop. To be done. The control is performed by the transmission control circuit 21. The transmission control circuit 21 is mainly composed of a counter,
The time slot available / closed information detected by the data transmitter 22 of all loops is scanned every time slot time, and the counter is counted up every time there is available time slot information, and the available time slot information is detected. While issuing a data transmission instruction to the data transmission unit 22,
The value of the counter is supplied to the transmission buffer memory 20 as an address. The transmission buffer memory 20 reads out the data based on the address and sends the data to the empty time slot detected by sending to the data sending unit 22.

As shown in FIG. 4, in each time slot, in addition to the transmission data, the availability information I, the data transmission node address SA, and the reception node address DA are displayed. These displays are also controlled by the transmission control circuit 21.

In the receiving node, the data receiving unit 25 of each loop monitors the DA of each time slot to detect the data addressed to the own node and take it into the node. The received data is stored in the reception buffer memory 23 according to the instruction of the reception control circuit 24 for each transmission node and in the order of transmission from the transmission node. The reception control circuit 24 is mainly composed of a plurality of counters provided for each partner node, scans all the data receiving units 25 of all loops for each time slot time, and sends each loop to its own node at the time slot time. Check if data has been received. When received, the counter corresponding to the transmission node of the data is counted up, the storage address of the data is calculated from the value of the counter and the transmission node address, and the result is sent to the reception buffer memory 23. On the other hand, the received data is received by the data receiving unit 25, and the received data is received by the receiving buffer memory.
Instruct to transfer to 23. Buffer memory for reception 23
Stores the received data sent from the data receiving unit 25 in accordance with the address designated by the reception control circuit 24.

The data stored in the reception buffer memory 23 is read out for each sending node and in the order sent from the sending node, and sent to the outgoing line or terminal. In FIG. 5, the solid line shows the flow of transmission data, and the broken line shows the flow of control information or control signals.

(Problems to be Solved by the Invention) In the conventional data transmission / reception system described above, in order to operate by treating a plurality of loops logically as one, the transmission buffer memory 20 is set at a certain time slot time. It must have the ability to send data to all loops within one time slot time when an empty time slot is detected in all loops, and the receiving buffer memory 23 must be read from all loops at a certain time slot time. When data arrives at its own node at the same time, it must have the ability to receive and store all of them. That is, the buffer memory needs to operate at a speed of the number of loops times the loop speed. However, it is generally difficult to realize a buffer memory that can withstand the speed when a large number of loops are installed, and the operating speed of the buffer memory limits the maximum number of loops that can be installed.

Also, since the operating speed of the buffer memory depends on the number of loops installed, it is necessary to change the operating speed of the buffer memory when the number of loops is increased. If the buffer memory is designed according to the maximum number of loops, there is a disadvantage that the operation speed of the buffer memory becomes unnecessarily high even in a small-scale system having a small number of loops, resulting in excessive quality, and thus cost.

An object of the present invention is to reduce the operating speed of the buffer memories for transmission and reception to the speed of one loop even when there are a plurality of loops.

That is, according to the present invention, a plurality of nodes are connected by a plurality of loops, and a frame having a constant time period is provided on each loop.
The frame is divided into a plurality of time slots, the phases of all the loops and the time slots are synchronized, and a plurality of loops in a slotted link data communication system that performs required communication between nodes using a plurality of time slots In the data transmission / reception method used, each node has a buffer memory for transmission and a buffer for reception corresponding to each loop, and each node stores the information to be transmitted to other nodes in the buffer memory for transmission of each loop in duplicate.
And for each time slot time, it is determined whether the time slots on the plurality of loops are empty or not, and the information to be transmitted is sequentially transmitted to each empty time slot according to a certain predetermined order of the loop without duplication, and each node Temporarily stores the information sent to each node on each loop in the receiving buffer memory of the loop at a position corresponding to the sending node of the information and the order sent from the sending node, and then stores each information. A data transmission / reception method using a plurality of loops is characterized in that the same address in the loop reception buffer memory is simultaneously accessed to retrieve only the information actually received from the loop.

(Operation) In the data transmission / reception method using a plurality of loops, the present invention provides data to be transmitted by providing a transmission buffer and a reception buffer for each loop and storing information to be transmitted in the transmission buffer in a duplicated manner. Transmitting using a certain ordered loop free time slot in order, further, the received data is stored in the receive buffer memory of the loop in which it is received, at a position determined by the transmission node and the transmission order of the data, By simultaneously reading the same position in the reception buffer memory of each loop to reproduce the transmission data, the plurality of loops are controlled as if they were one loop of the sum of their speeds. According to the present invention, the operating speed of the buffer memory may be the speed of one loop, and the addition of loops can be performed in loop units.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram showing the configuration of each node in an embodiment of a data transmission / reception system using a plurality of loops of the present invention.
In FIG. 1, transmission data addressed to the same other node on the input highway is written in parallel to the transmission buffer memory 10 provided for the loop. The data is sequentially read in the empty time slots on the loop detected by the data transmitting unit 12 of each loop without duplication, and is sent out on the loop. The control is performed by the transmission control circuit 11. The transmission control circuit 11 is mainly composed of a counter, and scans all the time slot vacancy and blockage information detected by the data transmission section 12 of all loops for each time slot time, and counters every time there is vacant time slot information. Is counted up, a data transmission instruction is issued to the data transmission unit 12 of the loop which has detected the empty time slot information, and the value of the counter is supplied to the transmission buffer memory 10 of the loop as an address. The transmission buffer memory 10 reads out the data based on the address and sends the data to the empty time slot detected by sending to the data sending unit 12. By doing so, even if the same content is stored in the transmission buffer memory 10 of each loop, data is transmitted on the loop without duplication. Further, each transmission buffer memory 10 may be operated at a speed capable of reading the data for one loop.

As shown in FIG. 4, in each time slot, in addition to the transmission data, the block information I, the address SA and DA of the data transmission node and the reception node are displayed, and these displays are controlled by the transmission control circuit 11. The point is the same as in the conventional example.

In the receiving node, the data receiving unit 15 of each loop monitors the DA of each time slot, detects the data addressed to the own node, and takes it into the node. The taken-in data is stored in the receiving buffer memory 13 of the loop according to the instruction of the receiving control circuit 14 for each transmitting node and at the address position corresponding to the order sent from the transmitting node.
The reception control circuit 14 is composed mainly of a plurality of counters provided for each partner node, scans all the data receiving units 15 of all loops at each time slot time, and sends each loop to its own node at the time slot time. Check if data has been received. When it is received, the counter corresponding to the transmission node of the data is counted up, the storage address of the data is calculated from the value of the counter and the transmission node address, and the result is the reception buffer memory 13 of the loop. Send to. On the other hand, the data receiving unit 15 that has received the data is instructed to transfer the received data to the receiving buffer memory 13 of the loop. The reception buffer memory 13 stores the reception data sent from the data receiving unit 15 in accordance with the address designated by the reception control circuit 14. The receiving buffer memory 13 of each loop is given the same address space and is logically regarded as one receiving buffer memory. Therefore, at each address of the receiving buffer memory, the true data sent from the partner node is written in the receiving buffer memory 13 of any one loop, but is empty in the other receiving buffer memories 13. Has become. That is, data is written in the receiving buffer memories 13 corresponding to the loops at random.
Therefore, if all empty areas of the buffer memory are set to 0 in advance, the same address is given to the receiving buffer memories of all loops when outputting to the data output line, and the sum of those outputs is actually received from the loop. Data will be output to the outgoing line. The buffer memory may be cleared at the beginning of the frame at once, or immediately after outputting data each time each address is accessed. As described above, the data stored in the reception buffer memory 13 is read out for each sending node and in the order sent from the sending node, and sent to the outgoing line or terminal. Also in FIG. 1, the solid line indicates the flow of transmission / reception data, and the broken line indicates the flow of control information or control signal.

(Effects of the Invention) As described above, according to the present invention, the transmission and reception buffer memories are arranged in a loop-compatible manner.
The operation speed of the buffer memory can be the speed of one loop. Therefore, the maximum number of loops installed does not depend on the operating speed of the buffer memory.

In addition, when adding a loop, since the buffer memory is installed for loops, the operating speed of the buffer memory does not change, and it is easy to add one loop as a unit without changing the existing part. be able to.

Further, there is an advantage that the same loop-corresponding part can be used from a system having one loop to a system having many loops.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a node configuration in an embodiment of a data transmission / reception system using multiple loops of the present invention, and FIG. 2 is a schematic diagram showing a data transmission / reception system using multiple loops, Three
FIG. 4 is an explanatory diagram showing an example of transmitting data by treating a plurality of loops logically as one, FIG. 4 is a diagram showing a configuration of frames and time slots on the loop, and FIG. FIG. 3 is a schematic diagram of a node configuration in a conventional data transmission / reception system. In the figure, 10 and 20 are transmission buffer memories, 11 and 21 are transmission control circuits, 12 and 22 are data transmission units, 13 and 23 are reception buffer memories, 14 and 24 are reception control circuits, and 15 and 25 are data reception units. It is a department.

Claims (1)

[Claims] 1. A plurality of nodes are connected by a plurality of loops,
A frame with a fixed time period is provided on each loop, the frame is divided into a plurality of time slots, the frames of all the loops and the phases of the time slots are synchronized, and required communication is performed between the nodes using the plurality of time slots. In the data transmission / reception method using multiple loops in the slotted drink type data communication system, each node is provided with a buffer memory for transmission and reception for each loop, and each node stores information to be transmitted to other nodes in each loop. Store it in the sending buffer memory in duplicate,
And for each time slot time, it is determined whether the time slots on the plurality of loops are empty or not, and the information to be transmitted is sequentially transmitted to each empty time slot according to a certain predetermined order of the loop without duplication, and each node Temporarily stores the information sent to each node on each loop in the receiving buffer memory of the loop at a position corresponding to the sending node of the information and the order sent from the sending node, and then stores each information. A data transmission / reception method using a plurality of loops, wherein the same address of a loop receiving buffer memory is simultaneously accessed to retrieve only the information actually received from the loop.