JPH0724300B2 - Light receiving element with built-in circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a structure for increasing the photosensitivity of a light receiving element containing a signal processing circuit and increasing the response speed.

(Prior Art) A light receiving element with a built-in circuit is widely used for an optical sensor, an optical isolator, and the like. FIG. 6 shows an example of a sectional view of the structure of a conventional general photodetector with a built-in circuit. In the figure, on the surface of one P-type semiconductor substrate 1, a photodiode portion A which is a light receiving element and signal processing circuit constituent elements such as an NPN transistor B are formed. The photodiode portion A includes an N-type buried diffusion layer 2 embedded in a P-type semiconductor substrate 1, an N-type epitaxial layer 4 grown on the N-type diffusion layer 2, a P-type diffusion layer 6 on the surface (one electrode of the photodiode and And a collector compensation diffusion layer 5 (which becomes the other electrode of the photodiode) and the like. The NPN transistor portion B is composed of an N-type buried diffusion layer 2-1 buried in the P-type semiconductor substrate 1, an N-type epitaxial layer 4-1 grown thereon, and a P-type diffusion layer 6- on the surface thereof.
1 (which serves as the base of the transistor), N-type diffusion layer 7 (which serves as the emitter of the transistor) therein, and collector-compensating diffusion layers 5, 5 on the sides of the N-type epitaxial layers 4 and 4-1.
... and so on. The photodiode portion A, the NPN transistor portion B, and the other elements are isolated by element isolation P-type diffusion layers 3, 3, .... The dotted line in the figure
20 indicates the surface of the P-type semiconductor substrate 1 before the epitaxial growth.

(Problems to be Solved by the Invention) Due to recent demands for high-speed data transmission and improvement of S / N ratio, there has been a demand for high photosensitivity of a photodetector with a built-in circuit and high response speed.

In the structure shown in FIG. 6 described above, the N-type epitaxial layer 4 of the photodiode portion A and the NPN transistor portion B are
The N-type epitaxial layers 4-1 have the same thickness.

In order to increase the photosensitivity, it is necessary to make the thickness of the N-type epitaxial layer 4 of the photodiode part A sufficiently thick according to the wavelength of light used for signals. However, if the N-type epitaxial layer 4 becomes too thick, the generated photocarriers travel in the non-depleted portion of this layer for a long time, which prevents the response speed from being increased. Also, if the thickness of the N-type epitaxial layer 4-1 is increased, the NPN
The N-type epitaxial layer 4-1 of the transistor portion B also becomes thicker, which increases the collector resistance of the NPN transistor, which is an obstacle to speeding up the response speed.

On the other hand, in order to speed up the response speed of the light receiving element with a built-in circuit, it is effective to reduce the junction capacitance of the photodiode portion, and for that purpose, it is necessary to increase the specific resistance of the N-type epitaxial layer 4. However, if the specific resistance of the N-type epitaxial layer 4-1 is increased, the collector resistance of the NPN transistor is increased, which has the opposite effect to the speeding up of the response speed.

From the above, in order to achieve both the high photosensitivity of the light receiving element with a built-in circuit and the fast response speed, the photodiode section A
The N-type epitaxial layer 4 has a high specific resistance and a large thickness.
The N-type epitaxial layer 4-1 of the transistor portion B needs to have a low specific resistance and be thin, but it has been difficult to satisfy the contradictory conditions described above in the conventional structure.

(Means for Solving the Problem) In order to solve the above-mentioned problems in the present invention, the epitaxial layer of the photodiode portion is thickened by depositing two high-resistivity epitaxial layers on the N-type buried diffusion layer. And NP
In the N-transistor part B, a P-type buried diffusion layer for compensating the lower epitaxial layer is provided, an N-type buried diffusion layer is further provided under the upper epitaxial layer, and a deep N-type diffusion layer is provided in the upper epitaxial layer portion.

(Operation) With the above-described structure, the N-type epitaxial layer of the photodiode portion is thick with a high specific resistance, and the effective epitaxial layer of the signal processing circuit portion is the deep N-type diffusion layer above the P-type buried diffusion layer. The compensated low specific resistance makes it a thin part, and the photodiode part and the transistor part can each have an optimal structure.
Higher response speed can be realized at the same time.

(Embodiment) FIG. 1 is a cross-sectional view of an embodiment of the present invention, and FIGS. 2 to 4 are cross-sectional views of respective steps until the structure of FIG. 1 is obtained.

First, as shown in FIG. 2, the first N-type buried diffusion layer 2 and the NPN transistor part planned region (in the left part of the figure) on the surface of the P-type semiconductor substrate 1 are planned. A P-type buried diffusion layer 12 is formed on the right side of the drawing. At this time, the P-type buried diffusion layer 12 is also formed in a portion (left side in the drawing) separating the photodiode and the signal processing circuit element.

Next, as shown in Figure 3, for example, 100Ωcm
The first N-type epitaxial layer 8 having a high specific resistance is grown. At this time, the P-type buried diffusion layer 12 for element isolation on the left side of the figure and the P-type buried region of the NPN transistor part on the right side of the figure
Each of the type buried diffusion layers 12 diffuses inside the N type epitaxial layer 8 and spreads above the dotted line 20 which is the surface of the first P type semiconductor substrate 1. The first N-type buried diffusion layer 2 is also N
Diffuse into the epitaxial layer 8. Then, the second N-type buried diffusion layer 10 is formed on the surface of the NPN transistor portion planned region.
To form.

Further, as shown in FIG. 4, a second N-type epitaxial layer 9 having a high specific resistance of, for example, about 100 Ωcm is grown on the entire surface. And, in the NPN transistor part planned area,
For example, the deep N type diffusion layer 11 having an appropriate impurity concentration so as to have a specific resistance of about 1 Ωcm is formed. At this time, the second N type buried diffusion layer 10 includes the P type buried diffusion layer 12 and the N type diffusion layer.
It diffuses inside 11 to some extent. At the same time, P-type buried diffusion layer
The diffusion of 12 is promoted so that the lower epitaxial layer 8 of the signal processing circuit portion is compensated for P-type, and the high resistivity portion does not remain. In the figure, the dotted line 30 indicates the N-type epitaxial layer 8
Shows the surface when is grown.

From the surface of the substrate thus formed, P-type diffusion layers 13, 13, ... For separating the respective elements from each other, collector compensation diffusion layers 5, 5
The structure shown in FIG. 1 is obtained by forming the electrode 6 of the photodiode, the P-type diffusion layer for the base 6-1 of the NPN transistor, the emitter diffusion layer 7, and the like. The P-type diffusion layer 13 and the P-type buried diffusion layer 12 compensating for the lower epitaxial layer can separate elements in a small number of steps, and the separation width depending on the diffusion depth of the P-type diffusion layer 13 is small. it can. Since these P-type diffusion regions are wide, the resistance is low, and latch-up due to the parasitic thyristor operation does not easily occur. Further, when the sub-NPN transistor is provided in the signal processing circuit section, the lower high-resistivity epitaxial layer, which is a factor that makes the operation unstable, does not remain, so that the sub-PNP transistor with stable characteristics can be incorporated.

In FIG. 1, the epitaxial layer of the photodiode portion A can have a total thickness of the N-type epitaxial layer 8 having a high specific resistance and the N-type epitaxial layer 9 having a high specific resistance. It has a suitable structure. The thickness of the epitaxial layer of the NPN transistor portion B is almost the same as the thickness of the N-type epitaxial layer 9 of high specific resistance. Further, the specific resistance of each epitaxial layer is a high specific resistance as it is epitaxially grown in the photodiode portion A, and in the transistor portion B, when forming the N type diffusion layer 11, an impurity of an appropriate concentration is injected. As a result, the resistivity can be made sufficiently low.

FIG. 5 shows a modification of the structure shown in FIG. 1, in which the upper portion around the N-type epitaxial layers 8 and 9 of the photodiode portion A is formed by the collector compensation diffusion layer 5 and the lower portion is formed by the second N-type buried layer. It is surrounded by a diffusion layer 10. in this case,
Since the collector compensation diffusion layer 5 can be made shallower than the structure shown in FIG. 1, the chip area can be reduced. The series resistance of the photodiode part A can be lowered similarly to the case where the collector compensation diffusion layer 5 is deep.

(Effects of the Invention) According to the present invention, the photodiode portion has a thick epitaxial layer having a high specific resistance suitable for the photodiode portion.
It is possible to obtain a photodiode having a good structure and a high response speed with good photoelectric conversion efficiency. If the specific resistance and thickness of the epitaxial layer are set so as to be completely depleted at the bias voltage in the actual use state, the effect will be great. Also, the transistor part is
It effectively has a thin film epitaxial layer with a low specific resistance and becomes a high speed transistor. By combining the two,
It is possible to obtain a light receiving element with a built-in circuit that has a high degree of integration and is excellent in light sensitivity and response speed.

[Brief description of drawings]

FIG. 1 is a sectional view of one embodiment of the present invention, FIG. 2, FIG.
FIG. 4 is a sectional view showing each step for obtaining the structure of FIG. 1, FIG. 5 is a sectional view of another embodiment, and FIG. 6 is a sectional view of a conventional structure. 1 ... P-type semiconductor substrate, 2 ... N-type buried diffusion layer, 4,4-1
... N-type epitaxial layer, 5 ... Collector compensation diffusion layer, 8 ... N-type epitaxial layer (high specific resistance), 9 ...
N-type epitaxial layer (high specific resistance), 10 ... N-type buried diffusion layer, 11 ... N-type diffusion layer, 12 ... P-type buried diffusion layer, 13 ...
... P-type diffusion layer for element isolation, A ... Photodiode, B
...... Transistor

Claims (1)

[Claims] 1. A first conductivity type substrate having a second conductivity type buried diffusion layer and a first conductivity type buried diffusion layer, and a second substrate formed on the surface of the substrate. A first epitaxial layer having a high specific resistance and a large thickness, and a second conductive type buried diffusion layer formed in the first epitaxial layer above the first conductive type buried diffusion layer. And a second epitaxial layer of a second conductivity type having a high specific resistance and formed on the surface of the first epitaxial layer, wherein the light receiving element is formed on the surface of the second epitaxial layer. Of the first conductivity type diffusion layer serving as the pole of the second conductivity type, the first and second epitaxial layers, and the second conductivity type buried diffusion layer formed on the substrate serving as the other pole, The processing circuit includes a first conductivity type buried diffusion layer formed on the substrate and diffused upward to form a first circuit. Second conductivity type buried diffusion layer formed on the surface of the first epitaxial layer compensated for the second conductivity type and the second conductivity type formed on the second epitaxial layer formed on the surface. And a thin diffusion layer having a low specific resistance, and the light receiving element and the signal processing circuit are separated by a first conductive type diffusion layer.