JPH0724408B2 - Bias circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a bias circuit that can be used in a modulator of a communication device.

2. Description of the Related Art In recent years, data communication has spread rapidly, and modulators that play a key role in communication quality are required to have high performance.

Hereinafter, an example of a conventional bias circuit will be described with reference to the drawings. FIG. 3 is a block diagram of a conventional bias circuit. 11 is an input terminal for inputting a modulation signal, 12 is a power supply terminal, 13 is a capacitor for blocking a direct current component of the modulation signal input to the input terminal 11, 14 and Reference numeral 15 is a resistor for applying a bias voltage to the circuit in the subsequent stage, 16 is a modulator for inputting and modulating the modulation signal from which the direct current component is removed by the capacitor 13, and 17 is an output terminal of the modulator 16.

The operation of the bias circuit configured as described above will be described assuming that the NRZ signals of logic “1” and “0” are input as the modulation signal. Here, the voltage applied to the power supply terminal is V ₁ , and the resistors 14 and 15 are equal. As shown in the waveform diagram of FIG. 4, a modulation signal (a) consisting of logic “1” and “0” is input to the input terminal 11. The input modulation signal (a) becomes a waveform shown in the modulation signal (b) by the differentiation effect according to the time constants of the capacitor 13 and the resistors 14 and 15, and is input to the modulator 16. The modulator 16 performs modulation according to the input signal (b) and outputs it from the output terminal 17.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the configuration as described above, the modulator 16 outputs the signal (b) corresponding to the time constants of the capacitor 13 and the resistors 14 and 15.
Since the modulation is performed by the eye, when the capacitance value of the capacitor 13 is small, the eye pattern in the case where the logic "1" or "0" that appears between the time t ₂ and the time t ₃ of the signal (b) continues If the capacitance value is increased to prevent it, the transient state immediately after the transmission start time t ₁ will take a long time, and significant distortion will occur during demodulation in this part, and the ethical level can be judged. It had the problem of becoming difficult.

In view of the above problems, the present invention provides a bias circuit that does not deteriorate the aperture ratio of the eye pattern of the modulation signal input to the modulator and does not cause a transient state immediately after the start of transmission.

Means for Solving the Problems In order to solve the above problems, the bias circuit of the present invention has first and second reference voltage terminals for providing two reference voltages, and the first and second reference voltages. An input terminal for inputting a modulation signal that changes around the midpoint voltage, first and second resistors connected in series between the first and second reference voltage terminals, and the first and second resistors. A third resistor connected between the connection point of the resistor of the first resistor and the input terminal, and a fourth resistor connected in series between the connection point of the first and second resistors and the first reference voltage terminal. Resistance and a switch, the switch is turned on at the time of reception, the input terminal is kept at the same potential as the second reference voltage terminal, the switch is turned off at the time of transmission, and the input Input the modulation signal to the terminal, and connect it from the connection point of the first and second resistors. Those having a structure of obtaining the output.

Effect The present invention does not use the capacitor that blocks the direct current that has caused the time constant due to the above configuration, so that the aperture ratio of the eye pattern of the modulation signal input to the modulator does not deteriorate, and immediately after the start of transmission. The transient state of will not occur.

Example Hereinafter, a bias circuit which is an example of the present invention,
A description will be given with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the bias circuit of the present invention. In FIG. 1, 1 is an input terminal for inputting a modulation signal, 2 is a power supply terminal, 3 and 4 are resistors for applying a bias voltage to a circuit in a subsequent stage, 5 and 6 are resistors for applying a bias voltage during reception, 7 is a switch, Reference numeral 8 is a control terminal for controlling the switch 7, 9 is a modulator for inputting and modulating a modulation signal given a bias voltage by the resistors 3 and 4, and 10
Is an output terminal of the modulator 9.

The operation of the bias circuit configured as described above will be described assuming that the NRZ signals of logic “1” and “0” are input as the modulation signal. Here, the voltage applied to the power supply terminal 2 is V ₁ , the resistors 3 and 4 are equal, and the resistance values are R ₁ and resistor 5.
And 6 are also equal and the resistance value is R ₂ . The switch 7 is turned on when the control terminal 8 has a logic "1" and turned off when the control terminal 8 has a logic "0". Further, it is assumed that the control terminal 8 is inputted with a logical "1" at the time of reception and is inputted with a logical "0" at the time of transmission. First, the time t ₁ and as indicated by the waveform diagram of FIG. 2
Reception is performed after t ₄ and transmission is performed between times t ₁ and t ₄ , and a modulated signal composed of logic “1” and “0” as shown in the waveform diagram (a) is input to the input terminal 1. The control signal (b) is input to the control terminal 8 as described above. First, when receiving, input terminal 1
Since the logic "0" is input to the switch and the switch 7 is turned on, the input signal (c) of the modulator 9 becomes V _1/2 . Next, at the time of transmission, since the modulation signal is input to the input terminal 1 and the switch 7 is turned off, the modulator 9 has an amplitude of R ₁ / (R ₁ + 2R ₂ ) as the midpoint voltage of V _1/2. The signal (c) having the

As described above, according to the present embodiment, since the bias circuit is configured only with the resistor and the switch and the DC blocking capacitor is not used, the time constant does not occur, and the time constant can be seen from the time t ₂ to the time t _3. Even if the logical "1" or "0" continues, the deterioration of the aperture ratio of the eye pattern does not occur at all. Also, no transient state occurs immediately after the transmission start time t ₁ . Further, since the amplitude of the input signal to the modulator 9 is determined by the resistance values of the resistors 3, 4 and 6, the modulation degree of the modulator 9 can be arbitrarily set by changing these. Further, since the input signal to the modulator 9 is fixed to V _1/2 at the time of reception and the output of the modulator 9 is not modulated, this output can also be used as a local oscillation signal of the receiver.

In this embodiment, the switch 7 is a transistor,
It can be easily constructed using a gate IC. Further, the control signal (b) applied to the control terminal 8 can be easily generated by a microcomputer, a gate IC or the like.

In the present embodiment, the power supply voltage V ₁ is applied to the power supply terminal 2 and one end of the resistor 4 is grounded. However, any two may be used as long as they are reference voltages. Further, although the modulation signal is a rectangular wave in which the logic "1" is V ₁ and the logic "0" is 0, any signal that changes around the midpoint voltage of the two reference voltages may be used. Further, although the resistors 3 and 4 are set equal to each other, when the system is designed, it may have variations as long as it is within the allowable range of the amplitude variation of the modulator input signal. Also,
Although the resistors 5 and 6 are also equal to each other, when the system is designed, the resistors 5 and 6 may have variations as long as they are within the allowable amplitude variation range of the modulator input signal.

As described above, according to the present invention, since the bias circuit is composed only of the resistor and the switch and the DC blocking capacitor is not used, the aperture ratio of the eye pattern is open even when the logic "1" or "0" continues. It is possible to obtain an excellent effect that no deterioration occurs at all, and a transient state immediately after the start of transmission does not occur.
Further, the modulation degree of the modulator can be arbitrarily set by changing the resistance value, and the output of the modulator can be used as a local oscillation signal of the receiver at the time of reception.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 (a).
(B) and (c) are waveform diagrams of each part of the embodiment of the present invention, FIG. 3 is a block diagram of a conventional bias circuit, and FIG. 4 (a).
(B) is a waveform diagram of each part of the conventional bias circuit. 1 ... Modulation signal input terminal, 2 ... Power supply terminal, 3 and 4 ... Resistors for applying bias voltage to the circuit in the subsequent stage, 5 and 6 ... Resistors for applying bias voltage to the receiving circuit, 7 ... Switch, 8 ... … Switch control terminal, 9 …… Modulator, 10
...... Modulator output terminal.

Claims (1)

[Claims] 1. A first and second reference voltage terminal for providing two reference voltages, an input terminal for inputting a modulation signal which changes around a midpoint voltage of the first and second reference voltages, and First
First and second connected in series between the first and second reference voltage terminals
Resistor, a third resistor connected between the connection point of the first and second resistors and the input terminal, a connection point of the first and second resistors and the first reference voltage terminal. A fourth resistor and a switch connected in series between and, the switch is turned on during reception, and the input terminal is kept at the same potential as the second reference voltage terminal; A bias circuit in which a switch is turned off, the modulation signal is input to the input terminal, and an output is obtained from a connection point of the first and second resistors.