JPH0728376B2 - Horizontal deflection circuit - Google Patents

Description

The present invention relates to a horizontal deflection circuit used in a display device using a picture tube such as a CRT.

[Conventional technology]

A picture tube such as a CRT is equipped with a horizontal deflection coil on its neck, and the output from the horizontal deflection circuit is used to periodically deflect the electron beam.

FIG. 5 is a circuit diagram showing a configuration of an example of a conventional horizontal deflection circuit, which is shown in Japanese Patent Application No. 1-29061 previously filed by the applicant of the present application.

That is, reference numeral 1 denotes a horizontal oscillation circuit that receives a horizontal synchronization signal pulse P output from a pre-stage circuit (not shown) and outputs an oscillation output Vosc synchronized with the horizontal synchronization signal pulse P.
The output Vosc from this horizontal oscillation circuit 1 is the horizontal excitation circuit 2
To obtain an excitation output Vd. This excitation output Vd is applied to the other end of the excitation transformer 3 having one end to which the power supply + EB is applied, and the first base is applied to the base electrode of the horizontal output transistor 4 of the NPN provided on the secondary side of the excitation transformer 3. It is output via a resistor.

Incidentally, 6 is a damper diode connected in parallel between the collector and emitter of the horizontal output transistor 4, 7 is a return resonance capacitor which is also connected in parallel, 8 is a horizontal deflection coil, 9 is an S-shaped correction capacitor, and 10 is It is a horizontal output transformer or a flyback transformer.

As described above, the circuits having the configurations shown by reference numerals 1 to 10 are adopted in a normal television receiver or the like.

With such a configuration, by a well-known operation, a horizontal retrace pulse Vc of a half-sine wave is generated in the collector of the horizontal output transistor 4, and the horizontal deflection coil 8 has a horizontal deflection cycle synchronized with the incoming synchronization signal. A sawtooth wave current Iy flows.

The horizontal deflection coil 8 is attached to the neck of a picture tube (not shown) and deflects the electron beam of the picture tube to the left and right.

When the circuit of FIG. 5 is dedicated to horizontal deflection, 10 acts as a horizontal output transformer, and a direct current (power) voltage + EB is applied to one end of the primary winding 10a to supply power to the circuit.

When the circuit shown in FIG. 5 also functions as a high voltage generating circuit, 10 acts as a flyback transformer, boosts the horizontal retrace pulse Vc to the secondary winding 10b and outputs it, and the rectifying circuit ( After being converted into a direct current high voltage through (not shown), it is applied to the anode of the picture tube.

Here, in the case where a horizontal deflection frequency of around 15.75 KHz is handled like an ordinary television receiver, the range of the configurations shown by the above-mentioned reference numerals 1 to 10 can be sufficiently dealt with.

However, in recent years, in a display device using a picture tube used for CAD or the like, the horizontal deflection frequency tends to increase by 84 KHz, 97 KHz, 128 KHz or the like in accordance with the demand for higher definition of the image.
In the case where such a horizontal deflection frequency is to be adopted, in the circuits similar to the conventional television receivers shown by reference numerals 1 to 10 above, since the speed at which the horizontal output transistor 4 is cut off is slow, a large loss occurs here. Will occur.

Therefore, in order to increase the speed when the transistor is cut off,
It is usually necessary to take some measures in the circuit of the television receiver, and the configuration shown by reference numerals 11 and 12 in FIG. 5 can be adopted.

That is, 11 is a monostable multivibrator circuit (hereinafter referred to as MM) that is triggered by the rising edge of the rectangular wave of the output Vosc of the horizontal oscillation circuit 1 and outputs the rectangular wave Vdn of a constant pulse period (negative period here). 12 is this square wave Vd
It is a storage carrier extraction circuit which receives n and draws the reverse base current Ibn during the storage period from the base of the horizontal output transistor 4 through the second base resistor 13 during this pulse period.

FIG. 6 illustrates the operation of the above circuit. First, A shows an output waveform Vosc of the horizontal oscillation circuit 1, and this waveform is a rectangular wave having a pulse width that continues for a fixed time tosc from time T1. Next, B shows an output waveform Vd of the horizontal excitation circuit 2, which is a substantially rectangular wave waveform bottoming at time T1. Then, the rising time T2 of the rectangular wave Vd is after the oscillation pulse width tosc and the accumulation time ts1 of the excitation transistor in the horizontal excitation circuit 2 have elapsed from the previous time T1.

Further, C shows the base current Ib of the horizontal output transistor 4, which flows out in the positive direction from the time T2, and this current turns to the negative direction at the time T1. And horizontal output transistor 4
After the storage time ts2 of has passed, it returns to zero again.

On the other hand, the MM11 is triggered at the rising portion of the oscillation waveform Vosc as shown in D, and its output Vdn is a bottoming period lasting for a fixed time tdn determined by the value of a time constant circuit (not shown) externally attached to the MM11. have.

This waveform Vdn is applied to the accumulated carrier extracting circuit 12 and substantially corresponds to the waveform Vdn as shown in FIG. 6E, and the accumulation time ts of the transistors in the accumulated carrier extracting circuit 12 is
A rectangular wave pulse Vn having a bottoming width wide by 3 is obtained. During the pulse width of the rectangular wave Vn (bottoming period in this case), the reverse base current Ibn flows through the second base resistor 13 of the output transistor 4 as shown in FIG. 6F.

Then, in order to energize this current Ibn, a negative auxiliary power supply -E is added as an operating power supply of the storage carrier extraction circuit 12.

The base current Ib shown in C here flows out at time T2 as shown by the broken line in a normal circuit that does not include the MM11 and the storage carrier extraction circuit 12, but as described above, it has a rectangular waveform.
When Vn is added through the resistor 13, it starts flowing at the rising time T3 of Vn as shown by the solid line. Therefore, at the same time, the collector current Ic of the output transistor 4 also flows out as shown in FIG. 6H.

On the other hand, at time T4 when the reverse base current Ibn ends, the collector current Ic of the output transistor 4 becomes zero and enters the cut-off state, and a sine half-wave collector pulse is generated as shown in FIG. 6G.
Vc is generated. This pulse Vc becomes zero again after the pulse width (retrace time) tr mainly determined by the resonance period of the retrace resonance capacitor 7 and the horizontal deflection coil 8, and at this time T5
To the damper diode 6 as shown by the broken line in FIG. 6H.
Current Id of the collector current Ic
Smoothly connect to.

When a current that linearly increases during the scanning period ts is formed by the damper current Id and the collector current Ic in this way, the sawtooth wave current Iy is generated in the deflection coil 8 together with the current of the retrace resonance capacitor 7. Flows to perform horizontal deflection operation.

[Problems to be Solved by the Invention] By the way, assuming that the time when the collector current Ic shown in FIG. 6H crosses the zero level is T6, the position of the conduction start point T3 of the current Ic is the end point T5 of the retrace time and the T6. Must be in between. If the conduction start time T3 comes before T5, the transistor 4 becomes conductive while the collector voltage Vc still remains, resulting in a large power loss and damage to the transistor 4.

On the contrary, when the position of the conduction start time point T3 comes after the above-mentioned T6, the collector current Ic is temporarily interrupted here, so that a small pulse is generated, which also causes a large loss.

Therefore, it is safest that the ideal position of the conduction start time point T3 is located within a quarter of the scanning period ts from the beginning of the scanning period ts. However, as mentioned above, when the horizontal deflection frequency becomes higher, the value of ts / 4 itself becomes smaller,
It becomes difficult to ideally align the position of T3 mentioned above.

For example, if the horizontal deflection frequency becomes 100 kHz, the value of ts / 4 becomes only 2 μsec. With such a short value, it is expected that the ideal condition of the position of T3 will be easily deviated due to the variation of the circuit condition, and this will seriously affect the reliability as described above, and therefore the high value of the display device. It was an important issue that had to be solved in order to make it finer.

[Means for Solving the Problems]

The horizontal deflection circuit of the present invention has been made in order to solve the above problems, and includes a horizontal oscillation circuit that outputs a signal synchronized with a horizontal synchronization signal, and an excitation circuit that operates by the output of the horizontal oscillation circuit. A horizontal deflection output transistor that is switched by the output of the excitation circuit; a monostable multivibrator circuit that is triggered by the output of the horizontal oscillation circuit and whose output pulse width is controlled by a control signal; a base electrode of the horizontal output transistor and an auxiliary power supply. And a storage carrier extraction circuit that is operated by the output from the monostable multivibrator circuit and a logical product of the output of the storage carrier extraction circuit and a rectangular wave pulse having a pulse width of approximately the first half of the horizontal scanning period. Based on the pulse output of the control signal generator that controls the output pulse width of the monostable multivibrator circuit. It is intended and a circuit.

[Action]

According to the horizontal deflection circuit having the above configuration, a storage carrier extraction circuit for extracting the storage carrier from the base electrode of the horizontal deflection output transistor that is switched by the output of the excitation circuit is provided, and the operation timing of this storage carrier extraction circuit is such that the horizontal deflection frequency is Even if it changes, since it is controlled so that it always works at a fixed time position, it is possible to solve the problem that a large current flows through the horizontal deflection output transistor due to the switch timing shift, and the output transistor is destroyed due to power loss.

[Embodiment] FIG. 1 shows an embodiment of a horizontal deflection circuit of the present invention. Note that, here, the portions denoted by the same reference numerals as those in FIG. 5 described above perform substantially the same operation, and therefore detailed description thereof will be omitted.

The newly added 10c is the horizontal output transformer 1
A small pulse Vc3 proportional to the collector pulse Vc is obtained from the winding provided at 0. Further, 14 is a waveform shaping circuit that shapes and inverts the pulse Vc3 and outputs a rectangular wave Vs having a width of the scanning period ts, and 15 is a rectangular wave having a width of ts / 2 triggered by the rising portion of the rectangular wave Vs. It is a second monostable multivibrator (2nd MM) that outputs Vhf.

Further, after the output rectangular wave Vn of the storage carrier extraction circuit 12 is set to n through the inverter 16, it is added to the AND circuit 17 together with the output Vhf.

The square wave of the product of n and Vhf obtained by the AND circuit 17 is smoothed by the resistor 18 and the capacitor 19 connected to the output terminal of the AND circuit 17, and the average value voltage Ea is obtained by the next operational amplifier 20. It is compared with the reference DC voltage Es. And operational amplifier
The control signal Eo obtained by 20 is applied to the constant current circuit 21 that determines the pulse width of the first MM 11, and controls the amount of this current.

As described above, in the circuit configuration shown by reference numerals 10c and 14 to 21, the first M
It forms a control signal generation circuit CC for controlling the output pulse width of M11.

FIG. 2 shows the operation of the above configuration. First, A is the base current Ib of the output transistor 4, and as described above, the output Vn of the accumulated carrier extraction circuit 12 is as shown in FIG. Then, the rising point of the output Vn coincides with the current rising point T3 of the base current Ib. Further, this output Vn is inverted by the inverter 16 to obtain n shown in FIG. 2C.

On the other hand, D in the figure is the output obtained from the winding 10c,
This is a pulse Vc3 proportional to the collector pulse Vc, which is sliced and inverted by the shaping circuit 14 to become a high level for almost the scanning period ts as shown in FIG.
To get Furthermore, this rectangular wave Vs is the second M
The M15 is triggered to output a rectangular wave Vhf that is at a high level for about half the scanning period ts as shown in FIG.

Therefore, if a logical product of this rectangular wave Vhf and the above n is created by the AND element 17, as shown in FIG. 9G, the retrace time tr ends, that is, starting from time T5, the base current Ib (collector of the output transistor 4 A rectangular wave Va having a high-level width ta up to the time T3 when the distribution of the current Ic) starts is obtained.

The DC voltage Ea obtained by averaging the rectangular wave Va with the resistor 18 and the capacitor 19 is proportional to the length of the level width ta.

This voltage Ea is proportional to the reference voltage Es in the operational amplifier 20. The output Eo is used as a control signal to control the constant current circuit 21 that determines the output pulse width of the first MM 11.

Therefore, if the voltages Ea and Eo move, the rise of the rectangular wave Vn, that is, the position at time T3 is influenced. Therefore, if the value of the voltage Ea exceeds the reference voltage Es, the movement of the constant current circuit 21 due to Eo acts in such a direction as to move the T3 position forward. This means that the entire circuit forms a negative feedback loop, and the time position T3 is determined at a position where Ea always matches Es. Therefore, the reference voltage Es applied to the operational amplifier 20
If the value of is set to the position of T3, that is, the length of ta is just one-fourth of the scanning time ts, this state can be stably maintained.

Next, FIG. 3 shows an example of a concrete circuit of the main part of FIG. Note that, in FIG. 3, the portions designated by reference numerals 18 to 20 are the same as those in FIG.

Here, 22 and 23 are resistors for dividing the DC power source + E, and are used as a reference voltage Es applied to the operational amplifier 20.
Is being generated. Further, 24 and 25 are resistors and capacitors for preventing oscillation, which are connected in series between the output terminal of the operational amplifier 20 and the single use of the inverting input. 26 is the constant current circuit
21 is a coupling resistor, 27 is a bypass capacitor, 28 is a PNP transistor whose base is connected to the coupling resistor 26, the emitter of this transistor 28 is connected to the DC power source + E through the emitter resistor 29, and the cochleter is the first. 1
It is connected to the current input terminal of MM11. And the first MM
A capacitor 30 for determining the time constant is externally connected to 11.

According to the above configuration, the voltage Ea applied to the operational amplifier 20
And Es, which is the result of comparison between Es and Es, are added to the base of the transistor 28, and a current I determined by the emitter resistance 29 (resistance value R) flows. If the base-emitter voltage of the transistor 28 is Vbe, this current I will flow a constant current I determined by I = (E-Eo-Vbe) / R regardless of the charging condition of the capacitor 30. Since the charge-up speed of the capacitor 30 is determined depending on the size, the output rectangular wave pulse Vdn output from the first MM11 as a result.
Pulse width is determined.

Therefore, when the voltage Eo is moved, the current I changes and the output pulse width of the MM11 changes, so that the position at time T3 shown in FIG. 2 moves back and forth.

From the previous equation, if Vbe changes with temperature, the value of current I changes, but since it is in a closed loop, there is no problem, and AND circuit 1
The circuit operates so that the average value Ea of the output Va of 7 always matches the voltage Es, and the pulse width ta can always be set to 1/4 of the scanning time ts.

In the above, the reference voltage Es has been shown to have a constant value, but it can be automatically set to a voltage corresponding to a quarter of ts. This basic circuit is shown in FIG.

In this figure, the second MM15 and the operational amplifier 20 have almost the same functions as the same numbered portions in the first figure. However, the difference is that the width of the output rectangular wave Vhf of the 2nd MM is not fixed,
That is, it is controlled by the constant current circuit 39.

Here, the rectangular wave Vs that has become high level for the scanning period ts is
After being added to the second MM15 as before, at the same time as the DC voltage E1s through the smoothing circuit of the resistor 31 and the capacitor 32,
The voltage is divided by the voltage dividing circuit of the resistance groups 33, 34 and 35. At this time, assuming that the resistance value of the resistor 35 is Ro, the resistor 34 is also Ro, and the resistor 33 is
Set to a resistance value of 2Ro.

On the other hand, the output rectangular wave Vhf of the second MM15 is the resistor 36, the capacitor
Newly added op amp 38 smoothed by 37 and
Is added to the inverting terminal of. Further, to the non-inverting terminal of the same operational amplifier 38, half the terminal voltage E1s of the capacitor 32, that is, the voltage at the connection point of the resistors 33 and 34 is applied.

The output of the operational amplifier 38 controls the newly added constant current circuit 39. In this case, the specific circuit of the constant current circuit 39 is substantially the same as the reference numeral 21 shown in FIG. Also, at the connection point between the resistors 34 and 35, a voltage of 1/4 of the voltage E1s is obtained, and this is obtained by the operational amplifier 20.
Is applied as a reference voltage to the inverting terminal of.

With the above configuration, the pulse width of the output rectangular wave Vhf of the second MM15 is controlled so that it is always half the pulse width ts of the input rectangular wave Vs. Further, the voltage at the connection point between the resistors 34 and 35 is the pulse width of the rectangular wave Vs, that is, 4 in the scanning period ts.
Since this is a voltage proportional to 1/1, the operational amplifier 20
When compared with the average value Ea of the rectangular wave Va, the pulse width ta of the output Va of the AND circuit 17 is automatically ¼ of the scanning period ts.
Will be in the ideal state.

This is because the rise time position T3 of the output Vn of the first MM11 controlled by the operational amplifier 20 is moved back and forth as described in FIG.

At this time, the driving power supplies of the first MM11, the shaping circuit 14, the second MM15, and the AND circuit 17 are all the same + E, and therefore the voltage of each rectangular wave pulse n, Vs, Va, Vhf is zero. The condition is to swing between + E.

As shown in Fig. 4, the value of pulse width ta, that is, time position
If T3 is automatically determined, it will not be affected by variations in each part of the circuit, and even if the horizontal deflection frequency itself changes, the position at time T3 will automatically be the ideal one-fourth half of the scanning period ts. There is an advantage that the target position is maintained.

Conventionally, in this type of high-definition display, the standard horizontal frequency is not always fixed, and in many cases it is configured as a variable frequency type that changes the horizontal frequency according to the computer equipment of the other party. In this case, it is very suitable.

Further, so far, the pulse Vc3 caused by the horizontal deflection is used to generate the rectangular wave Vs. In the case of a so-called separated type in which horizontal deflection and high voltage generation are performed by separate circuits, this may be replaced with a pulse based on the pulse Vhv (not specifically shown) for high voltage generation.

In general, in order to obtain good high voltage regulation and reduce the loss of the circuit as much as possible, the high voltage pulse Vhv often has a wider pulse width than that on the deflection side. Therefore, the portion corresponding to the scanning period is narrower than that on the deflecting side, and in that sense, using Vhv as the reference pulse allows more precise control of the T3 position.

However, in this case, it is necessary to adjust the phase relationship between the deflection side pulse and the high voltage side pulse, but as the adjusting means in this case, the technique described in Japanese Patent Application No. 63-322144 previously filed by the applicant of the present application is used. Available.

〔The invention's effect〕

As described above, according to the horizontal deflection circuit of the present invention, the conduction start time of the horizontal output transistor can always be set in a stable and ideal state, and particularly when the horizontal frequency is high or when the horizontal deflection frequency is different. When used in
The operation safety of the horizontal output transistor can be secured.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the horizontal deflection circuit of the present invention, FIG. 2 is a timing chart diagram for explaining the operation of the embodiment of FIG. 1, and FIG. 3 is shown in FIG. FIG. 4 is a block diagram showing a part of the embodiment in more detail, FIG. 4 is a block diagram showing another embodiment of the present invention, FIG. 5 is a block diagram showing a configuration of a conventional example, and FIG. FIG. 6 is a timing chart diagram for explaining the operation of the example shown in FIG. 5. 1 ... Horizontal oscillation circuit, 2 ... Horizontal excitation circuit, 4 ... Horizontal output transistor, 11,15 ... Monostable multivibrator circuit, 12 ... Storage carrier extraction circuit, 21 ... Constant current circuit, CC ... Control signal generation circuit.

Claims (1)

[Claims] 1. A horizontal oscillation circuit that outputs a signal synchronized with a horizontal synchronization signal, an excitation circuit that operates by the output of the horizontal oscillation circuit, a horizontal deflection output transistor that switches by the output of the excitation circuit, and the horizontal oscillation. An output from the monostable multivibrator circuit connected between the base electrode of the horizontal output transistor and an auxiliary power supply, the monostable multivibrator circuit being triggered by the output of the circuit and having an output pulse width controlled by a control signal; Of the monostable multivibrator circuit, based on the pulse output of the AND of the accumulated carrier extracting circuit operated by, and the output of the accumulated carrier extracting circuit and the rectangular wave pulse having the pulse width of approximately the first half of the horizontal scanning period. A horizontal deflection circuit including a control signal generation circuit for controlling an output pulse width