JPH0738586B2 - Test circuit - Google Patents

Description

The present invention relates to a semiconductor integrated circuit, and more particularly to a test circuit for a digital / analog converter.

[Conventional technology]

Conventionally, testing of digital-analog converters (hereinafter abbreviated as D / A converters) has been performed by directly measuring the output terminal voltage of the D / A converters.

[Problems to be solved by the invention]

In the conventional test method described above, since the output terminal of the D / A converter is directly measured, the D / A voltage is measured by measuring the output terminal voltage for all patterns of the digital signal input to the D / A converter. Although a complete test of the converter operation can be performed, when the D / A converter and the controlled circuit controlled by this are integrated in one chip of the integrated circuit, the operation of the D / A converter is tested. For this, the output terminal of the D / A converter must be put out to the pin of the integrated circuit as a terminal for testing. In particular, when a large number of D / A converters and their controlled circuits are integrated in one chip, the number of pins must be increased by the number of D / A converters, which increases the number of pins in the integrated circuit. There is.

The test circuit of the present invention is a D / A converter having a circuit configuration for performing D / A conversion by switching a current source according to a pattern of a digital input signal, such as an R-2R ladder D / A converter. Even if a large number of controlled circuits are integrated in one chip, it is possible to detect a failure of the D / A converter and the control circuit that supplies the input signal of the D / A converter with one pin for testing. ing.

An object of the present invention is to provide a simple test circuit capable of detecting a failure of a large number of D / A converters in an integrated circuit and a control circuit which provides an input signal of the D / A converter with one test pin. To do.

[Means for solving problems]

The test circuit of the present invention has a means for detecting a current change of the bias supply source of the D / A converter, and the D / A converter changes
It detects a failure of the control circuit that supplies the input signal of the A converter and its D / A converter.

〔Example〕

Next, the present invention will be described with reference to the drawings. One embodiment of the present invention is shown in FIG. The configuration of this embodiment is as follows.

D / A converters 2 and 8 are connected in parallel to the bias line V ₆ . Connected to the D / A converters 2 and 8 are control circuits 4 and 10 for applying input signals to the D / A converters 8 and controlled circuits 3 and 9 controlled by the output voltage of the D / A converters. A bias supply source 1 that applies a bias to the D / A converters 2 and 8 includes a power source 6, a vibration stimulator 7 that forms a voltage follower circuit via a transistor Q1, and a current source 11. The collector of the transistor Q1 is connected to the test terminal T. This embodiment is an example in which a failure of a D / A converter and its control circuit connected in parallel to the same bias line can be detected by a test terminal 1 pin.

Next, the operation of this embodiment will be described. Since both D / A converters 2 and 8 are R-2R ladder type D / A converters and operate in the same manner, the operation will be described by taking the D / A converter 8. The switches S ₄ , S ₅ and S ₆ are input signals D ₄ and D _{4 of} the D / A converter 8, respectively.
It is turned on when D ₅ and D ₆ are 1 (high level), and turned off when 0 (low level).

The resistors R _{8 to} R ₁₂ and the current sources I _{4 to} I ₆ have the following relationship.

_{R 8 = R 9 = R 11} = R R 10 = R 12 = 2R I 4 = I 5 = I 6 = a I current source I ₄ a voltage drop across the output terminal V ₀₂ △ V
₀₂ (D ₄ ) Similarly, let ΔV ₀₂ (D ₅ ) and ΔV ₀₂ (D ₆ ) be the voltage drops generated at the output terminal V ₀₂ by the current sources I ₅ and I _6. However, RR 'represents the parallel impedance of R and R'.

From this, the output voltage V ₀₂ becomes as follows.

From this V ₀₂ is the input signal to the most significant bit D ₆ (D _4, D ₅
It can be seen that this is the D / A conversion output of D ₆ ). The output V _{01 of the} D / A converter 2 is also as follows.

_{However, R 1 = R 2 = R} 4 = R 6 = R ', R 3 = R 5 = R 7 = 2R', I 0 =
I ₁ = I ₂ = I ₃ = I ′ The potential of the bias line V ₆ is + of the vibration enhancer 7 because the vibration absorber 7 and the transistor Q1 form a voltage follower circuit.
It becomes equal to the potential of the power supply 6 given to the side input. The current source 11 is a constant current source necessary for keeping the transistor Q1 ON even if the switches S _{0 to} S ₆ of the D / A converters 2, 8 are all OFF.

The detection of the failure of the two D / A converters 2 and 8 and the control circuits 4 and 10 which supply the input signals thereof is performed as follows, for example. First, control circuit 10 to control D / A converter 8
Input signal _{(D 4, D 5, D} 6) is set to be (0, 0, 0) of turns OFF the switch S ₄ to S ₆ of the D / A converter 8. At this time, the current I ₈ flowing into the D / A converter 8 from the bias line V ₆ should be zero. Then, the input signal of the D / A converter 2 (D
₀ , D ₁ , D ₂ , D ₃ ) are changed in order from (0,0,0,0) to (1,1,1,1). If there is no failure in the control circuit 4 and the D / A converter 2, the current from the bias line V ₆ to the D / A converter 2 depends on the number of one of (D ₀ , D ₁ , D ₂ , D ₃ ). Flows. That I ₂ becomes as follows if the V ₆ and the inflow current I ₂ to the D / A converter.

I ₂ = nI ′ (1) where n is one of (D ₀ , D ₁ , D ₂ , D ₃ ) If the set input signal (D ₀ , D ₁ , D ₂ , D ₃ ) If the equation (1) is not satisfied for the pattern, the control circuit 4
Alternatively, it can be determined that the D / A converter 2 has a failure.

Normally, increasing exciter 7 - input impedance on the side is very high, the base current of the transistor Q1 is also possible to ignore, and the current source 11 so constant current, the collector current of the transistor Q1 I _T, a constant current If the current of the source 11 is i ₁₁ , then I _T is as follows.

I _T = I ₂ + i ₁₁ = nI ′ + i ₁₁ Therefore, the change in I _T corresponds to the change in the pattern of the input signal (D ₀ , D ₁ , D ₂ , D ₃ ).

Connect the collector of the transistor Q1 to the test terminal T and connect the ammeter 5 to the power supply terminal V _CC as shown in Fig. 1.
_{If T} is measured, if I _T does not change in response to the pattern of the input signal (D ₀ , D ₁ , D ₂ , D ₃ ), the D / A converter 2,
Alternatively, it can be determined that the control circuit 4 has a failure.

Next, in detecting the failure of the D / A converter 8 and the control circuit 10, the input signals (D ₀ , D ₁ , D ₂ , D ₃ ) are set to (0,0,0,0) and I _{2 is set} to 0, If the pattern of the input signals (D ₄ , D ₅ , D ₆ ) is changed, the ammeter 5 detects the change in I _T , and the same operation can be performed.
The case where two D / A converters are connected to the same bias line has been described above, but it is clear that failure can be similarly detected when three or more D / A converters are connected.

FIG. 2 shows a second embodiment of the present invention. This embodiment is a test circuit for detecting a failure of a D / A converter having a different bias line and its control circuit with a test terminal 1 pin. Also, instead of the ammeter shown in FIG. 1, a resistance and a voltmeter are used as means for detecting changes in the inflow current of the D / A converter.

The configuration of this embodiment is as follows. The bias line V ₆ is connected to the D / A converter 2. As in FIG. 1, the control circuit 4 and the controlled circuit 3 are connected to each other. Bias line V ₆ has a large number of D / A's as in FIG.
A converter may be connected. The bias supply source 16 of these D / A converters has the same structure as the bias supply source 1 of FIG. There is a D / A converter 13 and its control circuit 15 and controlled circuit 14 connected to a bias line V ₁₆ having a potential different from that of the bias line V ₆ . These configurations are the same as in FIG. As in the case of FIG. 1, more D / A converters may be connected. These bias supply sources 20 also have the same circuit configuration as the bias supply source 1 of FIG. Tonranjisuta Q bias source 20 of the transistor Q1 and the bias line V ₁₆ of bias supply 16 of the bias line V ₆
Connect the collector of 2 and connect to the resistor 20 and the test terminal T. The other end of the resistor R ₂₀ is connected to the power supply terminal V _CC .

The failure detection of this embodiment is performed as follows, for example. The collector currents of the transistors Q1 and Q2 are I _T1 and I _T2 , respectively.
The inflow current of the D / A converter 2 connected to the bias line V ₆ is set to _{0 by} setting the input signals (D ₀ , D ₁ , D ₂ , D ₃ ) to (0,0,0,0) . Similarly, when a D / A converter is connected to the bias line V ₆ , the inflow current is set to 0. Then, I _T1 becomes only a constant current by the constant current source 11. Then, if the pattern of the input signal is changed in the D / A converter connected to the bias line V ₁₆ as in the example of FIG. 1, I _T2 changes corresponding to the pattern of the input signal. I for resistor R _20
Since the sum current of _T1 and I _T2 flows, if the voltage change between the power supply terminal V _CC and the test terminal T is measured with the voltmeter 19, the D / A converter connected to V ₁₆ and the control circuit malfunction. Can be detected. Next, the inflow current of the D / A converter connected to the bias line V ₁₆ is set to 0 and the D / A converter connected to the bias line V ₆ is
B converter line A ₁₆
The same as the detection of the failure of the D / A converter and control circuit connected to. Further, in this embodiment, if R ₂₀ is built in the integrated circuit, the test terminal T may be opened except during the test. Also, in the example of FIG. 2, the number of bias lines is two, but when the number of bias lines is three or more, if the bias supply source has the same configuration as in FIG. You can

In the above example, the R-2R ladder type circuit is used for the D / A converter, but the current of the current source is the bias supply circuit in the D / A converter that performs D / A conversion by switching the current source with the switch. R-2R if the D / A converter is configured to be supplied from
The present invention is applicable not only to the ladder type. Such D / A
As an example of the converter, for example, a D / A converter 21 shown in FIG.
There is. 22 is a control circuit, 23 is a controlled circuit, V
₂₁ is a bias line. Select the current sources I _{11 to} I ₁₄ as follows.

8I ₁₁ = 4I ₁₂ = 2I ₁₃ = I ₁₄ = I ″ When the input signals D _{11 to} D ₁₄ are 1, switches S _{11 to} S ₁₄ are ON, 0
If it is turned off at this time, the output voltage V ₀₃ of the D / A converter 21 becomes as follows.

Input signal (D ₁₁ to the most significant bit D ₁₄ Thus,
It can be seen that the values are D / A-converted values of D ₁₂ , D ₁₃ , D ₁₄ ).

〔The invention's effect〕

As described above, according to the present invention, by detecting the current change of the bias supply source of the D / A converter, it is possible to detect the failure of a large number of D / A converters by providing only one test terminal. There is.

[Brief description of drawings]

1 and 2 are block diagrams of an embodiment of the present invention, and FIG. 3 is an example of a D / A converter to which the present invention can be applied. 1,16,20 …… Bias supply source, 6,16,18 …… Power supply, 2,8,1
3,21 …… D / A converter, 3,9,14,23 …… Controlled circuit, 4,10,1
5,22 ...... Control circuit, 5 ...... Ammeter, 19 ...... Voltmeter, 7,17 ...... Amplifier, 11,12 ...... Current source, R _{1 to} R ₂₁ ...... Resistance, I _{0 to} I ₁₄ ... … Current source, S _{0 to} S ₁₄ …… Switch, D _{0 to} D
₁₄ …… Input signal, V ₀₁ , V ₀₂ , V ₀₃ …… Output terminal, V ₆ , V ₁₆ , V
₂₁ …… Bias line, Q1, Q2 …… Transistor, V _CC …
… Power supply terminal, T… Test terminal, I ₂ , I ₈ , I ₁₁ , I _T , I _T1 , I _T2
...... Current.

Claims (1)

[Claims] 1. A digital-analog that performs digital-analog conversion by selectively switching a plurality of current sources according to the value of each bit of an input signal to generate a voltage drop corresponding to the input signal from the potential of a bias line. In a test circuit used for a converter, the bias line has a constant potential by controlling a base potential of the transistor including a test terminal, a transistor having a collector connected to the test terminal and an emitter connected to the bias line. A test circuit for a digital-analog converter, comprising: a bias supply source for holding; and detecting a failure of the digital-analog converter by detecting a current change at the test terminal.