JPH0748708B2 - Spread spectrum signal receiver - Google Patents

Description

The present invention relates to a spread spectrum signal receiving apparatus having a plurality of synchronization detection circuits.

[Prior Art] In a spread spectrum signal receiver, it is necessary to search and synchronize with a spread code before demodulating a received signal. A code stagger method including a plurality of synchronization detection circuits is often adopted for the purpose of reducing the search time of the spread code.

FIG. 2 is a block diagram showing a part of a conventional spread spectrum signal receiving apparatus. In Figure 2, the correlator
In the synchronization detection circuit 6a (6b) composed of 2a (2b), wave detector 3a (3b), wave detector 4a (4b), and synchronization determiner 5a (5b), the phase of the spreading code generated in the receiving device It is detected whether a matching spread spectrum signal is being received.
In order to shorten the spreading code search time, the two synchronization detection circuits 6a and 6b are each equipped with a half of the total length of the spreading code.
Spreading codes whose phases are shifted from each other are supplied from the code generator 11 and the shift register 12. Synchronous judgment is detected by the detector 4a
This is performed by determining with the synchronization determiner 5a (5b) whether the output voltage of (4b) exceeds a preset threshold value.

This determination method can be based on the Bayesian test theory with a fixed number of samples or the sequential detection method based on the sequential probability ratio test theory. Comparing these two determination methods, the sequential detection method, which can save 40 to 90% of the number of samples required to guarantee the same average error probability, can perform the synchronization determination faster.

[Problems to be Solved by the Invention]

However, since the number of samples becomes a random variable in this sequential detection method, when it is applied to the code stagger method as shown in Fig. 2, there is a difference in the judgment times of the two synchronous detection circuits, and the judgment is always slower. The next phase cannot be checked until is completed. Therefore, the average time required to search all the phases of the spreading code is 1/2 of that in the case where the synchronization detection circuit is one system.
It has the drawback of becoming longer.

SUMMARY OF THE INVENTION It is an object of the present invention to improve the above-mentioned drawbacks and to provide a spread spectrum signal receiving apparatus having a code stagger synchronization detection system in which the influence of the uncertainty of the synchronization determination time by the sequential detection method is reduced.

[Means for Solving the Problems]

The present invention is a spread spectrum signal receiving apparatus provided with a plurality of sync detecting circuits for shortening the search time of a spread spectrum code. As a means for solving the above-mentioned problems, two sync detecting circuits are provided. A set of circuits, a code generator is provided for each synchronization detection circuit, and a phase shifter capable of shifting the phase of the clock signal applied to the code generator in the positive direction and a phase shifter capable of shifting the phase in the negative direction. It is characterized by having.

[Action]

The two sync detection circuits search the phase of the spreading code in the reverse direction independently of each other, so that even if there is variation in the sync determination time of each sync detection circuit, the average value of the search time at all positions is the sync detection. Half of the case of one circuit system
Can be shortened to

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

The configuration of the apparatus according to the embodiment of the present invention will be described with reference to FIG. The device of this embodiment includes the input terminal 1 for receiving signals and the first
Synchronization detection circuit 6a, second synchronization detection circuit 6b, synchronization controller 7, clock input terminal 8, +1/2 chip phase shifter 9, -1/2 chip phase shifter 10, First code generator 1
It is provided with 1a and a second code generator 11b. Here, the first synchronization detection circuit 6a includes a first correlator 2a and a first correlator 2a.
Wave detector 3a, first detector 4a, and first synchronization detector 5a
And the second synchronization detection circuit 6b includes a second correlator 2b
And a second wave detector 3b, a second wave detector 4b, and a second synchronization determiner 5b.

The output of the reception signal source (not shown) is connected to the input terminal 1, and the output of the clock generation source is connected to the input terminal 8.

Next, the operation of the apparatus of this embodiment will be described. In the first and second sync detection circuits 6a and 6b, the first and second code generators 11a and 11b
It is determined whether or not the phase of the spreading code generated in 1 and the phase of the spreading code of the received signal applied to the input terminal 8 match. This judgment is performed by the sequential detection method in the first and second
This is performed by the synchronization determiners 5a and 5b. That is, the first and second
Of the output voltage of the detectors 4a, 4b of the first and second synchronization decision devices 5a, 5b
, The likelihood ratio is calculated periodically for each observed value and compared with two thresholds. If the likelihood ratio is larger than the larger threshold, it is determined that the phases match and the test is performed. To finish. On the other hand, if the likelihood ratio is smaller than the lower threshold, it is determined that the phases do not match and the test ends. Furthermore, if the likelihood ratio is within the indifferent region of two thresholds, another sample is observed without making a decision. Since such a determination method is used, there is a difference in the time required to reach the determination between the synchronization detection circuits 6a system and 6b system.

In other words, the present invention employs the sequential detection method in order to reduce the time required for the synchronization determination. In this sequential detection method, the first and second synchronization determination devices 5a and 5b are used to The magnitudes of the signals from the two detectors 4a and 4b are periodically observed, and the likelihood ratio is sequentially calculated based on the observed values. Then, the calculated likelihood ratio and the preset 2
Compare the two thresholds, and if the larger threshold is exceeded, it is determined that the signal being observed is in synchronization,
When it is less than the smaller threshold value, it is determined that the observed signal is in the asynchronous state. On the other hand, when the likelihood ratio is an intermediate value between the two threshold values, the determination is suspended and the next sample is observed.

Since such a determination method is adopted, the number of samples until the determination is reached is a random variable. Since each sample is measured at fixed time intervals, the time required to reach the judgment is also a random variable. For this reason, when the synchronization determination is performed by the two independent synchronization detection circuits, the time required to reach the determination generally does not match, and a time difference occurs.

In the first synchronization detection circuit 6a, the first code generator 11a
When it is determined that the phase of the spreading code generated in 1) does not match the phase of the spreading code of the received signal, the synchronization controller 7 halves the phase of the spreading code generated in the first code generator 11a.
Shift chip by chip by +1/2 chip phase shifter 9,
This operation is repeated until it is determined that the phases match in either of the two synchronization detection systems. On the other hand, when it is determined in the second synchronization detection circuit 6b that the phase of the spreading code generated by the second code generator 11b does not match the phase of the spreading code of the received signal, the synchronization controller 7 determines that the second Code generator
The phase of the spreading code generated at 11b is shifted by 1/2 chip in the negative direction by the −1/2 chip phase shifter 10.

FIG. 3 shows the phase relationship between the spreading code of the received signal and the spreading code generated by each code generator during the above synchronization check period.

As described above, the two synchronization detection systems can be operated independently and the different synchronization phases can be continuously checked by the two synchronization detection systems even if the time required for each synchronization determination varies.

When the number of synchronization detection systems is an even number of 4 or more, two synchronization detection systems that search the phase of the spreading code while shifting the phases in opposite directions are set as one group, and the search start phase of each group is set to the spreading code. It is shifted by 1 / set.
As a result, when all the phases of the spreading code are searched by one synchronization detection system, all the phases can be searched in an average time that is approximately one-third of the number of synchronization detection systems.

〔The invention's effect〕

As described above, according to the present invention, since the two synchronization detection systems that search the phase of the spreading code are operated independently while shifting the phases in the opposite directions, there is variation in the time required for each synchronization determination. However, since each sync detection system can continuously perform the search, there is an effect that all the phases can be searched with an average time of 1/2 that when all the phases of the spread code are searched by one sync detection system.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an apparatus according to an embodiment of the present invention,
FIG. 2 is a block diagram showing a configuration of a conventional apparatus, and FIG. 3 is a time chart showing a phase relationship between a spreading code of a received signal and a spreading code generated by each code generator in the receiving apparatus in the present invention. 1 …… Received signal input terminal, 6a, 6b …… First and second sync detection circuit, 7 …… Synchronous controller, 8 …… Clock input terminal, 9…
… + 1/2 chip phase shifter, 10 …… −1 / 2 chip phase shifter, 11a, 11
b …… First and second code generators.

Claims (1)

[Claims] 1. A spread spectrum signal receiver comprising at least two synchronization detection circuits for performing synchronization detection on mutually different phase components, wherein a code generator and a phase shift are provided for each of the at least two synchronization detection circuits. A phase shifter corresponding to the detection results of the at least two synchronization detection circuits, and controls the phase shifter for one to shift in the positive direction and for the other to shift in the negative direction. A spread spectrum signal receiving device comprising a synchronization controller for controlling the spread spectrum signal.