JPH0750992B2 - Encoder for AC servo - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an encoder applied to an AC (alternating current) servo motor, for example, a two-phase signal of A phase and B phase and a C phase (or Z phase) of an origin signal. The present invention relates to an absolute encoder that outputs a total of 6 signals, ie, 3 signals of permanent magnet synchronous type AC servo motor pole signals (magnetic pole position detection signals) U, V, W in addition to the 3 signals).

[Conventional technology]

Up to now, the servo control that receives the information from the rotor side of the AC servo motor about the A, B, C, U, V, and W phases on the stator side, and performs position calculation as 6 signals as it is for all signals I was sending it to the department.

For example, even in the case of the position detector of the AC servo motor for driving the arm of the industrial robot, wiring of 6 lines for transmitting 6 signals is required.

[Problems to be solved by the invention]

However, if all the signals were sent as they are, as in the conventional example, for AC servos, 6 types of signals A, B, C, U, V, W are required, and line driver, cable, The line receiver, disconnection detection means, etc. had to be prepared for this signal.

Further, in the industrial robot, even if the wiring of the cable is housed in the arm, it is unavoidable that the wiring is provided in the movable portion, and the large number of wirings causes a lot of opportunities for disconnection.

It is an object of the present invention to provide an AC servo encoder that reduces the signal transmission means by superimposing the magnetic pole detection signals U, V and W phase signals on the origin signal C phase signal in a time division manner.

[Means for solving problems]

The present invention multiplexes and transmits another origin signal C phase and magnetic pole position detection signals U phase, V phase, W phase with encoder output signals A phase, B phase, and A phase, B phase on the receiving side. Signal of C phase, U phase, V phase, W
It is an AC servo encoder that demultiplexes and latches phases to send and receive encoder signals.

Further, according to the present invention, when the power is turned on, the counter is operated to generate a signal corresponding to the movement of one cycle, and the generated signal is added to the position signal of the encoder slit to artificially generate one cycle of A phase and B phase. Cause the movement of
AC, which has the function of transmitting C-phase, U-phase, V-phase, and W-phase signals
It is a servo encoder.

[Operation] Since the magnetic pole position detection signals U-phase, V-phase, and W-phase signals are superimposed on the existing signal line (transmission line) in time division with the C-phase signal of the origin signal, the transmission circuit components are halved The reliability of the transfer will be greatly improved.

〔Example〕

FIG. 1 shows a circuit configuration diagram on the encoder side in one embodiment of the first aspect of the present invention, and FIG. 3 shows a circuit configuration diagram on the receiving side.
Shown in the figure.

2 and 4 are operation waveform diagrams thereof.

The position signals A, B of the motor rotation shaft, etc. from the slit of the encoder (not shown) are directly output from the encoder ФA, Ф
In addition to B, the multiplexer (data selector / mu
ltiplexer, 74151) 1 select signals A, B, and select other signals C, U, V, W to output as ΦC.

That is, the six kinds of signals A, B, C, U, V, W are halved into three kinds of signals ФA, ФB, ФC, and are passed from the encoder to the receiving side through a line driver (not shown). Is output.

In the multiplexer 1, 0, 1, 2, 3 are data input ends, V is an output end, A, B, C are data select ends, and S is a strobe end.

The waveforms of each part in Fig. 2 are (A) ФA, (b) ФB, (c).
Shows the respective signals of .PHI.C, and (d) shows the respective periods in which the signals V, U, W and C are given to the data input terminals.

Then, the signals ΦA, ΦB, and ΦC reach the receiving side via the cable and the line receiver, the disconnection detecting means, and the like,
It is introduced into the receiving side circuit of FIG.

The input signals ΦA and ΦB become ± FB pulses by the ordinary differentiating circuit 3. That is, the signal + FB pulse becomes Low for one cycle of the clock CK at the rising and falling edges of the ΦA and ΦB pulses, and the signal-FB pulse is its common signal.

Input signals ΦA and ΦB are addressable latches (8-
bit addressable latch, 75259) select signal and signal Φ at the data input D of addressable latch 2
C is input, and the opening / closing signal of the gate (enable) G is created from a signal delayed by a clock time from ± FB. Signal ± FB goes through NAND 5 and JK flip-flop 4
The signal G is applied to the addressable latch 2 via.

As a result, correct data can be written in the bit addresses of the signals C, U, V, and W with a stable signal of ΦC.

In the addressable latch 2, A, B and C are latch select terminals, CL is a clear signal terminal, and Q0 to Q3 are output terminals.

FIG. 4 is a waveform diagram of each part of the receiving side circuit. (A) is clock pulse CK, (b) is ΦA, (c) is ΦB, (d) is ΦC, (e) is + FB, (f). ) Indicates each signal of G.

Then, although the magnetic pole position detection signals U, V, W are deviated by 2 to 3 clocks (CK) in the detection of the change, they are originally signals with rough accuracy, and such a delay does not matter.

The C phase of the origin signal is differentiated and used as a pulse with only a rising edge, that is, only the rising edge needs to be seen.

FIG. 5 shows a circuit configuration diagram on the encoder side showing an embodiment of the second invention of the present invention.

FIG. 6 is an operation waveform diagram of each part.

The circuit configuration on the receiving side may be the means shown in FIGS. 3 and 4 described above.

By the way, in the system of FIGS. 1 and 2 (first invention), there is a problem that detection is impossible unless the encoder operates, but this second invention is an encoder side system that solves this problem.

In all the drawings, the same reference numerals indicate the same or corresponding members.

The signals A and B from the slits of the encoder are combined with the outputs Q _E and Q _F of the up / down system through a pulse synthesizing circuit 6 (detailed in Japanese Patent Laid-Open No. 59-74723).

Here, 9, 10, 62 and 63 are exclusive OR elements, and 8 is an inverter.

63 is an adder (4-bit binary full adder with fast ca
In rry, 283), A1, B1 and A2, B2 are input terminals, Z1, Z2 are their addition output terminals, and CO is a carry input terminal.

7 is a counter (synchronous counter with direct clea
r, 74161) in CK clock edge, Cl clear signal end, RC ripple carry output _{terminal, Q B, Q C, Q} D is output, LD load end, P, T is the enable signal terminal.

After turning on the power of the counter system, reset signal ▲
When ▼ changes from Low to high, counting starts from zero.

The counter 7 stops at F _H , but looking at the outputs Q _E and Q _F of the exclusive OR elements 9 and 10, the input is inverted when the counter 7 reaches 8 _H , so 00 → 01 → 10 → 11 → 10 → 01 → 00 is output.

By inputting this to the pulse synthesis circuit 6, the signal Φ
A, ΦB can output the signals of C, U, V and W from the multiplexer 1 by performing an operation of returning for 4 pulses. Due to the reciprocating operation, the position management register on the main body (servo drive) side will not be displaced.

Therefore, according to the second aspect of the invention, the data can be obtained even if the encoder does not rotate.

〔The invention's effect〕

Thus, according to the present invention, the types of signals from the encoder side to the receiving side are reduced to half, the transmission lines of the line driver, the receiver, the cable, the number of connector poles, the disconnection detection circuit, etc. are reduced to half, and the serial transmission is performed. On the other hand, since the A and B phases remain the same, F / V (frequency → voltage) conversion is possible and existing systems can be used as is, resulting in reduced costs and significantly improved reliability.

[Brief description of drawings]

1 and 3 are circuit diagrams of encoder side and receiver side of one embodiment of the first invention of the present invention, FIG. 2 and FIG. 4 are operation waveform diagrams thereof, and FIG. 5 and FIG. It is an encoder side circuit block diagram and operation waveform diagram of one Example of the 2nd invention of the present invention. 1 ... Multiplexer (74151) 2 ... Addressable latch (75259) 3 ... Differentiation circuit 4 ... JK flip-flop 5 ... Nand 6 ... Pulse synthesis circuit 7 ... Counter (74161) 8 ... Inverter 9,10,62,63 …… Exclusive OR element 63 …… Adder (283).

Claims (2)

[Claims] 1. An origin signal C of the AC servo motor output from the encoder and rotation angle signals A and B of the AC servo motor output from the encoder as selection signals and the origin signal C of the AC servo motor.
The magnetic pole position detection signals U, V, W of the AC servo motor are time-divided,
Multiplexer means for outputting as one signal; transmission means for transmitting the rotation angle signals A, B and the output signal of the multiplexer through each transmission line; and the rotation angle signal transmitted through the transmission means. Latching means for demultiplexing the output of the multiplexer means transmitted through the transmitting means as a selection signal and latching the values of the demultiplexed origin signal C and magnetic pole position detection signal. AC servo encoder characterized by 2. A signal generating means having a counter for generating a signal corresponding to movement of one cycle of the counter when the power is turned on, and an output of the signal generating means when the encoder does not operate, If the output from the encoder, selecting means for selecting the rotation angle signal A, B of the AC servo motor, and the output of the selecting means of the AC servo motor output from the encoder as a selection signal Origin signal C and the above
The magnetic pole position detection signals U, V, W of the AC servo motor are time-divided,
Multiplexer means for outputting as one signal; transmission means for transmitting the rotation angle signals A, B and the output signal of the multiplexer through each transmission line; and the rotation angle signal transmitted through the transmission means. Latching means for demultiplexing the output of the multiplexer means transmitted through the transmitting means as a selection signal and latching the values of the demultiplexed origin signal C and magnetic pole position detection signal. AC servo encoder characterized by