JPH0755057B2 - Power converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a power converter that supplies electric power of a variable voltage and variable frequency to a motor load or the like.

(Prior Art) FIG. 8 is a configuration diagram showing a conventional power converter.

In the figure, C _d is the DC smoothing capacitor that serves as the DC voltage source, INV
-1 is the first inverter, TR is the output transformer, INV-2
Is a second inverter, LOAD is a load device, CT _L is a current detector, C _L is a comparator, G (S) is a current control compensation circuit, R _L is a proportional amplifier, SW ₁ and SW ₂ are switch circuits, PWM ₁ , PWM ₂ is a pulse width modulation control circuit, and SWC is a switch control circuit.

The first and second inverters INV-1 and INV-2 are pulse width modulation control inverters that convert a DC voltage into an AC of a variable voltage and variable frequency, and show a case of single-phase output. The first inverter INV-1 generates the output voltage V _L1 via the output transformer TR. In addition, the second inverter 1NV-2 is directly
Generate the output voltage V _L2 . For load device LOAD, V _L = V _L1
A voltage of + V _L2 is applied, and the load current I _L is controlled by adjusting the voltage V _L.

When the output frequency ₀ is zero, the voltage V _L1 is output from the transformer TR.
Can not be generated, the second inverter IN
Controlling the load current I _L by V-2, ₀ is upon reaching certain extent, to control the load current I _L by the first inverter INV-1.

The control operation will be briefly described below.

Let the minimum frequency at which the output transformer can operate be min,
When the output frequency ₀ is lower than min, the switch control circuit SWC turns on the switches SW ₁ and SW ₂ to the side a.

Then, the input signal ▲ V ^* ₁ ▼ of the pulse width modulation control circuit PWM ₁ of the first inverter INV-1 is set to zero, and the input signal ▲ V of the pulse width modulation control circuit PWM ₂ of the second inverter INV-2 is set. ^* ₂ ▼ comes from the current control compensation circuit G (S).

First, the current detector CT _L detects the load current I _L and inputs it to the comparator C _L. With the comparator C _L , the above current detection value I _L
And its current command value ▲ I ^* _L ▼ compare, the deviation epsilon _{L =} ▲
I ^* _L ▼ the -I _L is amplified by next current control compensation circuit G (S). The output signal of G (S) is input to the pulse width modulation control circuit PWM ₂ via the switch circuit SW ₂ . The second inverter INV-2 generates a voltage V _L2 proportional to the input signal ▲ V ^* ₂ ▼ of the PWM ₂ .

When ▲ I ^* _L ▼> I _L , the deviation ε _L becomes a positive value,
▲ V ^* ₂ ▼ That is, the output voltage V _L2 of the second inverter INV-2 is increased and the load current I _L is increased so that I _L ≈ ▲ I ^* _L
Control so that it becomes ▼. On the contrary, when ▲ I ^* _L ▼ <I _L , the deviation ε _L becomes a negative value, and V _L2 is decreased to decrease I _L. Again, I _L ≈ ▲ I ^* _L ▼ Controlled.

During this period, the output voltage V ₁ of the first inverter INV- ₁ is PWM
₁ of the input signal ▲ V ^* ₁ ▼ = 0 voltage proportional to, namely,
It is controlled to be zero voltage, and the secondary voltage V _L1 of the output transformer TR is also zero.

When the output frequency ₀ becomes higher than the minimum frequency min, the switch control circuit SWC causes the switches SW ₁ and SW ₂ to switch to b.
It is thrown into the side.

This time, the output signal of the current control compensation circuit G (S) is input to the pulse width modulation control circuit PWM ₁ of the _first inverter, and ▲ V is input to the pulse width modulation control circuit PWM ₂ of the second inverter.
^* ₂ ▼ ＝ ▲ I ^* _L ▼ ・_RL signal is input. Where R
_L is equivalent to the resistance of the load device LOAD, ▲ I ^* _L
▼ ・_RL is the voltage drop due to resistance. That is, ₀
> Min, the second inverter INV-2 outputs
Regardless of ₀ , the voltage drop will be borne by the resistance of the load. The load current I _L is the first inverter IN
It will be controlled by V-1.

FIG. 9 shows the load terminal voltage V _L for the output frequency ₀ of the device of FIG. 8 and the input signals ▲ V ^* ₁ ▼, ▲ of the pulse width modulation control circuits PWM ₁ and PWM ₂ of the first and second inverters. The relationship of V ^* ₂ is shown.

When the load current I _L is constant, the load terminal voltage V _L is represented by the output frequency ₀ as follows.

V _L = V _C + I _L · R _L + jω ₀ L _L I _L (1) V _C : Load back electromotive force (in the case of motor) R _L : Load resistance L _L : Load inductance ω ₀ : 2π ₀ The broken line in FIG. 9 (a) shows the amount of voltage drop due to the resistance R _L of the load.

The broken line in FIG. 9 (b) represents the input signal ▲ V ^* ₁ ▼ of the pulse width modulation control circuit PWM ₁ of the first inverter INV-1.
Until ₀ min, ▲ V ^* ₁ ▼ = 0, and in the region of ₀ > min, ▲ V ^* ₁ ▼ becomes a voltage proportional to ₀ . or,
The solid line in FIG. 9 (b) represents the input signal ▲ V ^* ₂ ▼ of the pulse width modulation control circuit PWM ₂ of the second inverter INV-2.
_It is controlled to output the voltage V _L of the formula (1) up to ₀ min, and in the region of ₀ > min, ▲ V ^* ₂ ▼ = ▲ I ^* _L ▼ R
_L = constant. However, when ▲ I ^* _L ▼ = constant.

Thus, in the device of FIG. 8, the second inverter INV
-2 is the minimum frequency mi at which the output transformer TR can operate
up to n, it is sufficient to generate the required voltage V _L ,
Compared with the first inverter INV-1, the capacity is smaller. Further, since the first inverter INV-1 is a voltage V _L1 also generates through an output transformer TR, a multi-series operation or parallel multiple operation or the like of the inverter can be easily carried out, to increase the capacity Will be easier. Therefore, it is convenient as a power converter for driving a large capacity AC motor.

(Problems to be Solved by the Invention) The above-described conventional power conversion device has the following problems.

That is, when the output frequency ₀ becomes high and the load current I _{L is} to be controlled by the first inverter INV-1, the following inconvenience occurs.

The secondary voltage V _L1 of the normal output transformer TR becomes a voltage proportional to the output voltage V ₁ of the first inverter INV-1. However, for example, when the load current I _L includes a DC component due to drift of the current detector CT _{L or} the like, the transformer TR is gradually DC-biased, and eventually the iron core is saturated in one direction. As a result, the secondary voltage V _L1 of the transformer TR drops,
The load current I _L is smaller than the command value ▲ I ^* _L ▼. Therefore,
The inverter INV-1 operates so as to further increase the output voltage V ₁ and further saturate the iron core. Therefore, the primary current I ₁ of the transformer TR suddenly increases, resulting in overcurrent and INV-1
It will also destroy the element. A method of enlarging the iron core cross-sectional area and providing an air gap so that the output transformer is not magnetized may be considered, but in that case, the weight and size of the output transformer are increased, resulting in an uneconomical system.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a power conversion device that corrects bias magnetism of an output transformer and can accurately control a load current.

[Structure of Invention]

(Means for Solving the Problems) In order to achieve the above object, the present invention has one or a plurality of pulse width modulation control inverters (first PWM inverter) having an output transformer and an output transformer. No pulse width modulation control inverter (second PWM inverter)
And an AC load driven by the sum of the output voltages of the first and second PWM inverters, the first PWM inverter controls the exciting current of the output transformer, and The second PWM inverter is configured to control the current supplied to the load.

(Operation) First, the second PWM inverter controls the current supplied to the load regardless of the output frequency ₀ . Also, the first
The PWM inverter controls so that the exciting current of the output transformer becomes almost constant. The exciting current of the transformer is detected by the difference between the primary current and the secondary current (load current) of the transformer, and the command value of the exciting current is determined by calculation from the specified value of the output voltage of the transformer. When the exciting current of the transformer is controlled to be almost constant, the output voltage of the transformer increases or decreases in proportion to the output frequency, and the iron core does not saturate even if the frequency becomes low. If the load current increases or decreases, the required output voltage of the transformer also increases or decreases, and the exciting current of the transformer changes accordingly. When a DC component is added to the load current due to the drift of the current detector and the like and DC bias magnetism occurs in the output transformer as in the conventional device, the exciting current of the transformer tends to increase. The current is controlled to match the command value. Therefore,
The primary current of the transformer (output current of the first PWM inverter) does not become too large, and the element is not destroyed by the demagnetization of the transformer. Further, by amplifying and integrating the deviation signal of the exciting current control and superimposing it as the direct current component of the exciting current, it is possible to eliminate the deviation of the transformer itself.

(Embodiment) FIG. 1 is a configuration diagram showing an embodiment of a power conversion device of the present invention.

In the figure, C _d is the DC smoothing capacitor that serves as the DC voltage source, INV
-1 is the first PWM inverter, TR is the output transformer, INV-
2 is a second PWM inverter, and LOAD is an AC load.

The first PWM inverter INV-1 includes a self-extinguishing element (gate turn-off thyristor, etc.) S _{11 to} S ₁₄ and diodes D _{11 to} D.
It is composed of ₁₄ and is a so-called voltage type pulse width modulation control inverter.

The second PWM inverter INV-2 is also a voltage-type pulse width modulation control inverter, which uses self-extinguishing elements S _{21 to} S ₂₄ and a diode D.
It is composed of _{21 to} D ₂₄ .

AC load LOAD is inductance L _L , resistance R _L and back electromotive force
Includes V _C.

As the control circuit, the current detectors CT ₁ and CT _L , the arithmetic circuit C
AL, comparator C ₁ , C ₂ , current control compensation circuit G ₀ (S), G
_L (S), adder AD and pulse width modulation control circuit PWM ₁ , PWM ₂
Is prepared.

First, the operation of the pulse width modulation control of the first PWM inverter INV-1 will be briefly described.

FIG. 2 shows a time chart diagram for explaining the operation of the pulse width modulation control of the apparatus of FIG. In the figure, X and Y are PWM
In the control carrier signal, Y is the inverted value of X (in other words,
It is 180 degrees out of phase). ▲ V ^* ₁ ▼ is the pulse width modulation control circuit PWM ₁ of the first PWM inverter INV- ₁
In the input signal, the ▲ V ^* ₁ ▼ and the carrier signal X and Y
By comparing with the above, the gate signals g ₁₁ and g ₁₂ of the elements S _{11 to} S ₁₄ that form the first inverter INV-1 are generated. That is, when ▲ V ^* ₁ ▼ X, g ₁₁ = “1”, S ₁₁ : ON, S ₁₂ : OFF When ▲ V ^* ₁ ▼ <X, g ₁₁ = “0”, S ₁₁ : OFF, S ₁₂ : ON ▲ V ^* ₁ ▼ Y: g ₁₂ = “1” S ₁₃ : OFF, S ₁₂ : ON ▲ V ^* ₁ ▼ <Y: g ₁₂ = “0” S ₁₃ : ON, S ₁₂ : ON Becomes

When the voltage of the smoothing capacitor C _d is V _d , the output voltage V ₁ of the first inverter INV- ₁ is V ₁ = + V _d when S ₁₁ and S ₁₄ are on and V ₁ when S ₁₂ and S ₁₃ are on. ₁ = a V ₁ = 0 in the -V _d other modes.

That is, by shifting the phase of the carrier signal X which determines the firing signals of the elements S ₁₁ and S ₁₂ and the carrier signal Y which determines the firing signals of the elements S ₁₃ and S ₁₄ by 180 °, the first PWM inverter IN
The output voltage ▲ V ^* ₁ ▼ of V-1 has a waveform controlled at twice the switching frequency of the element. The average value ₁ (shown by the broken line) of the V ₁ waveform in FIG. 2 is the PWM ₁ input signal ▲ V ^* ₁ ▼
The value is proportional to.

The pulse width modulation control of the second PWM inverter INV-2 is similarly performed.

Next, the operation of load current control will be described.

The load current I _L is controlled by the second PWM inverter INV-2.

First, the current I supplied to the load LOAD by the current detector CT _L
L is detected and input to the comparator C ₂ . The comparator C ₂ in the load current command value ▲ I ^* _L ▼ and compares the detection value I _L, the deviation ε
_L = ▲ I ^* _L ▼ to enter -I _L to the next current control compensation circuit G _L (S). In G _L (S), the deviation ε _L is amplified, and ▲ V ^* ₂ ▼ = G in the pulse width modulation control circuit PWM ₂ of the second inverter.
Give _L (S) · ε _L. The second inverter INV-2 generates a voltage V _L2 proportional to the input signal ▲ V ^* ₂ ▼ of the PWM control circuit.

When ▲ I ^* _L ▼> I _L , the deviation ε _L becomes a positive value,
Increase the input signal ▲ V ^* ₂ ▼ of PWM ₂ . Thus, the second inverter INV-2 of the output voltage V _L2 is increased, increasing the load current I _L, controlled to be _{^{I L ≒ ▲ I * L ▼}} . Conversely ▲
When I ^* _L ▼ <I _L , the deviation ε _L becomes a negative value, which reduces the output voltage V _L2 of the second inverter INV-2 and reduces the load current I _L. After all, I _L ≒ ▲ I ^* _L ▼ finally settles down. By changing the load current designated value ▲ I ^* _L ▼ sinusoidally, is controlled sinusoidally follow it also actual load current I _L. This load current control can be performed without problems even when the output frequency ₀ is zero.

Next, the control operation of the first PWM inverter INV-1 will be described.

The first PWM inverter INV-1 generates a voltage V _L1 which is almost proportional to the output frequency ₀ through the output transformer TR, but is basically not related to the load current control. First PWM
The inverter INV-1 controls the exciting current I ₀₁ of the output transformer TR.

The voltage V _L applied to the load LOAD is expressed by the following equation.

_{V L = L L1 + V L2} = V C + R L · I L + I L · p · I L ... (2) p: where differential operator, the load current _{I L I L = I Lm ·} sin ω 0 t ... (3) I _Lm : When controlling to a sine wave like the current peak value ω ₀ = 2π ₀ , the equation (2) is expressed as V _L = V _C + R _L · I _L + jω ₀ L _L · I _L … (4 ), Which is consistent with Eq. (1).

From the first PWM inverter INV-1, a component V _L1 = V _C + jω ₀ L _L I _L (5) which is proportional to the output frequency ₀ in the formula (4) is generated. Here, V _C represents the back electromotive force of the AC motor, and has a value proportional to the rotational speed of the motor, that is, the output frequency ₀ of the inverter.

In order to generate the first from the PWM inverter INV-1 (5) voltages V _L1 of _{^{formula, ▲ V * L1 ▼ = ▲}} V * C ▼ + jω 0 · L L · ▲ I * L ▼ ... (6) Pulse width modulation control circuit PWM for command value via adder AD ₁
To enter. The primary / secondary winding ratio of the output transformer TR is 1: 1
Then, in normal operation, the first PWM inverter INV-
The output voltage V _{1 of 1} is generated as it is from the output transformer TR as V _L1 and becomes a voltage that opposes the sum of the back electromotive force V _C of the motor and the voltage drop jω ₀ L _L I _L due to the inductance L _L. As a result, as the output voltage V _L2 of the second PWM inverter INV-2, it is sufficient to generate the voltage drop I _L · R _L due to the resistor R _L , and the control of the load current I _L is also easy. It becomes possible to do.

However, when the output transformer TR is DC-biased, the iron core may be saturated and the exciting current of the transformer TR may become excessive. Therefore, the exciting current I ₀₁ is controlled by the first PWM inverter. The control operation of the exciting current will be described below.

Current detectors CT ₁ and CT _L by the output transformer TR 1 primary current I ₁ and the secondary current (load current) is detected I _L, obtains the excitation current I ₀₁ of the transformer by taking the difference. That is, I ₀₁ = I ₁ −I _L (7) However, the primary / secondary winding number ratio of the transformer TR is considered to be 1.

On the other hand, the exciting current command value ▲ I ^* ₀₁ ▼ is obtained by performing the following calculation by the calculation circuit CAL using the above-mentioned output voltage command value ▲ V ^* _L1 ▼. However, M is the exciting inductance of the transformer.

Considering the case where the load current I _L is controlled to be a sine wave having the same phase as the counter electromotive force V _{C in the} synchronous motor load, ▲ V ^* _C ▼ and ▲ I ^* _L ▼ are expressed by the following equations.

_{^{▲ V * C ▼ = ▲ V}} * Cm ▼ · sin ω 0 t ... (9) ▲ V * L ▼ = ▲ I * Lm ▼ · sin ω 0 t ... (10) ▲ V * Cm ▼: voltage peak value command ▲ I ^* _Lm ▼: Current peak value command Therefore, the specified excitation current ▲ I ^* ₀₁ ▼ in equation (8) is as follows.

FIG. 3 shows these related vector diagrams. That is, the vector of the secondary voltage of the output transformer TR ▲ ^* _L1 ▼
Is the back electromotive force vector ▲ ^* _C ▼ and the inductance of the load
It is the sum of the vector jω ₀ L _L ▲ I ^* _L ▼ of the voltage drop due to L _L, and the exciting current ▲ I ^* ₀₁ ▼ is required to generate the secondary voltage ▲ V ^* _L1 ▼.

The comparator C _1, the excitation current command value ▲ I ^* ₀₁ ▼ and comparing the detected values I _01, the deviation ^{_{ε 01 = ▲ I * 01 ▼}} -I 01 of the next current control compensation circuit G ₀ (S ). The output of G ₀ (S) is output by the adder AD to the above-mentioned output voltage command value ▲ V ^*
Combined with _L1 ▼, ▲ V ^* ₁ ▼ = ▲ V ^* _L1 ▼ + G ₀ (S)
Input as ε _{01 to} the pulse width modulation control circuit PWM ₁ of the first PWM inverter INV-1.

When ▲ I ^* ₀₁ ▼> I ₀₁ , the deviation ε ₀₁ becomes a positive value, is amplified by G ₀ (S), and is the input signal of PWM ₁ ▲ V
^* ₁ Increase ▼. Therefore, the output voltage of the first inverter
V ₁ increases and the transformer exciting current I ₀₁ increases. At this time, the secondary voltage V _L1 of the output transformer TR is slightly increased,
The output voltage V _{L2 of the} second inverter INV-2 that is performing the load current control decreases by the amount that V _L1 increases, and the voltage V _L = V _L1 + V _L2 applied to the load LOAD does not change. Therefore, I ₀₁ ≒
▲ I ^* ₀₁ ▼ becomes calm.

On the contrary, when ▲ I ^* ₀₁ ▼ <I ₀₁ , the deviation ε ₀₁ becomes a negative value, the output voltage V ₁ of the first inverter INV- ₁ is decreased, and the exciting current I ₀₁ of the transformer TR is changed. Reduce, after all, I
It becomes ₀₁ ≒ I ^* ₀₁ and calms down. Also at this time, the load current I _L
By the second inverter INV-2, is controlled to be I _L ≒ ^* I _L.

If the command value ▲ I ^* ₀₁ ▼ of the exciting current is changed in a sine wave shape as shown in the equation (11), the actual exciting current I ₀₁ is also controlled to follow the sine wave shape.

In equation (11), the back electromotive force peak value ▲ V ^* _Cm ▼ is proportional to the output frequency ω ₀ , so the load current _peak value ▲ I ^* _Lm
When ▼ is constant, the peak value of the exciting current ▲ I ^* ₀₁ ▼ is constant regardless of the output frequency ₀ .

In the vector diagram of FIG. 3, the load current command ▲ I
^{If *} _L ▼ increases, the load inductance drop jω ₀ L _L ▲ I ^* _L ▼ increases accordingly, and the output transformer TR
Secondary voltage ▲ V ^* _L1 ▼ also increases, the magnitude of the excitation current vector ▲ I ^* ₀₁ ▼ also increases.

Figure 4 is a representation of the relationship between the magnitude of the load terminal voltage V _L with respect to the output frequency _0, component _{V C + jω 0 L L ·} I L which is proportional to the output frequency ₀ is first of PWM inverter INV-1 The second PWM inverter INV-2 bears the voltage drop I _L , R _L due to the resistance component.

Fig. 5 shows the output transformer of the first PWM inverter INV-1.
The relationship between the secondary voltage V _{L1 of} TR and the output frequency ₀ is shown. When the exciting current I ₀₁ of the transformer is constant, the magnitude of the secondary voltage V _L1 is proportional to the output frequency ₀ . Exciting current I
_{If 01} is made smaller as ▲ I ^{＊ ´} ₀₁ ▼, the size of V _L1 also becomes smaller as shown by the broken line.

Now, in the apparatus of FIG. 1, for example, the current detector CT _L
DC component is superimposed on the load current I _L due to the drift of
Consider the case where the output transformer TR is DC biased. Due to the DC bias, the iron core of the transformer TR becomes saturated in one direction. Therefore, the exciting inductance M of the transformer TR
Becomes smaller and tries to increase the exciting current I ₀₁ . However, in the device of the present invention, as described above, the exciting current I ₀₁ of the transformer TR is controlled by the first PWM inverter INV-1 so as to match the command value ▲ I ^* ₀₁ ▼. The output voltage V ₁ of the inverter INV-1 automatically decreases, and the increase of the exciting current I ₀₁ is prevented. As a result, the primary current I ₁ of the transformer TR, that is, the output current of the inverter INV-1 does not increase, and the element is not destroyed by the overcurrent due to the demagnetization, which has been a problem in the past.

FIG. 6 shows the first PWM inverter INV-1 of the apparatus shown in FIG.
6 is a configuration diagram showing another embodiment of the control circuit unit of FIG. In the figure,
INT is an integrator, AD ₂ is an adder, and other signals follow the explanation of the symbols in FIG.

In this control circuit, the output signal Δ ▲ V ^* ₁ ▼ of the exciting current control circuit G ₀ (S) is input to the integrator INT, and the output Δ ▲ I ^* _DC ▼ of the integrator INT is used as the exciting current command value ▲ I. ^In addition to ^* ₀₁ ▼, a new exciting current command value ▲ I ^* _'01 ▼ is used.

That is, in normal operation, the exciting current I _{01 of the} transformer TR is
Is controlled to substantially match the command value ▲ I ^* ₀₁ ▼, and the output voltage V _{1 of the} first inverter INV- ₁ and the transformer secondary voltage V 1
_L1 has almost the same value. In other words,
▲ V ^* ₁ ▼ ≒ ▲ V ^* _L1 ▼, and the exciting current control circuit G
The output Δ ▲ V ^* ₁ ▼ of ₀ (S) is a very small value. Moreover, since Δ ▲ V ^* ₁ ▼ is only the alternating current component that changes at the output frequency ₀ , the output Δ ▲ I ^* of the integrator INT having a large time constant ^.
_DC ▼ becomes almost zero, and ▲ I ^* _'01 ▼ ≒ ▲ I ^* ₀₁ ▼
Has become.

Here, considering the case where DC bias magnetism occurs in the output transformer TR, this time, the exciting current I ₀₁ is controlled by the first PWM inverter INV-1 so as to match the command value ▲ I ^* ₀₁ ▼. Therefore, the input signal ▲ V ^* ₁ ▼ of the pulse width modulation control circuit PWM ₁ of the inverter INV-1 is reduced. Therefore, ▲
Since V ^* _L1 ▼ does not change, the output signal of the _{G 0 (S) Δ ▲ V} * 1
▼ = ▲ V ^* ₁ ▼-▲ V ^* _L1 ▼ increases with positive or negative values. That is, Δ ▲ V ^* ₁ ▼ has a form in which a positive or negative DC voltage is superimposed on the AC voltage, and when the Δ ▲ V ^* ₁ ▼ is integrated by the integrator INT, the DC component Δ ▲ I ^* _DC ▼ becomes positive. Or it increases with a negative value. The secondary current I causing the DC bias magnetization of the transformer TR is added to the original transformer excitation current command ▲ I ^* ₀₁ ▼ (AC amount) by the adder AD ₂ and the above DC component Δ ▲ I ^* _DC ▼. The exciting current I ₀₁ of the transformer TR is controlled so as to cancel the DC component contained in _L. As a result, if DC bias is generated in the transformer TR, the exciting current I
_The direct current component is superimposed on ₀₁ , and it is possible to control so as to eliminate the direct current bias magnetization.

FIG. 7 is a block diagram showing another embodiment of the device of the present invention. The differences from the device of FIG. 1 are as follows.

That is, inverters with output transformer INV-11, INV-12
The are striving to multiplexing two-tiered, direct inverter (output no transformer inverter) INV-2 is a three-phase bridge connection, connect the neutral point N of the load to the intermediate tap of the DC voltage V _d ing.

In this way, by increasing the number of multiple stages of the inverter with an output transformer, it becomes possible to increase the output capacity of the power conversion device. Further, by connecting the neutral point N of the load to the center tap of the DC voltage V _d , it becomes possible to supply power to the three-phase, four-wire type load.

In the device of FIG. 7 as well, the load current I _L is controlled by the direct connection inverter INV-2, and the inverters INV-11, IN with output transformer are used.
The exciting currents of the output transformers TR _U1 and TR _U2 can be controlled by V-12, respectively, and the same effect as that of the device shown in FIG. 1 can be expected.

〔The invention's effect〕

As described above, according to the power converter of the present invention, the primary current of the transformer (the output current of the first PWM inverter) does not increase even when DC electromagnetic is generated in the output transformer, and the overcurrent is prevented. The element can be prevented from being destroyed. Further, by superimposing a DC component that cancels the DC bias on the exciting current of the transformer, it is possible to eliminate the bias of the transformer itself.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a power conversion device of the present invention, FIG. 2 is a time chart diagram for explaining a pulse width modulation control operation of the device of FIG. 1, and FIG. 3 is FIG. 4 is a vector diagram for explaining the operation of the apparatus of FIG. 4, FIGS. 4 and 5 are frequency-voltage characteristic diagrams for explaining the operation of the apparatus of FIG. 1, and FIG. 6 is a control circuit section of the apparatus of the present invention. FIG. 7 is a block diagram showing another embodiment, FIG. 7 is a block diagram showing another embodiment of the device of the present invention, FIG. 8 is a block diagram of a conventional power conversion device, and FIG. 9 is an operation of the device of FIG. It is a characteristic view for explaining. C _d …… DC smoothing capacitor (DC voltage source) INV-1 …… Inverter with output transformer INV-2 …… Directly connected inverter TR …… Output transformer LOAD …… AC load CT ₁ , CT _L …… Current detector CAL… … Operation circuit C ₁ , C ₂ …… Comparator AD …… Adder G ₀ (S) …… Excitation current control compensation circuit G _L (S) …… Load current control compensation circuit PWM ₁ , PWM ₂ …… Pulse width Modulation control circuit

Claims (2)

[Claims] 1. One or a plurality of pulse width modulation control inverters having output transformers (first PWM inverter)
A pulse width modulation control inverter without output transformer (second PWM inverter), and the first and second PWM
In a power converter comprising an AC load driven by a sum of output voltages of an inverter, the first PWM inverter includes an exciting current control unit that controls an exciting current of the output transformer, and the second PWM inverter includes A power conversion device comprising a load current control means for supplying the AC load. 2. The exciting current control means is adapted to generate an AC voltage proportional to an output frequency and a sum voltage of a voltage drop caused by an inductance of the AC load. Power converter.