JPH0758724B2 - Semiconductor device failure analysis method - Google Patents

Description

The present invention relates to a failure analysis method for a semiconductor device, and more particularly to a method for easily performing a failure analysis on a semiconductor device using an electron beam tester.

[Conventional technology]

Conventionally, as shown in FIG. 2 (a), failure analysis of a semiconductor integrated circuit of this type has shown that the insulating film 8'for passivation and the insulating films 8 and 8'between the conductor wirings 7 and 7'are completely removed. Without observing the potential contrast image or the internal waveform using an electron beam tester, or as shown in FIG. 2 (b), insulating films 8 and 8'of the interlayer and the passivation.
Was removed by etching to perform the same observation [Problems to be solved by the invention] In the case of the conventional semiconductor integrated circuit failure analysis method described above,
First, the method without removing the insulating film has a drawback that the potential contrast cannot be discriminated when the absolute value of the potential to be observed with the electron beam tester is small. When a silicon nitride film is used as, isotropic plasma etching or the like was used. However, as shown by S in FIG. 2 (b),
There is a drawback that the silicon nitride film between the lower layer and the upper layer conductor wiring is removed, and the lower layer conductor wiring and the upper layer conductor wiring are short-circuited.

[Means for Solving the Problems]

A feature of the present invention is that, on a main surface of a semiconductor substrate, a multilayer conductor wiring including a first layer wiring and a second layer wiring, and an insulating film including a passivation insulating film and an interlayer insulating film are provided. In a semiconductor integrated circuit in which the thickness of the insulating film from the surface of the insulating film to the first layer wiring is thicker than the thickness of the insulating film from the surface of the insulating film to the second layer wiring, the failure of the first layer wiring A second part to be selectively removed from the surface of the first layer to be analyzed so that the insulation film remains by a predetermined thickness, and a failure of the second layer wiring should be analyzed. A FIB (Focused Ion Beam) apparatus for selectively removing the insulating film from the surface thereof so that the insulating film is left on the above-mentioned location by the same thickness as the predetermined thickness. After that, anisotropic etching is performed on the entire surface. Is performed to remove the insulating film only in the direction perpendicular to the main surface of the semiconductor substrate, thereby simultaneously removing the remaining insulating film at the first part and the remaining insulating film at the second part. A step of performing etching for exposing all the surfaces of the first and second portions with a RIE (reactive ion etching) device; and thereafter, an electron beam of an electron beam tester using a stroboscopic scanning electron microscope And a step of performing failure analysis with a strobe device by irradiating the surfaces of the first and second portions, respectively.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (a) to 1 (d) are sectional views showing an embodiment of the present invention in the order of steps, showing an embodiment applied to a method of failure analysis of a silicon semiconductor integrated circuit having two-layer wiring by an electron beam tester. is there.

First, as shown in FIG. 3A, a silicon oxide film 2 is formed on an n-type silicon substrate 1, and two layers of a first layer and second aluminum wirings 3 and 3'are used as an interlayer film and a passivation film. When analyzing a semiconductor integrated circuit formed by using the silicon nitride films 4 and 4 ', FIG.
First, like FIB (focused ion beam)
Single layer aluminum wiring for failure analysis using 3
The FIB etching conditions are selected so that the silicon nitride films 4, 4'on the upper and the double-layer aluminum wiring 3'have the same thickness.

Next, as shown in FIG. 7C, the silicon nitride film slightly left on the first layer aluminum wiring 3 and the second layer aluminum wiring 3'is removed by RIE (reactive ion etching). By anisotropically etching, it becomes as shown in FIG.

In this way, the surfaces of the single-layer aluminum wiring 3 and the double-layer aluminum wiring 3'at the place where failure analysis is desired to be performed are exposed. At this time, the entire surface of the substrate is slightly etched by RIE.

Then, as shown in FIG. 3D, an electron beam using a stroboscopic device is periodically irradiated onto the aluminum wirings 3 and 3'of the first and second layers to simultaneously operate this integrated circuit, and the stroboscopic device is operated. The electric potential contrast image and the internal electric potential waveform are observed by using the principle of strobe SEM that is synchronized with the electron beam irradiation by.

As a potential difference, a potential contrast image with a small potential of 0.25 V or less can be observed.

In this way, failure analysis is performed by the electron beam tester.

〔The invention's effect〕

As described above, according to the present invention, only the portion where the failure analysis of the insulating film for passivation of the semiconductor integrated circuit having the multilayer wiring and the insulating film between the layers of the multilayer conductor wiring is performed is FI
The insulating film that was removed by B (focused ion beam) etching and remained slightly on the conductor wiring of each layer with the same thickness was completely removed by RIE (reactive ion etching). A very small potential difference, such as the potential contrast method and the waveform method, is applied to the surface of the conductor wiring by an electron beam tester using a strobe SEM.
Since the potential difference of 0.25V can be easily observed, there is an effect that failure analysis can be performed as a result.

[Brief description of drawings]

1 (a) to 1 (d) are sectional views showing the failure analysis method of the present invention in the order of steps, and FIGS. 2 (a) to 2 (b) are sectional views for explaining problems in the conventional manufacturing method. is there. DESCRIPTION OF SYMBOLS 1 ... N-type silicon substrate, 2 ... Silicon oxide film, 3 ... 1st layer aluminum wiring, 3 '... 2nd layer aluminum wiring,
4 ... Interlayer silicon nitride film, 4 '... Passivation silicon nitride film, 5 ... Semiconductor substrate, 6,8,8' ... Insulating film, 7,7 '
… Conductor wiring.

Claims (1)

[Claims] 1. A semiconductor substrate having a multilayer conductor wiring including a first layer wiring and a second layer wiring, and an insulating film including a passivation insulating film and an interlayer insulating film, on the main surface of a semiconductor substrate. In a semiconductor integrated circuit in which the film thickness of the insulating film from the surface to the first layer wiring is thicker than the film thickness of the insulating film from the surface of the insulating film to the second layer wiring, failure analysis of the first layer wiring The insulating film is selectively removed from the surface thereof so that the insulating film remains on the first portion by a predetermined film thickness, and the second layer wiring failure analysis is performed. A step of performing etching with a FIB (focused ion beam) device to selectively remove the insulating film from the surface thereof so that the insulating film remains on the spot by the same film thickness as the predetermined film thickness; , Then anisotropic etching over the entire surface The insulating film is removed only in a direction perpendicular to the main surface of the semiconductor substrate, thereby simultaneously removing the residual insulating film at the first location and the residual insulating film at the second location, and A step of performing etching for exposing all the surfaces of the first and second portions with a RIE (reactive ion etching) device, and thereafter, the electron beam of an electron beam tester using a stroboscopic scanning electron microscope A step of irradiating the surface of each of the first and second parts to perform failure analysis with a strobe device.