JPH0759085B2 - Switching circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing circuit in a semiconductor circuit, and more particularly to a video signal demodulation output and external RGB output switching circuit.

[Conventional technology]

FIG. 2 shows a conventional example of a circuit for switching a video signal demodulation output and an external RGB output when a character or the like is superimposed as an external RGB signal on a TV screen. However, since the R output, G output, and B output have the same configuration, only one of them is shown. The configuration of this conventional example is as follows.

The base of the transistor Q1 is connected to the terminal c of the switch circuit 9, the collector is connected to the power supply 1, and the emitter is a resistor.
Connected to R1. The other end of the resistor R1 is connected to the emitter of the transistor Q2, the base of the transistor Q2 is connected to the terminal c of the switch circuit 10, and the collector is connected to the output terminal 2 and the resistor R3 whose other end is connected to the reference potential. . The luminance signal processing circuit 4 is connected to the terminal a of the switch circuit 9, and the bias circuit 6 is connected to the terminal b. The color difference signal demodulation circuit 5 is connected to the terminal a of the switch circuit 10, and the bias circuit 7 is connected to the terminal b. Also switch circuits 9 and 10
The terminal 3 is connected to.

Next, the operation of this conventional example will be described by taking the R output as an example. The switch circuits 9 and 10 connect the terminal c to the terminal a when the potential of the terminal 3 is low level, and connect the terminal c to the terminal b when the potential of the terminal 3 is high level. The operation when the terminal 3 is at the low level is as follows. The luminance signal processing circuit 4 applies the synchronous positive polarity luminance signal Y to the base of the transistor Q1, and the color difference signal demodulating circuit 5 applies the synchronous negative polarity color difference signal to the base of the transistor Q2. R
At the output, it becomes a Y-R signal. Transistors Q1, Q2, resistor R1
Represents a subtraction circuit, and R is obtained by subtracting the synchronous negative polarity RY signal from the synchronous positive polarity luminance signal in the resistor R1.
The current of the signal component flows. Therefore, R is applied to the output terminal 2.
Output appears.

The operation when the terminal 3 is at the high level is as follows. A certain DC potential is applied from the bias circuit 6 to the base of the transistor Q1, and a DC potential is applied from the bias circuit 7 to the base of the transistor Q2. If the voltage between the bases of the transistors Q1 and Q2 is large by the amount of the current flowing through the resistor R1, an output that appears due to the difference between the output voltages of the bias circuits 6 and 7 appears at the output terminal 2. This output is the external R output.

Therefore, when a switching signal between the R output and the external R output is applied to the terminal 3 as shown in FIG. 3, the R output appears at the output terminal 2 when the terminal 3 is at the low level and the external R output appears at the high level.

[Problems to be solved by the invention]

The conventional R output / external R output switching circuit described above includes two switch circuits, a switch circuit 9 for switching the luminance signal processing circuit 4 and the bias circuit 6, and a switch circuit 10 for switching the color difference signal demodulation circuit 5 and the bias circuit 7. If necessary, and these switch circuits must be switched at the same time by the signal applied to the terminal 3, if there is a difference in the switching time between the two switch circuits, the R output of the output signal appearing at the output terminal 2 and the external output There is a drawback that noise such as so-called "hazard" is generated when the R output is switched.

In contrast to the conventional video signal demodulation output / external RGB output switching circuit described above, the switching circuit of the present invention has a simple structure and is easily integrated, and noise is unlikely to occur when the video signal demodulation output and external RGB output are switched. It has characteristics.

[Means for solving problems]

The switching circuit of the present invention operates a subtraction circuit for synthesizing an R output from a luminance signal Y and a color difference signal RY, a subtraction circuit for synthesizing an external R output, and one of these two subtraction circuits. It has a switch circuit.

[Embodiment 1] FIG. 1 shows a first embodiment of the present invention. However, since the R output, G output, and B output have the same configuration as in the conventional example, only one of them is shown. The circuit configuration of FIG. 1 is as follows. The base of the transistor Q1 is the terminal c of the switch circuit 8.
Is connected to the base of the transistor Q4, the collector is connected to the power supply 1, and the emitter is connected to the resistor R1. Resistor R1
Is connected to the emitter of the transistor Q2, the base of the transistor Q2 is connected to the color difference signal demodulation circuit 5, and the collector is connected to the output terminal 2 and the collector of the transistor Q4 and the resistor R3 having the other end connected to the reference potential. It The emitter of transistor Q4 is connected to resistor R2. The other end of the resistor R2 is connected to the emitter of the transistor Q3, and the transistor Q3
Has a base connected to the bias circuit 6 and a collector connected to the power supply 1. The luminance signal processing circuit 4 is connected to the terminal a of the switch circuit 8, and the bias circuit 7 is connected to the terminal b. Further, the terminal 3 is connected to the switch circuit 8.

Next, the operation of this embodiment will be described by taking the R output as an example. The switch circuit 8 connects the terminal c to the terminal a when the terminal 3 is at the low level, and connects the terminal c to the terminal b when the terminal 3 is at the high level. The operation when the terminal 3 is at the low level is as follows. A luminance signal processing circuit 4 is connected to the base of the transistor Q1 and a luminance signal Y having a synchronous positive polarity is applied. The synchronous negative color difference signal (Y−R) from the color difference signal demodulation circuit 5 is applied to the base of the transistor Q2. The transistors Q1 and Q2 and the resistor R1 are the same subtraction circuit as in the conventional example, and the current of the R signal component flows through the resistor R1. On the other hand, a synchronous positive polarity luminance signal is also applied to the base of the transistor Q4. Transistor. Q3, Q4 and resistor R2 are a subtraction circuit with the same configuration as transistors Q1, Q2 and resistor R1, and the potential of bias circuit 6 added to the base of transistor Q3 is
You can choose not to turn on Q3 and Q4. At this time,
Since the current flowing through the resistor R3 is only the current of the subtraction circuit composed of the transistors Q1, Q2 and the resistor R1, the R output appears at the output terminal 2.

The operation when the terminal 3 is at the high level is as follows. A bias circuit 7 is connected to the base of the transistor Q1, and a color difference signal from the color difference signal demodulation circuit 5 is applied to the base of the transistor Q2. On the other hand, the bias circuit 7 is also connected to the base of the transistor Q4, and the bias circuit 6 is connected to the base of the transistor Q3. Here, the potential of the bias circuit 7 can be selected so that the transistors Q1 and Q2 are turned off and the transistors Q3 and Q4 are turned on. At this time, the current flowing through the resistor R3 is the transistor Q
Since only the current of the subtraction circuit composed of 3, Q4 and the resistor R2, the output determined by the bias circuits 6 and 7 appears at the output terminal 2. This output becomes the external R output.

Therefore, by appropriately selecting the potentials of the bias circuits 6 and 7, the R output and the external R output are output to the output terminal 2 by the switching signal of the R output and the external R output applied to the terminal 3 as shown in FIG. You can switch and output.

Here, in the conventional example, one subtraction circuit and two switch circuits are provided, whereas in the present embodiment, two subtraction circuits and one switch circuit are provided. Since the subtraction circuit requires a smaller number of elements than the switch circuit, the present embodiment has a simpler configuration and is easier to integrate than the conventional example.

When switching from the R output to the external R output, the voltage between the bases of the transistors Q1 and Q2 decreases, while the voltage between the bases of the transistors Q3 and Q4 increases, and when switching from the external R output to the R output. The voltage between the bases of the transistors Q3 and Q4 becomes smaller, while the transistors Q1 and Q2
Since the voltage between the bases of and becomes large, the current flowing through the resistor R3 does not change discontinuously. Therefore, noise is unlikely to occur when the R output and the external R output are switched.

As described above, this embodiment is a transistor that combines R outputs.
In the subtraction circuit composed of Q1, Q2 and the resistor R1 and the subtraction circuit composed of the transistors Q3, Q4 and the resistor R2 which combine the external R output, the bases of the transistors Q1 and Q4 are connected, and this is connected by the switch circuit 8 By switching to different luminance signal processing circuit 4 and bias circuit 7, either one of the subtraction circuits is operated.

[Embodiment 2] FIG. 4 is a circuit diagram of a second embodiment of the present invention. However, since the R output, G output, and B output have the same configuration, only one of them is shown. The structure of the embodiment shown in FIG. 4 is as follows. Transistor Q4 at the base of transistor Q1
, The emitter of Q5 and Q7, the collector of Q8 and the other end of the resistor R4 connected to the power supply 1 are connected. The emitter of the transistor Q1 is connected to the resistor R1, and the other end of the resistor R1 is connected to the emitter of the transistor Q2. Transistor Q2
The base of is connected to the emitter of the transistor Q6 and the resistor R5 whose other end is connected to the reference potential. The collector of the transistor Q2 is connected to the output terminal 2, the collector of the transistor Q4 and the other end thereof to the resistor R3 connected to the reference potential. The emitter of transistor Q4 is connected to resistors R2 and R7,
The other end of is connected to the emitter of transistor Q3, and resistor R7
The other end of is connected to the emitter of transistor Q10. The base of the transistor Q3 is connected to the emitter of the transistor Q11 and the other end thereof to a resistor R6 connected to the power supply 1. The base of the transistor Q11 is connected to the bias circuit 6. The base of transistor Q10 is the emitter of transistor Q12, Q
The collector and the other end of 14 are connected to a resistor R8 whose other end is connected to the reference potential. The base of transistor Q12 is bias circuit 11
Connected to. The base of the transistor Q14 is connected to the power supply 15, and the emitter is connected to the emitter of the transistor Q13 and the current source 13. The other end of the current source 13 is connected to the power source 1. The base of transistor Q13 is connected to terminal 16.
The base of the transistor Q5 is connected to the luminance signal processing circuit 4. The base of the transistor Q6 is connected to the color difference signal demodulation circuit 5. The base of the transistor Q7 is the bias circuit 7
Connected to. The base of the transistor Q8 is connected to the terminal 3, and the emitter is connected to the emitter of the transistor Q9 and the current source 12 whose other end is connected to the reference potential. The base of the transistor Q9 is connected to the power supply 14. Transistor Q1, Q
The collectors of 3, Q6, Q7, Q9, Q10 are connected to the power supply 1, and the collectors of the transistors Q5, Q11, Q12, Q13 are connected to the reference potential.

Next, the operation of the embodiment shown in FIG. 4 will be described by taking the R output as an example. A luminance signal Y having a synchronous positive polarity is applied to the base of the transistor Q5. It is assumed that the potential of the bias circuit 6 is equal to the pedestal level of the luminance signal. It is also assumed that the potential of the bias circuit 7 is equal to the direct current level of the synchronous negative polarity color difference signal demodulation output applied to the base of the transistor Q6 when there is no signal. Further, the output of the luminance signal processing circuit 4 is always higher than the output of the color difference signal demodulation circuit 5. Further, in the differential circuit composed of the transistors Q8, Q9, the current source 12, and the power source 14, it is assumed that when the terminal 3 is at high level, Q8 is on, Q9 is off, and when it is at low level, Q8 is off and Q9 is on. Similarly, the differential circuit consisting of transistors Q13, Q14, R8, current source 13, and power supply 15 turns on Q14 and turns off Q13 when terminal 16 is high level, turns on Q13 and turns off Q13 when low level. I shall.

This embodiment has two levels as the external R output. As shown in FIG. 6, when the terminals 3 and 16 are at the low level, the R output appears at the output terminal 2 and the terminal 3 is at the high level and the terminal 16 is at the high level.
Is a low level, an external R output equal to the pedestal level of the R output appears, and an external R output higher than the pedestal level appears when the terminal 3 is a high level and the terminal 16 is a high level. , Q13, Q14, resistance
The circuit composed of R7, R8, current source 13, power supply 15, bias circuit 11, and terminal 16 is a circuit for switching the level of the external R output.

The operation when pins 3 and 16 are low level is as follows. Comparing the base potentials of the transistors Q5 and Q7, the base potential of Q5 is higher, so that the transistor Q8 is off, so that the transistor Q5 is on and Q7 is off.
Therefore, a luminance signal is applied to the bases of the transistors Q1 and Q4. Transistor at the base of transistor Q2
Since the color difference signal demodulation output is added by the emitter follower circuit of Q6 and resistor R5, transistors Q1, Q2 and resistor R1
The current of the R output component flows through the resistor R1 by the subtraction circuit. On the other hand, at the base of the transistor Q3, the transistor Q1
1, The emitter follower circuit of the resistor R6 gives a potential higher than the pedestal level of the luminance signal added to the base of Q4 by the amount of V _BE of the transistor Q11.
Transistor Q3 is off unless the luminance signal applied to the base of Q4 is below V _BE below the pedestal level. Also transistor Q14
Is turned off, so transistor Q12 is also turned off. Therefore, the base potential of the transistor Q10 becomes the reference potential and the transistor Q10 is also off.
This turns off the transistors Q3, Q4, Q10. From the above, the current flowing through the resistor R3 is only the R output component, and the R output appears at the output terminal 2.

The operation when terminal 3 is at high level and terminal 16 is at low level is as follows. Since the transistor Q8 is turned on, the base potential of the transistor Q1 is lowered by the resistor R4 and the transistor Q5 can be turned off and the transistor Q7 can be turned on. At this time, the base potentials of the transistors Q1 and Q4 become the potential of the bias circuit 7, that is, the potential which is lower than the DC level of the color difference signal demodulation circuit 5 when there is no signal by V _{BE of the} transistor Q7. Transistor at the base of transistor Q2
Due to the emitter follower circuit of Q6 and the resistor R5, the potential becomes lower than the output of the color difference signal demodulation circuit 5 by V _{BE of the} transistor Q6. Therefore, the transistors Q1 and Q2 are turned off unless the output of the color difference signal demodulation circuit 5 becomes lower than the potential lower than the DC level when there is no signal by 2V _{BE of the} transistors Q1 and Q2. On the other hand, the base of transistor Q3 has transistor Q11,
Bias circuit 6 by the emitter follower circuit of resistor R6
A potential that is higher than the potential of V Q by the V _{BE of the} transistor Q11, that is, a potential almost equal to the pedestal level of the luminance signal applied to the base of Q1 when the transistor Q5 is turned on. Since a potential almost equal to the direct current level of the color difference signal applied to the base of the transistor Q2 is applied to the base of the transistor Q4, the voltage between the bases of the transistors Q3 and Q4 is the same as the above-mentioned terminals 3 and 16. The potential of the output terminal 2 at the low level becomes equal to the voltage between the bases of the transistors Q1 and Q2 at the pedestal level. Therefore, if the values of the resistors R1 and R2 are made equal, a current corresponding to the pedestal level of the R output flows through the resistor R2. Since the terminal 16 is low level, the transistor Q10 is turned off as in the case where the terminals 3 and 16 are low level described above. Therefore, the current flowing through resistor R3 is
An external R output equal to the pedestal level of the R output appears at the output terminal 2 only by the current flowing through the.

The operation when pins 3 and 16 are high level is as follows. Similarly to the case where the terminal 3 is at the high level and the terminal 16 is at the low level, the transistors Q1 and Q2 are off, and a current corresponding to the pedestal level of the R output flows through the resistor R2. Also, the transistor Q14 turns on, so the resistor R8
As a result, the base potential of the transistor Q10 rises and the transistors Q12 and Q10 can be turned on. At this time, the resistance R
The current flowing through the resistors R2 and R7 flows through 3, and the output terminal 2 receives R
An external output with a level higher than the pedestal level of the output appears.

As explained above, the embodiment shown in FIG. 4 operates as shown in FIG. The switch circuit that switches between R output and external R output is transistors Q5, Q7, Q8, Q9, resistor R4, current source 12 and power supply 1
It is composed of 4.

[Embodiment 3] FIG. 5 is a circuit diagram of a third embodiment of the present invention. The configuration of the embodiment shown in FIG. 5 is as follows. Transistor
The base of Q1 is connected to the emitter of the transistor Q15, and the other end is connected to the resistor R9 connected to the power supply 1, and the emitter is connected to the resistor R1. The other end of the resistor R1 is connected to the emitter of the transistor Q2, and the base of the transistor Q2 is the transistor Q3.
The base, the emitters of Q16 and Q17, the collector of Q18, and the other end are connected to the resistor R10 connected to the reference potential. The collector of the transistor Q2 is connected to the output terminal 2, the collectors of the transistors Q4 and Q20, and the other end thereof is connected to the resistor R3 connected to the reference potential. The base of the transistor Q4 is connected to the emitter of the transistor Q21 and the resistor R12 whose other end is connected to the reference potential, and the emitter is connected to the resistor R2. The other end of the resistor R2 is connected to the emitter of the transistor Q3 and the resistor R11. The other end of the resistor R11 is connected to the emitter of the transistor Q20. The base of the transistor Q20 is a resistor with the emitter of the transistor Q22, the collector of Q23 and the other end connected to the power supply 1.
Connected to R13. The base of the transistor Q21 is connected to the bias circuit 7, and the base of the transistor Q22 is connected to the bias circuit 11. The base of the transistor Q23 is connected to the terminal 16, and the emitter is connected to the emitter of the transistor Q24 and the current source 18 whose other end is connected to the reference potential. The base of transistor Q24 is connected to power supply 20.
The base of the transistor Q15 is connected to the luminance signal processing circuit 4. The base of the transistor Q17 is connected to the color difference signal demodulation circuit 5. The base of the transistor Q16 is connected to the bias circuit 6. Base of transistor Q18 is power supply 1
9 and its emitter is connected to the emitter of the transistor Q19 and the current source 17 whose other end is connected to the power supply 1. The base of the transistor Q19 is connected to the terminal 3. The collectors of the transistors Q1, Q3, Q17, Q21, Q22, Q24 are connected to the power supply 1, and the collectors of the transistors Q15, Q16, Q19 are connected to the reference potential.

Luminance signal processing circuit 4, color difference signal demodulation circuit 5, bias circuit 6,
7 is the same as the embodiment shown in FIG. In addition, the differential circuit consisting of transistors Q18, Q19, current source 17, and power source 19 has terminal 3
Is low level, Q19 is on, high level is Q18
Is turned on. Transistor Q23, Q24, current source 18,
The differential circuit consisting of the power supply 20 has Q24 when the terminal 16 is low level.
Is turned on, and when it is at high level, Q23 is turned on.

In this embodiment, the bases of the transistors Q2 and Q3 are connected in the subtraction circuit composed of the transistors Q1 and Q2 and the resistor R1 which combine the R outputs and the subtraction circuit composed of the transistors Q3 and Q4 and the resistance R2 which combine the external R outputs. Then, by switching this to a color difference signal demodulation circuit and a bias circuit having different potentials, one of the subtraction circuits is operated.

This embodiment also operates as shown in FIG. 6 similarly to the embodiment shown in FIG. The operation of this embodiment will be described by taking the R output as an example. Also, the circuit consisting of transistors Q20, Q22, Q23, Q24, resistors R11, R13, current source 18, power supply 20, bias circuit 11 and terminal 16 is an external R
This is a circuit for switching the output level.

The operation when pins 3 and 16 are low level is as follows. Comparing the base potentials of the transistors Q16 and Q17, since the base potential of Q16 is higher, the transistor Q17 is turned on and the transistor Q17 is turned off because the transistor Q18 is turned off. Therefore, a color difference signal is applied to the bases of the transistors Q2 and Q3. Since the luminance signal is added to the base of Q7 by the emitter follower circuit of the transistor Q15 and the resistor R9, the current of the R1 output component flows to the resistor R1 by the subtraction circuit of the transistors Q1, Q2 and the resistor R1. On the other hand, the base of the transistor Q4 has a transistor Q21 and a resistor R12.
The emitter-follower circuit of the circuit gives a potential lower than the DC level of the chrominance signal demodulation output when there is no signal by the V _{BE of the} transistor Q21. Q3, Q
Transistor Q4 turns off unless there is a level lower than 4 2V _BE .

Since the transistor Q23 is off, the transistor Q22 is also off. Therefore, the base of the transistor Q20 becomes the potential of the power source 1 and Q20 is turned off.
As a result, the transistors Q3, Q4, Q20 are turned off. From the above, the current flowing through the resistor R3 is only the R output component, and the R output appears at the output terminal 2.

The operation when terminal 3 is at high level and terminal 16 is at low level is as follows. Since the transistor Q18 turns on,
The resistor R10 raises the base potential of the transistor Q2 to turn off the transistor Q17 and turn on Q16.
At this time, the base potentials of the transistors Q2 and Q3 are the potential of the bias circuit 6, that is, the transistor Q16 from the pedestal level of the luminance signal applied to the base of the transistor Q15.
Only V _{BE has a} higher potential. Therefore, if the output of the luminance signal processing circuit does not exceed the potential higher than the pedestal level by 2V _{BE of the} transistors Q1 and Q2, the transistor Q1,
Q2 is off. On the other hand, the base of the transistor Q4 has a potential lower than the potential of the bias circuit 7 by V _{BE of the} transistor Q21 by the emitter follower circuit of the transistor Q21 and the resistor R12, that is, in addition to the base of the transistor Q2 when the transistor Q17 is turned on. A potential almost equal to the direct current level of the color difference signal demodulated output when there is no signal is applied. Therefore, the voltage between the bases of the transistors Q3 and Q4 is the same as in the embodiment of FIG. 4 when the pedestal level of the R output appears at the output terminal 2.
It becomes equal to the voltage between the bases of 1 and Q2. Therefore, the resistors R1 and R
If the values of 2 are made equal, a current corresponding to the pedestal level of the R output flows through the resistor R2. Since the terminal 16 is at low level, the transistor Q20 is turned off as in the case where the terminals 3 and 16 are at low level described above. Therefore, the current flowing through the resistor R3 is only the current flowing through the resistor R2, and an external output equal to the pedestal level of the R output appears at the output terminal 2.

The operation when pins 3 and 16 are high level is as follows. As in the case where the terminal 3 is at the high level and the terminal 16 is at the low level described above, the transistors Q1 and Q2 are off and the resistor R
A current corresponding to the pedestal level of the R output flows through 2. Also, since the transistor Q23 is turned on, the resistance R
By 13, the base potential of the transistor Q20 drops and the transistors Q20 and Q22 can be turned on. At this time, the current flowing through the resistors R2 and R11 flows through the resistor R3, and the external R output having a level higher than the pedestal level of the R output appears at the output terminal 2.

As described above, the embodiment shown in FIG. 5 operates as shown in FIG. The switch circuit for switching between the R output and the external R output is composed of transistors Q16, Q17, Q18, Q19, a resistor R10, a current source 17, and a power supply 19.

〔The invention's effect〕

As described above, the circuit of the present invention has a simple structure by switching the video signal demodulation output and the external RGB output with a single switch circuit, and an effect of making noise such as "hazard" unlikely to occur at the time of switching. There is.

[Brief description of drawings]

1 is a circuit diagram of a first embodiment of the present invention, FIG. 4 is a circuit diagram of a second embodiment of the present invention, and FIG. 5 is a circuit diagram of a third embodiment of the present invention. Figure is the circuit diagram of the conventional example, and Figure 3 is the first.
FIG. 6 is a waveform diagram showing the operation of FIG. 2 and FIG. 6 is a waveform diagram showing the operation of FIG. Q1 to Q24 ... Transistors, R1 to R13 ... Resistors, 1 to 3, 16 ... Terminals, 4 ... Luminance signal processing circuit, 5 ... Color difference signal demodulation circuit, 6,
7,11 ... Bias circuit, 12,13,17,18 ... Current source, 14,15,19,
20… Power supply, 8,9,10… Switch circuit.

Claims (1)

[Claims] 1. A third transistor having the same conductivity type as the first transistor, wherein a first resistor is connected between the emitter of the first transistor and the emitter of a second transistor of a conductivity type different from that of the first transistor. A second resistor is connected between the emitter of the second transistor and the emitter of a fourth transistor of the same conductivity type as the second transistor, the collectors of the first and third transistors are commonly connected, and the second, A circuit in which the collectors of the fourth transistors are commonly connected, the first signal processing circuit is connected to the base of the second transistor, and the second signal is connected to the base of the third transistor.
Signal processing circuit is connected, the bases of the first and fourth transistors are commonly connected, and connected to a switch circuit that switches to either one of the third signal processing circuit and the fourth signal processing circuit, A switching circuit, wherein only one of the first and second transistors and the third and fourth transistors is operated by selectively switching the switching circuit.