JPH0760887B2 - Semiconductor photoelectric conversion device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor photoelectric conversion device using an electrostatic induction transistor (SIT) as a light detection and switching element.

(Prior Art) A semiconductor photoelectric conversion device using SIT as a light detection and switching element is disclosed in, for example, Japanese Patent Laid-Open Nos. 58-93386 and 59-1.
No. 07569 and No. 59-107570. Second
FIG. A shows a pixel structure of the one-dimensional sensor disclosed in Japanese Patent Laid-Open No. 59-107569, wherein 1 is an n ⁺ substrate made of Si, 2 is a high resistance n layer or an intrinsic semiconductor layer, and 3 is a high impurity concentration. A first gate (referred to as a control gate) formed of a P ⁺ region, 4 is a source formed of a high impurity concentration N ⁺ region formed so as to surround the control gate 3, and 5 is for separating adjacent pixels. The second gate (referred to as a shielding gate) 6 composed of a P ⁺ region having a high impurity concentration,
A gate insulating film such as SiO ₂ or Si ₃ N ₄ , 7 is a control gate electrode, 8 is a source electrode, 9 is a shielding gate electrode, and 10 is a drain electrode. Read-out pulses φ _G1 , φ _G2 , ... Are printed from the pixel selection circuit (not shown) on the control gate electrodes 7 of the successive pixels, and the shielding gate electrodes 9 are commonly connected to all the pixels, and are supplied from a bias circuit (not shown). A predetermined voltage V _SG is applied. Further, the drain electrode 10 is connected to the video power supply 12 via the load resistor 11.

2B is an equivalent circuit diagram of FIG. 2A, in which 13 is an equivalent SIT having a control gate for receiving light, and 14 is an equivalent SIT having a parasitic shielding gate.

In the one-dimensional sensor shown in FIG. 2A, a depletion layer spreads from each shielding gate 5 by applying a constant bias voltage V _SG to the shielding gate electrode 9 commonly connected to all pixels. Thus, each pixel can be separated. Such a separation method has a feature that the structure is simple, but on the other hand, since it is separated in the depletion layer, photocharges generated in the vicinity thereof are collected through the shielding gate 5 and there is a problem that the sensitivity is lowered. As a method to solve such a problem,
Bias voltage V applied to the shielding gate electrode 9
It is conceivable that _SG is lowered to suppress the spread of the depletion layer to a small extent. In this case, the so-called signal of photocharge accumulated in the control gate 3 flows into the adjacent control gate 3 through the shielding gate 5. There is a problem of crosstalk.

As another separation method, a method in which a diffusion layer having the same conductivity type as that of the substrate is provided between pixels has been proposed. However, in the conventional semiconductor photoelectric conversion device having this isolation structure, in order to effectively collect the photocharges generated by light irradiation in the gate region of the SIT, for reasons such as increasing the mounting density of pixels, A diffusion layer serving as an isolation region is provided close to the SIT gate region. Therefore, the light receiving area of each pixel (SIT) is small, the signal S / N ratio is particularly poor in weak light, and the spectral sensitivity of short wavelength light is low.

(Object of the Invention) An object of the present invention is to solve the above-mentioned problems and to provide a highly sensitive semiconductor photoelectric conversion device.

(Summary of the Invention) The present invention is directed to a semiconductor substrate of one conductivity type which is a first main electrode region, a high resistance region of one conductivity type provided on the semiconductor substrate, and a high resistance region provided on the high resistance region. In a semiconductor photoelectric conversion device having a second main electrode region of conductivity type and a gate region of opposite conductivity type, in the high resistance region, provided at least a carrier diffusion length generated by photoexcitation from the gate region,
It is characterized in that it has an impurity concentration higher than that of the high resistance region and has a pixel separation region of one conductivity type having the same potential as that of the first main electrode region.

Further, the present invention provides a one-conductivity-type semiconductor substrate serving as a first main electrode region, a one-conductivity-type high resistance region provided on the semiconductor substrate, and a one-conductivity-type semiconductor substrate provided on the high-resistance region. In a semiconductor photoelectric conversion device having a second main electrode region and a gate region of opposite conductivity type, in the high resistance region, an insulating isolation region provided at least a carrier diffusion length generated by photoexcitation from the gate region, And a pixel isolation region of one conductivity type having the same impurity concentration as that of the first main electrode region, the impurity concentration being higher than that of the high resistance region. It is characterized by getting.

Here, for example, the substrate is N ^+, and the depletion layer laterally extended from the P ⁺ diffusion layer of the opposite conductivity type is used as the light receiving region, and a position apart from this light receiving region is reached, for example, the N ⁺ substrate. It is assumed that an N ⁺ layer having a narrow depth is formed. In this way, the N ⁺ layer acts as a valley of a potential for electrons of the electron-hole pairs generated in the light receiving region, and conversely acts as a wall for holes. Therefore, the electron-hole pair is easily dissociated due to the presence of the N ⁺ layer, the electron is absorbed by the N ⁺ layer, and the hole is reflected by the potential wall of the N ⁺ layer to the P ⁺ region. Spread. Moreover, since the holes diffuse in the region where the electron concentration is low, the diffusion length becomes long. When the diffusion length is increased in this way, holes generated in the farther light receiving region can be collected in the P ⁺ region, and thus the sensitivity is improved.

The results of experimentally confirming this will be described with reference to FIGS. 3A to 3C and FIG. 3A to 3C are samples used in the experiment, and FIG. 3A shows that an i layer 22 is epitaxially grown on an N ⁺ substrate 21 made of Si, and a P ⁺ diffusion region 23 is formed in the i layer 22. And a PIN photodiode is configured as shown in FIG. 3B, and V reaching the N ⁺ substrate 21 is provided between the adjacent PIN photodiodes.
Embedding a dielectric 24 to form a groove, and the third panel C is obtained by forming the N ⁺ diffusion layer 25 reaching the N ⁺ substrate 21 in place of the V-groove dielectric buried. In addition, in FIG. 3B and C, P ⁺
The distances x between the diffusion region 23 and the dielectric 24 and the N ⁺ diffusion region 25 are equal to each other. The experiment was performed by irradiating the light beam spot on the surface of the PIN photo diode while moving the sample and the light beam spot having a small diameter using a light source such as a laser relatively at each position x. The photocurrent I _ph is measured and the sensitivity distribution is obtained.

Figure 4 shows the experimental results, where the vertical axis is the photocurrent I _ph.
The horizontal axis represents the distance x from the P ⁺ diffusion region 23, and the curve a,
b and c show the sensitivity distributions for the samples of FIGS. 3A, 3B and 3C, respectively. Adjacent PINs, as indicated by curve a
If there is nothing between the photodiodes, the photocurrent I _ph decreases exponentially with the distance x. On the other hand, as shown by the curves b and c, when there is the dielectric 24 and the N ⁺ diffusion region 25 which act as an isolation region between the adjacent PIN photodiodes, the photocurrent I _ph sharply decreases in the isolation region. However, the change in the photocurrent I _ph during that time is much smaller when the N ⁺ diffusion layer 25 is provided than when the dielectric 24 is provided.
This result demonstrates that the N ⁺ diffusion layer 25 acts to significantly increase the sensitivity. In FIG. 3C, the distance between the P ⁺ diffusion region 23 and the N ⁺ diffusion layer 25 is the N ⁺ diffusion layer.
When the impurity concentration of 25 is 1 × 10 ¹² cm ^-3 , 60 μm, 1 × 10
20 μm for ¹³ cm ^-3 , 6 μm for 1 × 10 ¹⁴ cm ^-3 ,
When it is 1 × 10 ¹⁵ cm ⁻³ , about 1 μm is preferable.

(Embodiment) FIGS. 1A and 1B show a first embodiment of the present invention.
FIG. 1A shows a sectional structure of one pixel, and FIG. 1B shows an equivalent circuit thereof. In this e.g., N on the N ⁺ substrate 31 ^- epitaxial layer
Grow 32 and N ⁺ source region in this epitaxial layer 38
33 and a P ⁺ gate region 34 is formed so as to surround the 33, and a pixel separation region formed of an N ⁺ diffusion layer is formed at a position separated from the P ⁺ gate region 34 by a diffusion length of co-holes a little between adjacent pixels. 35 is formed so as to reach the N ⁺ substrate 31. 36,37
And 38 denote a source electrode, a gate electrode and a drain electrode, respectively, a source electrode 36 is grounded and a gate electrode 37 is provided.
Bias voltage V _G from the bias power supply 40 via resistor 39
The drain voltage V _DS is applied to the drain electrode 38 from the bias power supply 42 via the load resistor 41 so that the voltage drop due to the photocurrent in the load resistor 41 is taken out from the output terminal 43.

FIG. 5 shows another embodiment of the present invention. In this example, a narrow V groove is formed in the epitaxial layer 32 to a depth reaching the N ⁺ substrate 31, and a pixel isolation region 35 made of an N ⁺ diffusion region is formed along the side surface of the V groove to form the V groove. The insulator 45
Different from the one shown in FIGS. 1A and 1B in that the drain electrode 38 is formed on the back surface of the N ⁺ substrate 31 by filling the same with a small amount of co-holes between the P ⁺ gate region 34 and the pixel isolation region 35. Separated by the diffusion length. In this example, since the V groove is formed and the pixel isolation region 35 is formed along the side surface thereof, it is formed by diffusing it from the surface of the epitaxial layer 32 as shown in FIGS. Compared with the above case, there is an advantage that the width of the V groove and the pixel isolation regions 35 on both sides thereof can be made extremely small to 1 to 2 μm, and the light receiving area can be further widened.

6A and 6B show another embodiment of the present invention. In this example, a linear array sensor is shown, FIG. 6A shows the pixel structure, and FIG. 6B shows the entire equivalent circuit.
In this example, the pixel structure is different from that of FIG. 1A in that the gate capacitor is formed by providing the gate electrode 37 on the P ⁺ gate region 34 through the insulating film 47, and the whole circuit is shown. As a configuration, there is an advantage that the circuit is simplified because there is no SIT having a parasitic shielding gate as shown in FIGS. 2A and 2B.

(Effects of the Invention) As described above, according to the present invention, since the collection rate of carriers in the gate region can be increased, the photoelectric conversion efficiency can be increased and the sensitivity can be improved, and
Since the light receiving region can be made large, the spectral sensitivity of short wavelength light can be improved. For example, the SIT image sensor according to the present invention can improve the sensitivity and the photosensitivity by 20 to 30% as compared with the case where the depletion layer separation as shown in FIG. 2A is applied.

[Brief description of drawings]

1A and 1B are views for explaining the first embodiment of the present invention, FIGS. 2A and 2B are views for explaining a conventional example, and FIGS. 3A to 3C and 4 are drawings of the present invention. FIG. 5 is a diagram for explaining the principle of FIG. 5, FIG. 5 is a diagram for explaining the second embodiment of the present invention, and FIGS. 6A and 6B are diagrams for explaining the third embodiment of the present invention. 31 …… Substrate, 32 …… Epitaxial layer 33 …… Source region, 34 …… Gate region 35 …… Pixel isolation region, 36 …… Source electrode 37 …… Gate electrode, 38 …… Drain electrode 45 …… Insulator , 47 …… Insulating film

Claims (4)

[Claims] 1. A semiconductor substrate of one conductivity type which becomes a first main electrode region, a high resistance region of one conductivity type provided on this semiconductor substrate, and a first conductivity type semiconductor substrate provided on this high resistance region. In a semiconductor photoelectric conversion device having a second main electrode region and a gate region of opposite conductivity type, in the high resistance region, provided at least a carrier diffusion length generated by photoexcitation from the gate region,
A semiconductor photoelectric conversion device having an impurity concentration higher than that of the high resistance region and having a one conductivity type pixel isolation region having the same potential as the first main electrode region. 2. A photoelectric conversion element having the high resistance region, a second main electrode and a gate region is provided on the semiconductor substrate in a one-dimensional or two-dimensional manner by being separated by the pixel isolation region. The semiconductor photoelectric conversion device according to claim 1, which is characterized in that. 3. A one-conductivity-type semiconductor substrate serving as a first main electrode region, a one-conductivity-type high resistance region provided on the semiconductor substrate, and a one-conductivity-type first substrate provided on the high-resistance region. In a semiconductor photoelectric conversion device having a second main electrode region and a gate region of opposite conductivity type, in the high resistance region, an insulation separation region provided at least a carrier diffusion length generated by photoexcitation from the gate region, The pixel isolation region is provided along the side surface of the insulating isolation region, has a higher impurity concentration than the high resistance region, and has the same potential as the first main electrode region and one conductivity type pixel isolation region. A semiconductor photoelectric conversion device characterized by the above. 4. A plurality of photoelectric conversion elements having the high resistance region, the second main electrode and the gate region are separated one-dimensionally or two-dimensionally on the semiconductor substrate by the insulating separation region and the pixel separation region. The semiconductor photoelectric conversion device according to claim 3, wherein the semiconductor photoelectric conversion device is provided.