JPH0770113B2 - Pilot signal generation circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pilot signal generation circuit that can be used in a recording device, particularly in a magnetic recording device that performs tracking control using a pilot signal.

2. Description of the Related Art In recent years, in magnetic recording / reproducing devices (hereinafter referred to as VTRs), densification is promoted, and the width of recording magnetization loci (hereinafter referred to as tracks) tends to be narrowed. Ideally, tracks are originally recorded on a magnetic tape in a straight line, but in reality, due to variations in mechanical precision, each VTR is recorded with a unique curve. For this reason, when the magnetic tape recorded in a certain VTR is reproduced in another VTR for compatible reproduction, the control using the conventional control signal cannot correct the peculiar bending difference between both VTRs. The reproduced image quality deteriorates accordingly. This problem becomes more serious as the track width becomes narrower.

In order to solve this problem, a tracking error signal corresponding to track bending may be obtained by some method, and the rotary head may be displaced in the rotation axis direction according to the error signal.

As a method of displacing the rotary head in the direction of the rotation axis, a method using an electro-mechanical conversion element composed of a piezoelectric element is well known.

As a method of obtaining a tracking error signal according to track bending, there is a method of using a pilot signal for tracking control (hereinafter simply referred to as a pilot signal). This method is well known as a control method for a so-called 8 mm VTR, so a brief overview will be given here.

FIG. 4 is a magnetization trajectory in which a pilot signal is recorded,
A1, B1, A2, B2, ... Are magnetization loci in which the video signals for one field are recorded as one track by the A head and the B head. f1 to f4 are four types of pilot signals,
It is cyclically switched for each field and recorded by being superimposed on the video signal. The frequency of each pilot signal is set to a frequency of about 6.5 fH to 10.5 fH as shown in Table 1 when one horizontal synchronizing signal frequency is fH.

At the time of reproduction, the pilot signals recorded on both adjacent tracks located before and after the main recording track scanned by the head are reproduced by a head wider than the recording track pitch or reproduced as a crosstalk signal. The control system is configured so as to be stable in that the levels of the pilot signals reproduced from the tracks are equal. With such a configuration, the head can perform on-track on the main scanning track for reproduction scanning.

To obtain a single common control signal using four types of pilot signals f1 to f4, generally, as shown in FIG.
Each of the signal generating circuits 51 to 54 of ~ f4 and the multiplexer 55 for selectively outputting them were required, and a single pilot signal 56 had to be formed by them.

FIG. 6 is a block diagram of a reproducing circuit for obtaining a tracking error signal using four types of pilot signals. In the figure, a reproduction RF signal in which a video signal and a pilot signal are combined is input from a terminal 61. Circuit 62
Is a low-pass filter that separates and extracts only the pilot signal from the reproduced RF signal. The pilot signal obtained at this time is a composite signal of the pilot signals recorded on the main scanning track and both adjacent tracks. Circuit 63
Is a balanced modulation circuit, and the reference signal supplied from the terminal 64 is a pilot signal having the same frequency as the pilot signal recorded on the main scanning track. For example, in FIG. 4, when the head reproduces and scans on the track A2, the input signals to the balanced modulation circuit 63 are f2, f3, and f4,
The reference signal supplied from terminal 64 is f3. Therefore, the output signal of the balanced modulation circuit 63 is the sum and difference signals of the signals f2, f3, and f4 and the signal f3. Circuits 65 and 66 are tuning amplifier circuits, circuit 65 is tuned to the signal at fH, and circuit 66
Tunes to the 3fH signal. The circuits 67 and 68 are detection rectification circuits, and the circuit 69 is a level comparison circuit. Therefore, each pilot signal extracted as a crosstalk signal from both adjacent tracks is separated and extracted as a difference signal with the pilot signal recorded on the main scanning track, and then the level comparison circuit 69 outputs the difference signal. A signal corresponding to the level difference is taken out at the terminal 60. Since the signal output to the terminal 60 includes information on the head track deviation amount and the deviation direction, it can be used as a tracking error signal.

The above is the outline of the method for obtaining the tracking error signal by using the four types of pilot signals.

To accurately obtain each of the pilot signals f1 to f4 shown in Table 1, firstly, there are four types of crystal oscillation circuits, and secondly, there is one reference oscillation circuit having a common multiple. There is a method of providing four kinds of pilot signals with a frequency divider circuit provided therein, and a third method of using a three-valued staircase wave as disclosed in Japanese Patent Laid-Open No. 59-19224.

The method including the first four types of crystal oscillation circuits is expensive and inconvenient.

A method of providing one reference oscillation circuit having the second common multiple and creating four types of pilot signals by the frequency dividing circuit is a method in which the output of the variable oscillation circuit for correcting the jitter of the reproduced color signal is set to the pilot signal. It is useful in that it can also be used as the reference signal of. Then, the value should be selected as the value of 378fH. At this time, if the same signal is divided into 1/58, 1/50, 1/36 and 1/40, the signals f1 to f4 shown in Table 1 can be obtained. . The pilot signal obtained by frequency division is a rectangular wave, and contains harmonic components, so when recording and reproducing with the video signal as it is, the harmonic component of the pilot signal was converted to a low-frequency video signal. The color signal becomes a noise signal.

Assuming that the S / N ratio of the reproduced color signal is 40 dB or more, for example, the influence of the harmonic component of the pilot signal on the color signal can be calculated by changing the recording current Ipn of the nth harmonic of the pilot signal to the color signal. It is necessary to make Ipn / Ic ≤ −40 dB (1) for the recording current Ic of.

On the other hand, the recording current Ip ₁ of the fundamental wave of the pilot signal is 8 mmVT
The R standard is _{Ip 1 / Ic = -14dB ± 2dB} ...... (2). Therefore, the harmonic level with respect to the fundamental wave of the pilot signal must satisfy the value Ipn / Ip ₁ ≤-28 dB (3), which is obtained by subtracting the severe condition of the equation (2) from the equation (1).

There is a method of performing D / A conversion to attenuate the harmonic components of the pilot signal. However, there is a drawback that a highly accurate resistor is required to perform D / A conversion.
When four types of pilot signals are handled by the D / A conversion circuit,
A common number of bits that divides the half period of each pilot signal into integers is not found. This means that the positive half cycle and the negative half cycle of the D / A converted pilot signal are different from each other, and even harmonics are generated. Therefore, in order to sufficiently attenuate the level of the even harmonics, it is necessary to select a large number of bits, which is not practical in terms of cost. Although there is a method of using a high-order low-pass filter to attenuate harmonic components, it cannot be said that even a fifth-order low-pass filter having a corner frequency at 200 KHz can be used to achieve sufficient attenuation.

The method of using the three-valued staircase wave shown in the above-mentioned third Japanese Laid-Open Patent Publication No. 59-19224 has the circuit configuration shown in FIG. 7, and the waveform of each part is shown in FIG.

In FIG. 7, a signal of 378fH is supplied from the terminal 71. The circuit 72 is a programmable counter, and its output signal a counts (11 + 12) 378fH and generates a pulse. This signal a will generate pulses at a cycle of (11 + 12) as shown in FIG. On the other hand, the output signal b of the programmable counter 72 generates a pulse when 11 378fH are counted. Therefore, the period from the signal a to the signal b is 11 as shown in FIG. The circuit 73 is a reset set flip-flop (RS-FF), and the signal a
And is reset by the signal b to output the signal c. The circuit 74 is a toggle flip-flop (T-FF) and outputs the signal d. The circuits 75 and 76 are AND circuits and output AND outputs e and f of the Q output of the RS-FF73 and the Q signal of the T-FF74. Reference numerals 77 and 78 are analog switches. When the signals e and f are at high level, the switches are closed, and when they are at low level, the switches are open. One side of the switch is connected to the power supply voltage and the ground side, respectively, and by the switches 77 and 78 and the resistors R1, R2, R3, the switch 77 becomes high level when only the switch 77 is on, and the low level when only the switch 78 is on, Switch 77,78
Since both are set to the middle level when they are off, a ternary staircase wave can be created. In order to obtain four kinds of pilot signals, the frequency division ratio (11 and 11 + 12) of the programmable counter 72 shown in FIG. 7 may be changed.

In the three-valued staircase wave by this device, the attenuation amount satisfying the conditions is obtained as shown in Table 2, but it cannot be said that there is enough margin, and a high-order low-pass filter is required.

Problems to be Solved by the Invention In the conventional method, a high-order low-pass filter is required to sufficiently attenuate the harmonic components of the pilot signal, and a D / A converter with a large number of bits is used. There was a drawback to do.

The present invention provides a specific and simple circuit configuration for generating a staircase wave signal.

Means for Solving the Problems In order to solve the above problems, the present invention includes a programmable counter, a table ROM and a D / A converter, and the table ROM has an address that matches the output value of the programmable counter. The level switching data of the corresponding staircase signal is set as an output value, and the level switching data of the staircase signal is set as a value for attenuating the harmonic component of the pilot signal.

Further, a programmable counter, a table ROM, a comparator and a D / A converter are provided, and when a coincidence pulse is output from the comparator, the count value for switching the level of the staircase signal output from the table ROM is switched, and The count value for switching the level of the staircase wave signal is a value that attenuates the harmonic component of the pilot signal.

Effect According to the present invention, it is possible to realize an IC of a ± 4 step staircase signal circuit for obtaining a pilot signal in which the values of the 3rd, 5th and 7th harmonic components are sufficiently attenuated. The staircase wave signal of ± 4 steps can be used for the tracking control of.

Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention. There are two methods for storing the data of the staircase wave signal of ± 4 steps in the table ROM. The first embodiment is an apparatus for storing the level switching data of the staircase wave signal in the table ROM.
In the figure, 11 is a latch, 12 is a programmable counter, 13 is a table ROM, 14 is a latch, 15 is a multiplexer (MPX), and 16 to 19 are analog switches. In this device, for example, when f1 is taken as an example, the reference signal (378fH) is divided by 1/58.
Programmable counter 12 that counts while dividing
Is output to the table ROM 13 as an address, and the output state is +1 when the count value of the programmable counter 12 is “0”.
Level (the analog switch 19 is on and the analog switches 16, 17, and 18 are off), the reference signals are counted, and when the count value becomes “4”, the table ROM13 is converted to D / A. The level is switched to +2 by outputting the data for turning off the analog switches 16, 17, 19 of the instrument and turning on the analog switch 18. Continue counting and when the count value reaches "6", the table ROM1
Data for turning off the analog switches 16, 18, and 19 and turning on the analog switch 17 are output from 3, and the level is switched to +3. This is a device that repeats such operations to create a staircase signal of f1. In the figure, the latch 11 is
It is prepared to store 2 bits of selection data of any one of f1 to f4 and 6 bits of the frequency division ratio data thereof, and by rewriting this data, f1 to f4 can be switched. The latch 14 is provided to store the D / A converter switching data output from the table ROM 13, and is a table ROM for switching the D / A converter.
Falling edge of output signal 143 of NOR 144 of data signal 141 and reference signal 142 as to whether output data of 13 is stored in this latch (when signal 141 is at “L” level and reference signal 142 falls) ), The output of the table ROM 13 is written in the latch 14. MPX15 sets the potential corresponding to each switch to switch between positive half cycle (+1 to +4 to +1) and negative half cycle (-1 to -4 to -1) with 1/2 Vdd as the center (level 0). Set to the power supply side when outputting a positive half cycle, and set to the ground side (GND) when outputting a negative half cycle. By using the MPX15, it is possible to reduce the number of resistors and the number of bits of output data of the table ROM13. By turning on any one of the analog switches 16 to 19, the corresponding level can be output.

In this device, since the potential corresponding to each analog switch changes in the positive half cycle and the negative half cycle, it takes time for the potential to stabilize and the problem that the waveform of the staircase wave signal becomes blunted. However, the harmonics are well attenuated.

With the above apparatus, a staircase wave signal of ± 4 steps can be created using the table ROM. Next, a second embodiment will be described.

The second device is a device for storing the count value for switching the level of the staircase signal as data in the table ROM next, and has the circuit configuration shown in FIG. 21 in the figure
Is a latch, 22 is a programmable counter,
23 is a comparator, 24 is a table ROM, 25
Is a counter, 27 is a decoder, and 280 to 287 are analog switches. 230 is output data of the table ROM 24, 231 is output data of the programmable counter 22, and 26 is a pulse output from the comparator 23 when the data 230 and the data 231 are equal.

This device will be described by taking f1 as an example. When the programmable counter 22 gives a frequency division ratio, it counts while dividing the reference signal 378fH according to the frequency division ratio. Now, when the output of the programmable counter 22 is "0", the counter 25
Is also "0", and when the staircase wave signal is outputting a level of -4 (only analog switch 287 is on and other analog switches are off), table ROM24 outputs up to the level of -3 to be output next. It is assumed that the count value “9” of is output. When the programmable counter 22 counts the reference signal and reaches the count value “9”, the comparator 23 determines that the data 230 and 231 match and outputs the pulse 26. This pulse 26 is counted by the counter 25, and the count value becomes "1". The decoder of the output of this counter 25
27 switches analog switches 280 to 287 (only analog switch 286 is on, other analog switches are off)
As a result, the staircase wave signal changes from the level of -4 to the level of -3. Further, the address value given to the table ROM 24 changes due to the change of the count value of the counter 25, and the data output of the table ROM 24 switches to the count value "13" of the -2 level of the staircase wave signal to be output next. In this way, the table ROM 24 outputs the count value to be switched next, and when the programmable counter 22 reaches that value, the value of the counter 25 is increased, and the level of the staircase signal is switched by the change of the value of the counter 25, and Table RO
It is a method of outputting the count value of the next level with M24. As in the case of the first device, the latch 21 is prepared to store 2 bits of selection data of f1 to f4 and 6 bits of the frequency division ratio data thereof. The analog switches 280 to 287 output a level of +4 when only the analog switch 280 is turned on.
The level corresponding to each analog switch can be output when any one analog switch is turned on such that the level of +3 is output when only 1 is turned on.

FIG. 3 is a waveform diagram of a ± 4 step staircase signal,
This waveform is obtained by the timing, level and count number in Table 3.

Also, by using the ± 4 step staircase wave signal, the harmonic components of each pilot signal of f1 to f4 become the values shown in Table 4,
Furthermore, the harmonic component can be attenuated to a value with sufficient margin by the first-order low-pass filter around the corner frequency of 300 KHz.

Therefore, by creating a ± 4 step staircase wave signal as shown in FIG. 3 that increases and decreases at a constant equal level with a predetermined count value shown in Table 3, each of the 3rd, 5th, and 7th orders is generated. It is possible to obtain a pilot signal in which the values of harmonic components are sufficiently attenuated. Furthermore, each harmonic up to the 7th harmonic and 9th harmonic can be obtained by the 1st-order low-pass filter having a corner frequency near 300KHz.
It is possible to attenuate the harmonics of the next order and higher to a necessary and sufficient value, and since it is a ± 4 step staircase wave that changes at the same level, the D / A converter does not require a large number of bits.

Therefore, this ± 4 step staircase wave signal may be used as a pilot signal for VTR tracking control.

This device has more resistors than the first device, but since it is not necessary to switch the potential, the problem of rounding of the staircase signal waveform at the time of level switching is largely eliminated. Further, in the first embodiment, the ROM capacity of the table ROM is (58 + 50)
+ 36 + 40) x 6 bits Compared to the minimum requirement, the second
In this embodiment, at least 16 × 4 × 6 bits are required.

According to the devices shown in the first and second embodiments, when the step wave signal of ± 4 steps is created, the switching data of the D / A converter or the count value corresponding to each level. The data processing and management can now be performed only by the table ROM without relying on the peripheral parts other than the staircase wave signal generation part. In the peripheral part, it is only necessary to manage the switching of f1 to f4. When configuring with a microcomputer, the load on the software is reduced and the table
By using ROM, it becomes possible to generate four kinds of staircase wave signals with one circuit. This circuit configuration does not require a highly accurate D / A converter,
The switch-type D / A converter as shown in the figure is sufficient, a high-order filter as in the past is not required, and a 1st-order rough filter with a break frequency of 300KHz is sufficient. There are three effects.

In addition, the circuit configuration is simple, and it does not include inductance and capacitance components, making it suitable for use as an IC.
Not only the pilot signal for R tracking control, but also when the frequency is different or when a large number of steps are required, the original signal is changed, the table ROM contents and the number of bits are changed, and the D / A
There is the advantage that a harmonic-free signal can be produced by changing the converter.

EFFECTS OF THE INVENTION According to the present invention, when creating four types of pilot signals, it is possible to obtain a pilot signal that has a simple circuit configuration and is suitable for use as an IC, and in which harmonic components are attenuated to a sufficient value. The effect is that you can do it.

[Brief description of drawings]

1 and 2 are block diagrams showing an embodiment of a circuit for generating a four-frequency staircase signal according to the present invention, FIG. 3 is a waveform diagram of a staircase signal used in the present invention, and FIG. 4 is a tracking pilot. FIG. 5 is a diagram schematically showing a part of the magnetization track of a VTR in which a signal is recorded, FIG. 5 is a block diagram showing a conventional example, FIG. 6 is a block diagram showing a reproducing circuit of a 4-frequency tracking control system, and FIG. 7 is FIG. 8 is a circuit diagram of a conventional three-valued staircase wave signal generation circuit, and FIG. 8 is a diagram showing the waveform of each part of FIG. 11,14 …… Latch, 12 …… Programmable counter, 13
...... Table ROM, 15 ...... Multiplexer, 16 to 19 ......
Analog switch.

Claims (2)

[Claims] 1. A programmable counter for counting while dividing a reference signal according to a given frequency division ratio, a table ROM for storing an address and level switching data of a staircase wave signal corresponding to the address, Table R
An output value is switched according to the output value of the OM, and the D / A converter is provided, and the table ROM outputs the level switching data of the staircase wave signal corresponding to the address that matches the output value of the programmable counter as the output value. And the level switching data of the staircase wave signal has a value for attenuating the harmonic component of the pilot signal. 2. A programmable counter that counts while dividing a reference signal according to a given frequency division ratio, a table ROM that stores a count value for switching the level of a staircase signal, and a count value of the programmable counter. And a comparator that outputs a match pulse when the output values of the table ROM match, and a D / A converter that switches the output value when a match pulse is output from the comparator, and outputs the match pulse The table
A pilot value characterized in that the count value for switching the level of the staircase signal output from the ROM is switched, and the count value for switching the level of the staircase signal is a value that attenuates the harmonic component of the pilot signal. Signal generation circuit.