JPH0154770B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention is a magnetic recording/reproducing device (hereinafter referred to as VTR).
It is related to tracking control, and in particular,
This paper proposes a new pilot signal generation circuit that generates a pilot signal for tracking control. In recent years, higher density recording has been promoted in VTRs, and the width of the recorded magnetization locus (track width) has tended to become narrower.
Ideally, the recording magnetization locus would be recorded on a magnetic tape in a straight line, but in reality, it is recorded with a unique curvature for each VTR due to variations in mechanical precision. For this reason, when performing compatible playback in which a magnetic tape recorded on one VTR is played back on another VTR, the inherent bending difference between the two VTRs cannot be corrected using control using conventional control signals. , the playback image quality deteriorates accordingly. and,
This problem becomes more serious as the track width becomes narrower. In order to solve this problem, it is sufficient to obtain a tracking error signal corresponding to the track bending by some method, and to displace the rotary head in the direction of the rotation axis in accordance with the error signal. The method of displacing the rotating head in the direction of the rotation axis is as follows.
A method using an electro-mechanical transducer composed of a piezoelectric element is well known and will not be described here. One method of obtaining a tracking error signal corresponding to track bending is to use a pilot signal for tracking control (hereinafter simply referred to as a pilot signal). In this method, a pilot signal is recorded superimposed on a video signal, and during playback, the pilot signal is reproduced as a stroke signal from an adjacent track to determine the amount and direction of deviation of the scanning head from the recorded magnetization locus. . Various methods have been proposed for detecting tracking error signals using pilot signals, ranging from methods using one type of pilot signal to methods using four types of pilot signals. Since the present invention mainly relates to a method using four types of pilot signals, an outline of the four-frequency pilot signal method will first be explained. FIG. 1 shows a recorded magnetization trajectory by the four-frequency pilot signal method, and FIG. 2 is a block diagram of a reproducing circuit for obtaining a tracking error signal. In FIG. 1, A ₁ , B ₁ , A _{2 .} . . are respective recording tracks recorded on the magnetic tape by the A head and the B head. Arrow 1 indicates the scanning direction of the rotary head. On each recording track, each pilot signal indicated by _f1 to _f4 is sequentially recorded for each field together with the video signal. The recording order of the pilot signals is as shown in FIG. 1, and one type of pilot signal is continuously recorded within one field period. The frequency of the pilot signal is set to the values shown in Table 1, for example.

[Table] In Table 1, _H indicates the frequency of the horizontal synchronization signal, and 6.5 _H indicates a frequency that is 6.5 times the frequency of the horizontal synchronization signal. The frequency difference between the pilot signals between each recording track is _H or 3 _H , as shown in FIG. Then, the head is Ai (i = 1, 2, 3
(...) When scanning a track, the frequency difference between the pilot signal of the scanning track and the pilot signal recorded on the adjacent track on the right on the paper is always _H , and that on the left is always _3H .
When the head scans a Bi track, the relationship is reversed to that described above, and the frequency difference between the pilot signals of the scanning track and the adjacent track on the right is always _3H , and that on the left is always _H. Since the pilot signal is a relatively low frequency signal around 100 KHz, the pilot signal recorded on the adjacent track can be reproduced as a crosstalk signal without the head scanning the adjacent track. For example, the pilot signal obtained when on-tracking the head A ₂ track and performing reproduction scanning is a composite signal of f ₄ , f ₂ , and f ₃ , with f ₄ having the highest level, followed by f ₂ and f _{3 .} Only the same level will be played. When the head slightly deviates from track A ₂ toward track B ₂ and performs reproduction scanning, the level of the obtained reproduction pilot signal decreases in the order of f ₄ , f ₃ , and f ₂ . Conversely, when the head shifts to the track _B1 side and scans, the level of the obtained reproduction pilot signal decreases in the order of f ₄ , f ₂ , and f ₃ . Therefore,
By separating and extracting the difference signals H and _3H between the pilot signal on the main scanning track and each pilot signal recorded on both adjacent tracks, and comparing the reproduction levels of both signals, it is possible to determine the difference signals _H and 3H from the main scanning track. The amount and direction of head deviation can be known. FIG. 2 is a block diagram of a reproducing circuit for obtaining a tracking error signal. In Figure 2,
A reproduced RF signal, which is a combination of a video signal and a pilot signal, is input from terminal 2. Circuit 3 is a low-pass filter that separates and extracts only the pilot signal from the reproduced RF signal. The pilot signal obtained at this time is a composite signal of the main scanning track and the pilot signals recorded on both adjacent tracks. Circuit 4 is a balanced modulation circuit,
The aforementioned composite signal is multiplied by the reference signal supplied from terminal 5. The reference signal supplied from the terminal 5 is a pilot signal having the same frequency as the pilot signal recorded on the main scanning track. For example, in Figure 1, the head is tracked.
When performing reproduction scanning on _A2 , the input signals to the balanced modulation circuit 4 are _f2 , _f4 , _f3 , and the reference signal supplied from the terminal 5 is _f4 . Therefore, the balanced modulation circuit 4
The output signals are the sum and difference signals of each of the f ₂ , f ₄ , and f ₃ signals and the f ₄ signal. Circuit 6 is a tuned amplifier circuit tuned to _H signals, and circuit 7 is a _3H tuned amplifier circuit. Circuits 8 and 9 are detection rectifier circuits, and circuit 10 is a level comparison circuit. Therefore, each pilot signal taken out as a crosstalk signal from both adjacent tracks is separated and taken out as a difference signal from the pilot signal recorded on the main scanning track, and then sent to the level comparison circuit 10. A signal corresponding to the level difference is output to the terminal 11. Since the signal outputted to the terminal 11 includes information on the amount and direction of the head's tracking error, it can be used as a tracking error signal. The above is an outline of the method for obtaining a tracking error signal using four types of pilot signals. The present invention relates to a method for creating four types of pilot signals used for the aforementioned purposes. One method for accurately obtaining each pilot signal shown in Table 1 is to use four types of crystal oscillation circuits, but using four oscillation circuits is inconvenient due to high cost. Another method is to provide one reference oscillation circuit with a common multiple and create four types of pilot signals using a frequency dividing circuit. This method is advantageous in that the output of the variable oscillation circuit for correcting jitter in the reproduced color signal can also be used as a reference signal for the pilot signal. Then, the value should be chosen as 378 _H. When the frequency of the reference signal is 378 _H ,
By frequency-dividing this signal into 1/58, 1/50, 1/40, and 1/36, signals ₁ to ₄ shown in Table 1 are obtained. The pilot signal obtained by frequency division is a rectangular wave and contains harmonic components, so it cannot be recorded or reproduced as is along with the video signal. This is because the harmonic components of the pilot signal become noise signals with respect to the video signal, especially the low frequency converted color signal. Next, the influence of the harmonic components of the pilot signal on the color signal will be explained using numerical values. Let I _Y be the recording current of the FM modulated video signal, I _C be the recording current of the low frequency converted color signal, and I _P be the recording current of the pilot signal. When I _Y =0 (dB), the recording level of the color signal is, for example, I _C /I _Y = -12 (dB), although it depends on the type of tape.
The level at which the fundamental wave component of the pilot signal does not affect the color signal is experimentally determined as I _P /I _Y = -26.
(dB) or less. On the other hand, if the harmonic component of the pilot signal is I _po , it has been experimentally confirmed that the level at which the harmonic component does not affect the color signal is I _po /I _C = -40 (dB) or less. There is. From the above, the harmonic components of the pilot signal need to be less than -26 (dB) of the fundamental wave component, (I _po /I _P = -26 (dB)). The first attenuates the harmonic components of the pilot signal.
This method is a method of performing D/A conversion. However, it has the disadvantage that a highly accurate resistor is required for D/A conversion. Furthermore, when one D/A conversion circuit handles four types of pilot signals, a common number of bits cannot be found to divide the half period of each pilot signal into an integer fraction. This means that
The positive half period and negative half period of the D/A converted pilot signal are different, and even harmonics are generated. Therefore, in order to sufficiently attenuate the level of even harmonics, it is necessary to select a large number of bits, which is not practical in terms of cost. The second method uses a high-order low-pass filter. Now consider a 5th order filter. In the low-pass filter, attenuation of 3 (dB) occurs at the corner frequency. Therefore, in order to pass the f ₄ frequency shown in Table 1 without attenuation, it is necessary to select the corner frequency of the low-pass filter to be 200 KHz or more. Here, the corner frequency is set to 200KHz. If the ratio of the positive half period and negative half period of a rectangular wave is equal, the even-order high frequency is zero. Therefore, it is only necessary to consider the odd harmonics. The third harmonic (approximately 300 KHz) of the pilot signal _f1 is least attenuated by the low-pass filter. The nth harmonic due to the rectangular wave is attenuated to 1/n with respect to the fundamental wave. Therefore,
The third harmonic has a level of -10 (dB) relative to the fundamental wave. The amount of attenuation at 300KHz by the fifth-order low-pass filter with a corner frequency of 200KHz is approximately -17 (dB). That is, by using a low-pass filter, the third harmonic of f ₁ is -27
(dB). This value is the aforementioned I _po /I _P = -26
(dB), but on the other hand, it can be said that there is no margin. Based on the above idea, 5th of ₁
If we calculate the value of the harmonics relative to the fundamental wave, we get −54
(dB), which is a sufficiently attenuated value. As is clear from the above explanation, if it is possible to attenuate the levels of the even-order harmonics and third harmonics of the pilot signal in some way, it can be done with sufficient margin by combining it with a 5th-order low-pass filter. It is possible to attenuate the harmonic components of the pilot signal. The present invention does not use an expensive D/A conversion method,
The present invention provides a method of attenuating even-order harmonics and third-order harmonics with a simple circuit configuration. A first object of the present invention is to provide a method of attenuating the third harmonic to a practically sufficient value by selecting a frequency division ratio, which will be described later, from a common reference signal. The details of the present invention will be explained below with reference to the drawings. FIG. 3 shows a ternary staircase wave used in the present invention. In the figure, T is the period, l ₁ is Low and
The period of the high period is shown, and l ₂ is the period of the intermediate level. Further, h and h' indicate levels from an intermediate level to High and Low.
If l ₂ is taken as a variable, l ₁ can be expressed by equation (1). l ₁ =T/2-l ₂ (1) If n is the harmonic order, the Fourier series expansion of the ternary staircase wave shown in FIG. 3 is expressed by equation (2). Note that equation (2) is shown by extracting only the items that include n from the equation that expanded the Fourier series.
As is clear from equation (2), when h=h', the even harmonics become zero. Further, when n=3, the condition for the value of equation (2) to become zero is T=6l ₂ . This shows that l ₁ :l ₂ =2:1. Therefore, by using a ternary staircase wave that satisfies the above conditions, even-order harmonics and third harmonics can be reduced to zero, and as already explained, by combining it with a fifth-order low-pass filter, the pilot It is possible to attenuate the harmonic components of the signal to the extent that they do not affect the color signal. Then, divide the common reference signal 378 _H to obtain f ₁ ~ _{f 4}
Let us consider how to create a ternary step wave with a period of . The pilot signal _f1 is obtained by dividing _378H by 1/58. This means that there are 58 cycles of 378 _H within one period of _f1 . Therefore, by counting 378 _H within 58, one period of f ₁ can be divided into appropriate values. Table 2 shows the frequency division ratios for obtaining the pilot signals of f ₁ to _{f 4} and the frequency division ratios that fall within l ₁ and l ₂ shown in Figure 3.
378 The value of the difference between the fundamental wave component and the third harmonic component when the number of cycles of _H and the ratio of l ₁ and l ₂ are the values shown in Table 2 is calculated based on formula (2). It is shown.

[Table] As is clear from Table 2, even if l ₁ :l ₂ = 2:1 is not selected, the third harmonic level can be attenuated to a practically sufficient value by dividing into the ratio shown in Table 2. can be done. Note that if a ternary staircase wave with the division ratio shown in Table 2 is combined with a 5th-order low-pass filter, the influence of the third harmonic of the pilot signal on the color signal will be approximately equal to that of the third harmonic shown in Table 2. You can have a leeway by the value of the level. Next, a circuit processing method for suppressing the generation of even-order harmonics will be described. One factor that generates even-order harmonics occurs when h and h' shown in FIG. 3 are not equal. However, as will be described later, the condition h=h' is satisfied by making the dividing resistances of the output stage equal. Another factor occurs when the length of the high level period l ₁ (written as l _1H ) and the length of the low level period l ₁ (written as l _1L ) of the waveform shown in FIG. 3 are not equal. Even-order harmonics, especially the second high frequency (approximately 200 KHz) of pilot signal ₁ , cannot be attenuated by a low-pass filter having a corner frequency at 200 KHz. Therefore, the generation of even-order harmonics must be strictly suppressed. The present invention realizes a circuit configuration that satisfies the condition of l _1H = l _1L without being affected by the transmission delay time of the circuit by counting l _1H and l _1L with the same counter. FIG. 4 shows a circuit for creating a ternary staircase wave according to the present invention, and FIG. 5 shows waveforms at various parts in FIG. In FIG. 4, a signal of 378 _H is supplied from terminal 12. The circuit 13 is a programmable counter (hereinafter simply referred to as a counter), and its output signal a generates a pulse by counting (l ₁ +l ₂ ) 378 _H. Since this signal a resets the counter 13, the signal a becomes (l ₁ +
A pulse is generated with a period of l ₂ ). On the other hand, the output signal b of the counter 13 generates a pulse when _one 378 _H is counted. Therefore, as shown in FIG. 5, the period from signal a to b is _l1 . The circuit 14 is a reset flip-flop (RS-FF), which is set by a signal a, reset by a signal b, and outputs a signal c. The circuit 15 is a flip-flop FF and outputs a signal d. Circuits 16 and 17 are AND circuits, and RS-FF1
AND of the Q output of 4 and the Q and signals of FF15
Outputs e and. 18 and 19 are electronic switches; when the signals e and are at high level, the switches are closed; when the signals are at low level, the switches are open. One side of the switch is connected to the power supply voltage and ground, respectively. switch 18
A ternary staircase wave can be created by 19 and resistors R ₁ , R ₂ , and R ₃ . Note that resistors with the same symbol have the same resistance value. During the period when the signals e and are low, that is, when the switches 18 and 19 are open, the potential of the signal g output to the terminal 20 is 1/2V _DD . When switch 18 is ON, resistors R ₁ and R ₂ are connected to the power supply voltage. At this time, the potential V _H of the signal g is V _H = R ₁ + R ₂ + R ₃ /2 (R ₁ + R ₂ ) + R ₃ ·V _DD (3). When switch 19 is ON, resistors R ₁ and R ₂ are connected to the ground side, and the potential V _L of signal g at this time is V _L = R ₁ + R ₂ /2 (R ₁ + R ₂ ) + R ₃ · V _DD …(4). The condition for h=h' in FIG. 3 is V _H -1/2V _DD =1/2V _DD -V _L (5). Equation (5) can be rewritten as equation (6). V _H +V _L =V _DD (6) It is clear that equation (6) is satisfied by adding equations (3) and (4). That is, the condition h=h' is satisfied. In the ternary staircase wave shown in FIG. 5g, the low period l _1H and the high period l _1H are counted by the counter 13 shown in FIG. exactly equal. Further, since the period of the signal a is exactly equal, all _the periods l ₂ of 1/2V _DD of the signal g are also equal. Therefore, since the symmetry of the waveform is maintained, the signal g does not include even harmonics. In order to obtain four types of pilot signals, the counter 13 shown in FIG. 4 may be configured as shown in FIG. 6. In FIG. 6, the same symbols as in FIG. 4 indicate the same things. In Figure 6, the 378 _H signal supplied from terminal 12 is
input to the counter. The output of the counter 13 is supplied to each terminal of a switch 22 indicated by a ₁ to d ₁ and a switch 23 indicated by a ₂ to d ₂ for each output of the frequency division values shown in the figure. Switches 22 and 23 operate in conjunction,
When the switch 22 is connected to the _a1 terminal, the switch 23 is connected to the _a2 terminal, and when it is _b1 , it becomes _b2 , . . . The switches 22 and 23 are driven by the relationship between the head switching signal (H.SW signal) and a signal obtained by dividing the H.SW signal into 1/2. This relationship is shown in Table 3.

[Table] In Table 3, H indicates High potential and L indicates Low potential. It is clear from Table 3 that the pilot signals f ₁ to _{f 4} are sequentially switched and output for each field. Next, problems when using an MS type integrated circuit will be explained. The circuit section 21 shown in FIG.
It can be constructed with type integrated circuits. However, if the circuit configuration shown in FIG. 4 is applied as is to an MS type integrated circuit, problems will arise due to the capacitance of the MS element. This point will be explained. FIG. 7 shows an MS element, 24 is a gate, 2
5 is a drain, and 26 is a source. In the MS element, since there is overlap between the gate electrode and the drain diffusion layer, there is a capacitance C _f between the gate and the drain. Similarly, there is capacitance between the gate and source.
Has C _G. These capacitances C _f and C _G cause the switching speed to decrease. FIG. 8 is a partial drawing of FIG. 4, and the same symbols as in FIG. 4 indicate the same circuits and elements. Figure 8 shows each capacitance shown in Figure 7.
C _f and C _G are added equivalently. In Fig. 8, when the switch 18 is turned from ON to OFF, the electric charges stored in the capacitors C _f and _CG are transferred to the resistors R _{1 and CG} .
It is discharged via R ₂ and R ₃ . Also, switch 1
When switch 9 changes from ON to OFF, capacitors C _f and _CG connected to switch 19 are charged via resistors R ₃ , R ₂ and R ₁ . Therefore, switches 18 and 19
When changes from ON state to OFF state, resistances R ₁ , R ₂ ,
Charging and discharging are performed by the time constants of R ₃ and capacitors C _f and _CG , and the three-level staircase wave is 1/2 as shown in Figure 9.
The waveform becomes dull in the process of reaching V _DD . Since the ternary staircase wave shown in FIG. 9 is not a symmetrical waveform, even-order harmonics are generated. In order to solve the above problem, the circuit configuration shown in FIG. 10 may be adopted. Note that Figure 11 is the 10th
These are the waveforms of each part in the figure. In FIG. 10, switches 27 and 28 are electronic switches constructed of MS type integrated circuits. Switches 27 and 28 are signals
When e′ and f′ are High, they are connected to the power supply voltage V _DD side,
When it is Low, it is connected to the ground side. Signal e' is the same signal as signal e shown in FIG. 5, and signal f' is an inversion of signal f shown in FIG. Signal when switches 27 and 28 are connected to the power supply voltage side
The level V _H ′ of g′ is V _H ′=R _1/2 +R ₂ +R ₃ /R ₁ +2R ₂ +R ₃ ·V _DD (7). The level V _L ' of the signal g' when the switches 27 and 28 are connected to the ground side is V _L '=R ₁ /2+R ₂ /R ₁ +2R ₂ +R ₃ ·V _DD (8). When one of the switches 27, 28 is connected to the power supply voltage side and the other to the ground side, the level of the signal g' is 1/2V _DD . Further, the relationship V _H ′−1/2V _DD =1/2V _DD −V _L ′ (9) also holds true as described above. If the circuit configuration shown in FIG. 10 is adopted, switch 2
7 and 28 are always connected to the power supply voltage or ground side. Therefore, charging and discharging of the capacitors C _f and _CG that occurs when the switches are switched is performed not through the resistors R ₁ , R ₂ and R ₃ but through the switches 27 and 28, resulting in a steep rise characteristic. For this reason, MS
Even with a circuit configuration using an integrated circuit of . In addition, in the explanation so far, the resistor R ₁ has been explained as a fixed resistor, but it is also possible to use a configuration in which one of the two resistors R ₁ is a variable resistor to adjust the High or Low level of the three-level staircase wave. good. As is clear from the above explanation, according to the present invention, the reference signal is divided into a predetermined value by the same counter,
By creating a ternary staircase wave, the third harmonic can be attenuated to a practically sufficient value. Furthermore, by configuring a switch that is always connected to the power supply voltage or ground side, it is possible to create a ternary staircase wave with an MS type integrated circuit. In addition, in this example, as a low-pass filter,
The explanation was given using a fifth-order filter with a corner frequency of 200KHz as an example, but the level of the harmonic component of the pilot signal only needs to be set to -26 (dB) or less of the fundamental component, and the following steps are required to satisfy this condition. It is clear that the order of the low-pass filter is not limited to the fifth order.

[Brief explanation of drawings]

Figure 1 is a diagram schematically showing a part of the magnetization locus of a VTR in which a tracking pilot signal is recorded.
FIG. 2 is a block diagram showing a reproduction circuit of a four-frequency tracking control system, FIG. 3 is a block diagram showing a ternary staircase wave, and FIG. 4 is a block diagram showing an embodiment of a ternary staircase wave generating circuit according to the present invention. Figure 5 is a waveform diagram of each part in Figure 4, Figure 6 is a specific configuration diagram of the counter section, Figure 7 is a circuit diagram showing the MS element and feedback capacitance, and Figure 8 is the waveform diagram of each part of Figure 4.
A circuit diagram for explaining the influence of the capacitance of the OS element, Figure 9 is a waveform diagram of a ternary staircase wave with the circuit configuration of Figure 8, and Figure 10 is a diagram showing the waveform of a ternary staircase wave that reduces the influence of the capacitance of the MS element. FIG. 11 is a block diagram showing one embodiment of a ternary staircase wave generating circuit, and FIG. 11 is a waveform diagram of each part of FIG. f ₁ to f ₄ ... Pilot signal, 4 ... Balanced modulation circuit, 6, 7 ... Tuning amplifier, 8, 9 ... Detection rectifier circuit, 13 ... Counter, 14 ... RS-FF, 1
5...FF, C _f , C _G ... Capacitance of MS element.

Claims (1)

[Claims] 1. Outputting a first output signal that is output when counting N1 cycles of the reference signal and a second output signal that is output when counting N2 cycles, which is a smaller number than N1. The counter circuit is a counter circuit that can switch each value of N1 and N2 into multiple types, and the output state changes depending on the first output signal and the second output signal. a first flip-flop circuit whose output state is inverted each time the first output signal is input; and a combination of states of both output signals of the first and second flip-flop circuits. 1. A pilot signal generation circuit comprising means for selectively driving a plurality of electronic switches connected to a group of resistors in response to the signal, and a low-pass filter connected to the group of resistors. 2 When creating four types of pilot signals f ₁ , f ₂ , f ₃ , and f ₄ , the number of cycles of N1 is set to 29, 25, and 25, respectively.
20, 18, and the number of N2 cycles to 19, 17, 13,
12. The pilot signal generating circuit according to claim 1, wherein the pilot signal is set to 12. 3. The pilot signal generating circuit according to claim 1, wherein the output of the electronic switch is either a power supply voltage or a ground voltage.