JPH0770709B2 - Input protection device for semiconductor devices - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to an improvement of an input protection device for a semiconductor element, especially for a MIS type transistor.

(Prior Art) Conventionally, for example, in an MIS transistor, an input protection device is usually provided in order to protect the gate insulating film of the input circuit from an excessive voltage applied from the outside, especially from electrostatic discharge of the human body. By the way, there are several protection devices, but the general method is to use the reverse breakdown of the PN junction and pass the input voltage exceeding the reverse breakdown voltage through the PN junction.

By the way, with the recent miniaturization of MIS type transistors, the gate insulating film tends to be further thinned, and the importance of the protective device is becoming higher and higher. At the same time, the area ratio of the input / output circuits to the entire integrated circuit also increases, and it is necessary to reduce the size of the protection device in order to reduce the size of the integrated circuit.

However, the protection performance of the conventional input protection device using the reverse breakdown of the PN junction depends on the PN junction.
Therefore, if the junction does not have a sufficient area, the applied overvoltage cannot be effectively bypassed, and the gate insulating film may not be protected. In addition, the reverse current may cause thermal breakdown of the PN junction itself. Sometimes. In addition, since the reverse current does not flow through the entire PN junction but is locally concentrated in a place where the breakdown voltage is low, even if the area of the PN junction is increased, the protection performance is not improved in proportion thereto.

(Problems to be Solved by the Invention) The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an input protection device for a semiconductor element that is smaller in size and higher in protection performance than conventional ones.

[Structure of the Invention] (Means for Solving Problems) The present invention relates to a first conductivity type semiconductor substrate, a second conductivity type first semiconductor layer provided on the surface of the substrate, and the first semiconductor. A second semiconductor layer of the first conductivity type whose end is provided on the surface of the layer in the vicinity of the end of the first semiconductor layer, and a third semiconductor of the first conductivity type provided on the surface of the first semiconductor layer. Semiconductor layer and second
A fourth semiconductor layer of conductivity type, a fifth semiconductor layer of first conductivity type provided on the surface of the substrate except the first semiconductor layer, a semiconductor element connected to the second semiconductor layer and the third semiconductor layer A first metal wire connected to the input terminal of the second semiconductor wire and a second metal wire connected to the fourth semiconductor layer and the fifth semiconductor layer and connected to a ground terminal of the semiconductor element, Therefore, it is possible to provide a protection device for a semiconductor element which is small and has excellent protection performance.

(Operation) In the present invention, when the voltage applied to the input terminal has a negative polarity with respect to the ground potential, the diode composed of the first and third semiconductor layers is forward-biased, so that the current flows between the diode and the first diode. A current flows through the spreading resistance of one semiconductor layer, and an excessive voltage is not applied to the input circuit. Further, when a positive voltage is applied to the input terminal and the reverse breakdown voltage of the diode is exceeded, the diode breaks down. At this time, since the substrate, the base of the NPN transistor composed of the first and second semiconductor layers, and the emitter are forward-biased, part of the reverse current of the diode passes through another spreading resistance of the first semiconductor layer. Then, it becomes a base current of the transistor, and the transistor is turned on. as a result,
When a positive overvoltage is applied to the input terminal, the collector current of the transistor mainly flows, and the overvoltage is not applied to the input circuit. Therefore, according to the present invention,
It is possible to provide a small-sized and high-performance input protection device as compared with the conventional one.

(Embodiment) An NPN transistor protection device according to an embodiment of the present invention will be described below in the order of manufacturing steps with reference to FIGS. 1 (a) to 1 (d), FIG. 2 and FIG.

(1) First, for example, boron is ion-implanted into an N-type silicon substrate 1 having an impurity concentration of 1 × 10 ¹⁵ cm ⁻³ to obtain a surface concentration of 8
A P-type first semiconductor layer (P well) 2 having a depth of 4 × 10 ¹⁶ cm ⁻³ was formed (shown in FIG. 1A). Next, a thick field oxide film 3 for element isolation was formed on the surface of the substrate 1 by, for example, a selective oxidation method (shown in FIG. 1 (b)). Next, the field oxide film 3 of the P well 2
Forming an N-type second semiconductor layer 4, an N-type third semiconductor layer 5 and a P-type fourth semiconductor layer 6 whose ends are close to the ends of the P well 2 in a region surrounded by In addition, an N-type fifth semiconductor layer 7 was formed in a region surrounded by the field oxide film 3 on the surface of the substrate 1 other than the P well 2 (shown in FIG. 1C). Here, each of the second and fifth semiconductor layers 4 and 7 is formed by diffusing arsenic to a depth of 0.4 μm and having a surface concentration of 1 × 10 ²⁰ cm ⁻³ . Third semiconductor layer 5
Is formed by diffusing boron to a depth of 0.2 μm and a surface concentration of 2 × 10 ²⁰ cm ⁻³ . The fourth semiconductor layer 6
Has a depth of 0.4 μm and a surface impurity concentration of 1 × 10 ²⁰ cm ^-3
Is formed by diffusing boron so that The fourth semiconductor layer 6 is provided for fixing the potential of the P well 2 and for resistive contact with a first metal wiring, which will be described later. On the other hand, the fifth semiconductor layer 7 is provided for fixing the potential of the substrate 1 and for resistive contact with a second metal wiring described later.

(2) Next, after forming the insulating film 8 on the entire surface,
The insulating film 8 on the fifth semiconductor layers 4 to 7 was selectively etched to open contact holes 9 _{1 to} 9 ₄ . Then, a first metal wiring 10 for connecting the second and third semiconductor layers 4, 5 to the contact holes 9 ₁ , 9 ₂ and a fourth, fifth semiconductor layer for the contact holes 9 ₃ , 9 ₄ . A second metal wiring 11 for connecting 6 and 7 was formed. Where the first
The metal wiring 10 is connected to the input terminal of the transistor described later, and the second metal wiring 11 is connected to the ground terminal (Fig. 1 (d)) and Fig. 2). Here, FIG. 2 is a plan view of FIG. 1 (d), and FIG. 2 is cut along the line XX to obtain FIG. 1 (d). In the figure, the N
Type first semiconductor layer 4, P well 2, and N type silicon substrate 1 are NPNs each having a collector, a base, and an emitter.
A bipolar transistor is formed, and the P-type fourth semiconductor layer 6 and the P well 2 form a PN junction. Also,
The distance between the end of the P well 2 and the end of the second semiconductor layer 4, that is, the distance corresponding to the base width of the transistor of FIG. 2 is 1.2 μm, and the distance L of FIG. 2 proportional to the base area is 140 μm. And At this time, the operation threshold voltage of the input protection device was 9V and the current amplification factor was 140. Furthermore,
The input protection device having such a structure shown in FIG. 2 can be represented by an equivalent circuit diagram shown in FIG. However, in the figure, 12 is an NPN bipolar transistor, 13 is a diode, 14 is an input terminal, and 15 and 16 are the spreading resistances of the P-well 2.

Next, the operation of the protective device having such a structure will be described.

When the voltage applied to the input terminal 14 is negative with respect to the ground potential, the diode 13 is forward-biased, so that the current flows through the diode 13 and the resistor 15 and the overvoltage is not applied to the input circuit. When a positive current is applied to the input terminal 14 and the reverse breakdown voltage of the diode 13 is exceeded, the diode 13 breaks down. At this time, since the base and emitter of the transistor 12 are forward-biased, a part of the reverse current of the diode 13 becomes a base current of the transistor 12 via the resistor 16, and the transistor 12 is turned on. As a result, when a positive overvoltage is applied to the input terminal 14, the collector current of the transistor mainly flows, and the overvoltage is not applied to the input circuit.

According to the above-described embodiment, the N-type second semiconductor layer 4, the P-well 2 and the N-type silicon substrate 1 are respectively used as the collector, the base,
Form an NPN bipolar transistor as an emitter,
In addition, a diode 13 having the P-type fourth semiconductor layer 6 and the P well 2 as a PN junction is formed. Therefore,
Unlike the PN junction in the conventional protection device, the diode 13 does not carry all the current flowing into the input terminal, and can be miniaturized and have high performance. In fact, the input protection device according to the present invention can be constructed with an area of about 50% compared to the conventional protection device which provides the same protection performance.

In addition, in the above-described embodiment, the case where the N-type silicon substrate is used as the semiconductor substrate has been described, but the present invention is not limited to this. For example, a P-type silicon substrate may be used, and in this case, a protection device against an applied voltage of opposite polarity can be formed by reversing the conductivity type of each semiconductor layer. Further, it is needless to say that the same can be applied to semiconductor substrates other than silicon.

[Effects of the Invention] As described in detail above, according to the present invention, it is possible to provide an input protection device for a semiconductor element that is smaller and has higher performance than conventional ones.

[Brief description of drawings]

1 (a) to 1 (d) are sectional views showing an NPN bipolar transistor according to an embodiment of the present invention in the order of manufacturing steps, FIG.
The figure is a plan view of FIG. 1 (d), and FIG. 3 is an equivalent circuit diagram of FIG. 1 (d). 1 ... N-type silicon substrate, 2 ... P-type first semiconductor layer (P well), 3 ... field oxide film, 4 ... N-type second semiconductor layer, 5 ... N-type third Semiconductor layer, 6 ... P-type fourth semiconductor layer, 7 ... N-type fifth semiconductor layer, 8 ... Insulating film, 9 _{1 to} 9 ₄ ... Contact hole, 10, 1 ... Metal wiring, 12 …… NPN bipolar transistor, 13 …… Diode.

Claims (2)

[Claims] 1. A semiconductor substrate of a first conductivity type, a first semiconductor layer of a second conductivity type provided on the surface of the substrate, and an end portion on the surface of the first semiconductor layer. A second semiconductor layer of a first conductivity type provided adjacent to the second semiconductor layer, a third semiconductor layer of a first conductivity type and a second semiconductor layer provided on the surface of the first semiconductor layer.
A fourth semiconductor layer of conductivity type, a fifth semiconductor layer of first conductivity type provided on the surface of the substrate except the first semiconductor layer, a semiconductor element connected to the second semiconductor layer and the third semiconductor layer A first metal wiring connected to the input terminal of the semiconductor device and a second metal wiring connected to the fourth semiconductor layer and the fifth semiconductor layer and connected to the ground terminal of the semiconductor element. Input protection device for semiconductor devices. 2. A PN formed between the second semiconductor layer and the third semiconductor layer, which has different impurity concentrations and depths, and is formed between the PN and the first semiconductor layer.
The input protection device for a semiconductor element according to claim 1, wherein the reverse breakdown voltage of the junction is also different.