JPH0770740B2 - Surge protection device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to lightning, switching,
The present invention relates to an improvement in a two-terminal type surge protection device for protecting an electric circuit system from an abnormally high voltage or an abnormally large current caused by various surge factors such as surge.

[0002]

2. Description of the Related Art What can be called a surge protection device is
Even if limited to a two-terminal type, various ideas have been devised so far,
Above all, when it is broken down by applying a surge, it is preferable not only to clamp the voltage across the device to a constant breakdown voltage value (that is, not just a constant voltage diode) but also to break down the device and start the element current. After that, when it increases to more than the breakover current value, it shows a negative characteristic and breaks over, making it possible to absorb a large current by transitioning the voltage across the device to a clamp voltage lower than the breakdown voltage. It is a type. These types of surge protection devices include those using avalanche breakdown or zener breakdown as the first breakdown mechanism and those utilizing the punch-through phenomenon. Have already been disclosed in JP-A-62-65383; JP-A-62-15.
Japanese Patent Publication No. 4776; Japanese Examined Patent Publication No. 1-33951 (Japanese Patent Laid-Open No. 62-65382) disclose various improvement plans in detail. As will be described later, the present invention itself can be applied regardless of the first breakdown mechanism as long as it exhibits a breakover characteristic through a positive feedback phenomenon based on minority carrier injection. In this section, first, as a description of a conventional example, a two-terminal surge protection device having a relatively basic configuration that can be manufactured based on the invention disclosed in the publications listed above is taken as an example, and its operation is Description will be given with reference to FIG. The illustrated surge protection device 10 has a first semiconductor region 1, which may generally be a semiconductor substrate, the conductivity type of which is set to either p or n, and the conductivity type of the other regions accordingly. Also decided. Here, for convenience of description, the conductivity type of the first semiconductor region 1 is n-type. Of the front and back main surfaces of the first semiconductor region 1, one main surface has a second semiconductor region 2 and a third region 3 sequentially formed by a double diffusion technique, and
On the same main surface, a fourth semiconductor region 4 is also formed at a position appropriately laterally separated from the second semiconductor region 2 and the third region 3. The surge protection device 10 having such a structure is structurally provided with respect to the second and third regions 2 and 3.
The fourth regions 4 are located on one surface of the first semiconductor region 1 and are laterally spaced apart from each other, and as will be described later, the device current mainly flows along this direction during operation,
It is called lateral type or horizontal type (hereinafter referred to as horizontal type). On the other hand, there is also a type in which the second semiconductor region and the third region are formed on one main surface of the first semiconductor region 1 and the fourth semiconductor region is formed on the other main surface facing each other. Is referred to as a vertical type or a vertical type because each region has a vertical stacking relationship along the thickness direction of the first semiconductor region 1. However, the present invention relates to a limited improvement that can be considered particularly with respect to a horizontal structure. Therefore, even in the same conventional example, such a vertical structure will not be touched.

However, the conductivity type of the second semiconductor region 2 must be opposite to that of the first semiconductor region 1, and therefore, as shown in the figure, when the first semiconductor region 1 is n-type, The conductivity type of the semiconductor region 2 is p-type. However, when the punch-through is particularly used for the initial yielding phenomenon described later, the second semiconductor region 2 has a slightly low concentration of p-type,
That is, it may be better to set the p ^- type. Also,
The third region 3 is a semiconductor region in the illustrated case,
In principle, the invention is not limited to this, and since one end of the main current line is formed when punch-through occurs as described later, it is desirable that it has high conductivity, but it is also formed of silicide or metal. can do. That being said, it is common to use a semiconductor region as well, in which case the conductivity type of the third region 3 is opposite to that of the second semiconductor region 2. Therefore, in the case of the figure, it is n-type, and including the meaning of high conductivity,
The high concentration of n ⁺ is given. The same thing can be said for the fourth region 4, but as shown here, if it is sufficient to absorb the surge of one polarity, this is not necessarily the semiconductor region, and it will be understood from the operation described later. As described above, it is sufficient that minority carriers for the first semiconductor region 1 can be injected into the first semiconductor region 1. Therefore, for example, silicide or the like can be used,
When the first semiconductor region 1 is p-type, a metal material can be selected. When it is used as a semiconductor region, its conductivity type is, of course, the p type opposite to that of the first semiconductor region 1.

From the surge protection device 10 having such a cross-sectional structure, as device terminals, a first device terminal T ₁ (a terminal on the left side in the drawing) which makes ohmic contact only with the fourth semiconductor region 4 and a second semiconductor region 2 are provided. The second device terminal T _{2 that} is in ohmic contact with the third semiconductor region 3 is taken out.
_A surge voltage is applied between ₁ and T ₂ , and it is a phase at which a reverse bias is applied to the pn junction between the first semiconductor region 1 and the second semiconductor region 2 and is considerably large. , The depletion layer in the pn junction between the first and second regions generated by the application of the reverse bias extends not only toward the first semiconductor region 1 side but also toward the third semiconductor region 3 side, Eventually, the upper end portion of the depletion layer reaches the third semiconductor region 3, so that the first semiconductor region 1 and the third semiconductor region 3 punch through. In this case, minority carriers for the first semiconductor region 1 are injected from the fourth semiconductor region 4 into the first semiconductor region 1, and the minority carriers are collected in the second semiconductor region 2 to start the device current flow. The start voltage of such punch-through operation is shown as the breakdown voltage V _BR in FIG. 11 showing the operating characteristics of these surge protection devices. On the other hand, for example, the second semiconductor region 2 and the third semiconductor region 3 are the second device terminals T.
_Even if they are electrically short-circuited by being commonly connected to ₂ , the current value of the element current that increases after starting to flow through the second semiconductor region 2 and the second semiconductor region of the element current. The voltage value (voltage drop) obtained by the product of the resistance value along the current path in 2 is a rectifying junction formed by the second semiconductor region 2 and the third semiconductor region 3 (in the case of FIG. (3) Since the semiconductor region 3 is also a semiconductor region, if the forward voltage of the pn junction) becomes equal,
The junction is turned on, and the minority carriers are injected into the second semiconductor region 2 from the third semiconductor region 3 to the second semiconductor region 2. Then, the injection of the minority carriers into the second semiconductor region 2 results in the first and second device terminals T ₁ and T ₁ as shown in the characteristic curve portion that rises sharply in the current axis direction in FIG. This leads to a further increase in the device current flowing during T ₂ , which also causes a positive feedback phenomenon that promotes the injection of minority carriers from the fourth semiconductor region 4 into the first semiconductor region 1. for that reason,
Looking at the voltage-current (VI) characteristic diagram of FIG. 11, the first,
When a current having a magnitude larger than the value shown as the breakover current I _BO flows between the second device terminals T ₁ and T ₂ , the positive feedback phenomenon occurs as an indication that the phenomenon occurs inside the device. As shown in the characteristic diagram of No. 11, a negative characteristic is generated, and the first and second device terminals T
_The voltage across the device appearing between ₁ and T ₂ is the breakover voltage V that is the voltage value when the breakover starts.
It is possible to shift to a clamp voltage (or ON voltage) V _P that is lower than _BO and lower than the breakdown voltage V _BR at the time when punch-through is first started. Surge current can be absorbed. The maximum current value that can be absorbed by the surge protection device 10 via the first and second device terminals T ₁ and T ₂ is generally called "surge withstand", and once the
The minimum element current value at which the turned-on device can maintain its on-state is called the holding current I _H. In contrast to such a break-over type surge protection device, as described above, for example, in the case of a simple constant voltage diode type surge protection device, the voltage across the element does not decrease even if it breaks down, rather Since there is a gradual increase tendency as the absorption current increases, the device power consumption determined by the product of the voltage across the element and the element current, and thus the amount of heat generated by the device, becomes considerably large. The advantage of the breakover type is proved even from this one thing.

[0005]

However, the break-over type surge protection device 10 manufactured in principle according to the structure shown in FIG. 10 is also described in the above publications. As you can see, it was originally a break
The controllability of overcurrent and holding current should be good, and it should be relatively easy to secure the surge resistance. In fact, the applicant succeeded in producing such an element, but on the contrary, there were cases where the desired controllability was not obtained. After pursuing the cause, I found the following structural cause as one of the major factors. In the usual field of manufacturing this kind of semiconductor element, particularly when the terminal electrodes T ₁ and T ₂ are taken out, it is easy to form an ohmic contact region while maintaining geometric symmetry with respect to the corresponding region. When illustrated in this regard, the principle structure of FIG. 10 is specifically shown in FIG.
Corresponding reference numerals indicate corresponding constituent elements, but the problem is how to attach the ohmic electrode 32 for making ohmic contact commonly to the second semiconductor region 2 and the third semiconductor region 3. As is apparent, the ohmic electrode 32 for taking out the second device terminal T ₂ is in contact with the surface of the third semiconductor region 3 and the second ohmic electrode 32 in the portions P _O and P _{O on} both sides of the third semiconductor region 3. It also contacts the surface of the semiconductor region 2. Therefore, the first and second device terminals T ₁ , T ₂
A surge of the polarity (+, −) shown in the drawing is applied between them, and the surge is equal to or more than a predetermined magnitude, and the breakdown occurs directly at the junction between the first semiconductor region 1 and the second semiconductor region 2. Punch-through occurs between the semiconductor region 1 and the third semiconductor region 3, and as a result, the fourth semiconductor region 4 immediately causes a minority carrier (conductivity shown in the figure) for the first semiconductor region 1 to the first semiconductor region 1. When holes are injected in the case of the type), as shown in the group of arrows f _H in FIG. There may be a situation in which a portion that is in ohmic contact with the second semiconductor region 2 on the side closer to is concentratedly flows into the second semiconductor region 2 and hardly flows into the ohmic contact portion P _O on the opposite side. Because of this, the breakover current I _BO
Therefore, the controllability of the holding current I _H is deteriorated, and the surge withstand capability may be reduced.

Therefore, the present invention first removes and eliminates defects due to structural factors in such a conventional lateral surge protection device, and improves the controllability or stability of breakover current and holding current. We will not provide a structure that can ensure the surge withstand capacity as scheduled.

Further, the present invention has been made in view of the following problems in this type of lateral surge protection device from another viewpoint as follows. Conventionally, in the surge protection device 10 having the structure shown in FIGS. 10 and 12,
Although the voltage of the surge applied between the device terminals T ₁ and T ₂ is within the range smaller in absolute value than the breakover voltage V _BO , it sometimes turns on (breaks over). It may cause a malfunction. This malfunction especially occurred when a "small surge" was applied that does not need to be absorbed in particular because the duration is extremely short and the peak value of the voltage is not so large. Therefore, the applicant of the present invention, before proposing the inventions disclosed in the above publications, tried to find out the cause in this respect as well, and the surge that caused the malfunction as described above is certainly an absolute value. Although it was a "small surge", it was found that the rising was extremely steep and the voltage differential value dV / dt (called slew rate) was quite high. As a result, the reason why such a steep surge caused a malfunction could be explained as follows. As described above, in principle, the surge protection device having the structure shown in FIGS.
Since the second semiconductor region 2 and the second semiconductor region 2 form a pn junction that is reverse-biased when a surge is applied, a junction capacitance C _j is expected in such a junction. Therefore, there is a through rate between the first and second device terminals T ₁ and T _2.
When a surge of dV / dt is applied, a displacement current i _t expressed by the following equation (1) flows as a transient current that charges the junction capacitance C _j .

[Equation 11] However, the junction capacitance C _j often becomes considerably large when the area of each region is enlarged in order to obtain a sufficiently large surge withstand capability, and a value of, for example, about 100 pF or more is usually considered. On the other hand, the nature and behavior of various surges have been extensively studied and studied in the past, and the results show that, for example, when a lightning surge is applied to a telephone communication line, etc. In this case, even if the peak value of the voltage value of the induced noise voltage to the circuit system is low, the slew rate (dV / dt) value of about 100 V / μs can be sufficiently considered. Therefore, as is apparent by substituting these values into the above equation (1), the value of the transient current i _t that charges the junction capacitance is
Can be as high as 10 mA. The higher the slew rate becomes, the larger the slew rate becomes, and in any case, a relatively large value of the displacement current i _t can flow although it is instantaneous.

However, the surge protection device actually manufactured according to FIG. 10 or FIG. 12 requires high-speed operation, and in some cases, the surge protection device may be placed between the fourth semiconductor region 4 and the second semiconductor region 2. The distance may be designed to be fairly short, causing breaks in such devices.
The value of the overcurrent I _BO tends to be too large, and although the device structure or the manufacturing method so far may be better than that of the surge protection device having another configuration, it is manufactured in an absolute sense. parameters from such possible variation was no means small by a value of some cases break-over current I _BO is unchanged for a given time of the displacement current i _t when a surge is applied, which is obtained as above It could be to a degree or even less. The main cause of this is that the device may break over even though the peak voltage value of the surge does not reach the designed break-over voltage V _BO . In terms of the characteristic diagram of FIG. 11, the effective break-over voltage V _BO when such a malfunction occurs is considerably smaller (on the left side) than the value shown on the characteristic diagram. It becomes equivalent to the one that was transferred.

Therefore, the present applicant has already proposed one of the measures in the above-mentioned publications, and one of the structures based on this is as shown in FIG. 13 attached to this document. is there. That is, it is characteristic that the first device terminal T ₁ electrically connected to the fourth semiconductor region 4 simultaneously makes ohmic contact with the main surface of the first semiconductor region 1 in the vicinity of the fourth semiconductor region 4. Therefore, in this case, a surge having a polarity that reversely biases the first semiconductor region 1 and the second semiconductor region 2 is applied, and therefore the junction between the first semiconductor region 1 and the fourth semiconductor region 4 is made. Even in the forward biased relationship, the first device terminal T ₁ is contacted with the main surface of the first semiconductor region 1 via the ohmic contact portion before the junction is turned on. A majority carrier for the first semiconductor region 1 can be poured into the first semiconductor region 1, so that a pn composed of the first semiconductor region 1 and the second semiconductor region 2 is formed.
The junction capacitance C _j of the junction can be quickly charged.
In fact, this approach has succeeded in obtaining surge protection devices that do not respond to "small surges", while at the same time introducing majority carriers into the first semiconductor region 1 for such junction capacitance charging. The phenomenon did not have a bad influence on the basic operation itself after the punch-through described above. This is because, after the first semiconductor region 1 and the third semiconductor region 3 are punched through, the current due to the majority carriers increases, and the voltage of the fourth semiconductor region 4 mainly in the thickness direction (depth direction). When the drop becomes equal to the forward voltage of the junction between the fourth semiconductor region 4 and the first semiconductor region 1, minority carriers for the first semiconductor region 1 begin to be injected from the fourth semiconductor region 4 from then on. After that, the device breakdown and the breakover can be performed by the mechanism already described. After the breakover, the main current path of the device current between the pair of device terminals T ₁ and T ₂ is not the ohmic contact part between the terminal T ₁ and the first semiconductor region 1 but the third semiconductor region 3 And the fourth semiconductor region 4, which does not have an ohmic contact portion of the terminal T ₁ with the first semiconductor region 1.
Alternatively, it is almost equivalent to the state in the device shown in FIG.

Further, although the conventional punch-through type device has been described so far, the cross-sectional structure shown in FIG.
According to the knowledge of the applicant, even if the structure is almost the same as that shown in FIG.
In addition to increasing the thickness of the third semiconductor region 3 and the like, if the geometrical parameters and impurity concentration parameters of each region are appropriately selected, avalanche breakdown and Zener breakdown are used as the initial mechanism of breakdown initiation. It has been found that a surge protection device having the same mechanism as the punch-through type described above can be produced in terms of breakover, but in such a surge protection device or other known surge protection devices, If it is of the type that breaks through via the positive feedback phenomenon associated with minority carrier injection, then the problem of response to "small surges" described above may occur as well, and thus We also found that the measures can be applied to them as well. However, avalanche surrender and Zena surrender
As it is generally called "Point Phenomenon (local phenomenon)", the point where breakdown begins or the point where the electric field concentrates after breakdown tends to be localized.
It is difficult to obtain a large surge resistance, and the punch
In addition to being disadvantageous compared to the through type device, the degree of freedom in design is small and the tolerance for manufacturing parameters is poor.
Show a slightly inferior side. However, if we do not compare such advantages and disadvantages but only consider the response to the “small surge” that is the problem here and its countermeasures, the above is also applied to such avalanche breakdown type and zener breakdown type surge protection devices. The discussion can be applied almost as is.

However, by measuring the ohmic contact with the first semiconductor region as described above, an erroneous response to the "small surge" that is sometimes observed in the two-terminal break-over type surge protection device. However, this time, another problem was pointed out. That is, the surge protection device thus manufactured does not have "reverse withstand voltage". This is natural. First semiconductor region 1 and second semiconductor region 2
In the relationship where and are biased in the forward direction, since the first semiconductor region 1 is in direct contact with the device terminal T ₁ via the ohmic contact portion, the pair of device terminals T 1
_This is because the diode is substantially connected in the forward direction between ₁ and T ₂ . Of course, considering that a surge protection device of this kind is actually incorporated in the protected circuit system, it is actually better to have a reverse breakdown voltage, and more preferably, a breakdown voltage V related to surge absorption. It is better that the reverse breakdown voltage is higher than _BR .

Therefore, as a second object, the present invention aims to solve this problem, and a method of making the first device terminal T ₁ ohmic-contact not only with the fourth region but also with the first semiconductor region. It is intended to provide another means of preventing a false response to a small surge even if the above is not taken. In other words, the second object of the present invention is to provide a two-terminal break-over type surge protection device that can have reverse breakdown voltage as required.
It can be said that, however, the main object of the present invention for this purpose is not limited to the means of ohmic contact with both the first and fourth regions as described above,
Even if other methods are used, it is necessary to take measures against steep surges even if they are small, that is, to increase the degree of freedom in design and to enrich technology, so that required products If the problem of reverse withstand voltage does not occur due to the above, such an ohmic contact structure and coexistence with other methods are acceptable, and conversely, the present invention positively rejects those other methods. It wasn't intended to be done.

Further, in a sense, this is a finding obtained as a result of achieving the second object, but in addition to the structural device for the first object, the breakover current I _BO and the holding current I _H The third purpose is to provide a configuration that can improve the controllability of the. In particular, this third purpose is also related to the features of the conventional surge protection device shown in FIGS. 10 and 12 which have already been provided. For example, as described above, in order to prevent the response to a surge having a large time differential value (dV / dt) of the voltage even though the energy is small, the breakover current I _BO itself should be large.
However, it also had the following basic challenges:
It is necessary to guarantee that the breakover current I _BO and the holding current I _{H that} are as close as possible to the design values can be obtained. However, as described in detail in the publications listed above, the surge protection device which the applicant of the present invention has already described has far greater design freedom and higher design accuracy than other known structural devices. However, the values of these breakover current I _BO and holding current I _H often depended on the manufacturing parameters. Nevertheless, design guidelines for the various parameters concerned have not been established, and the
I could not deny the tendency to rely on And Try. If this is improved and a design criterion relating to such manufacturing parameters can be given, it is possible to obtain the necessary values of break-over current I _BO and holding current I _H as necessary, and also to suppress variations among devices, It is also extremely advantageous in obtaining stable device characteristics. Of course, it is desirable to obtain a sufficient surge withstand value, in other words, it is desirable to make the element current flowing through the device uniform. Therefore, it is also another object of the present invention that the new countermeasures against the small surge provided according to the first object and the second object of the present invention described above also satisfy this requirement.

[0014]

In order to solve the above-mentioned problems, the present invention is most improved as the improvement in the surge protection device having the two-terminal break-over type and the horizontal structure, which has already been described in detail in connection with the conventional example. Basically, the following constitutional requirements (a) to (e), that is, (a) is provided on one main surface side of the first semiconductor region and has a conductivity type opposite to the conductivity type of the first semiconductor region. The second semiconductor region forming a pn junction with the semiconductor region and (b) the first semiconductor region are in contact with the second semiconductor region from opposite sides, and the second semiconductor region is connected to the second semiconductor region with respect to the second semiconductor region. Of the minority carriers can be injected along at least one of its in-plane directions (which can be independent of the x-direction and the y-direction, which will be mentioned later in the other features of the present invention). Third area consisting of one or more N in cross section (C) Provided at a position apart from the second semiconductor region along the x direction in both x and y directions in the main surface plane on the same one main surface side of the first semiconductor region as described above and orthogonal to each other. And a fourth region capable of injecting minority carriers for the first semiconductor region with respect to the first semiconductor region, and (d) a first region connected to the first device terminal while making ohmic contact with the fourth region. Between the ohmic electrode and the second ohmic electrode commonly in ohmic contact with the second semiconductor region and the third region and connected to the second device terminal, with a polarity reverse biasing the pn junction and having a breakdown voltage or more. When a surge of voltage is applied, it breaks down and begins to absorb surge current between these first and second device terminals.
After the breakdown, due to the synergistic effect of the injection of minority carriers from the fourth region to the first semiconductor region and the injection of minority carriers from the third region to the second semiconductor region, the magnitude of the surge current that began to be absorbed breaks down. When the current exceeds the overcurrent, it breaks over through the positive feedback phenomenon, and the two-terminal break that continues absorbing the surge current while shifting between the first and second device terminals to a clamp voltage of a relatively low voltage in absolute value. An over-type surge protection device; (e) a second ohmic electrode that makes ohmic contact with the second semiconductor region and the third region in common has the first ohmic electrode as seen in the x direction at the peripheral portion of the third region. In the edge facing the four areas,
A surge protection device having no portion beyond at least the edge closest to the fourth region and in contact with the surface of the second semiconductor region.

Furthermore, in addition to these constituent groups (a) to (e), (f) ρ _B is the first sheet resistance of the second semiconductor region in the portion between the third regions, and V _f is the third. The voltage for forward biasing the region, C _O is the junction capacitance per unit area of the pn junction, dV /
As the sharpness of the rising edge of the surge that you do not want dt to respond further, the x-direction dimension x _E of the third region is
(2):

[Equation 12] The surge protection device is also proposed.

[0016] In addition, as another aspect of the present invention,
In addition to the above constituent (a) ~ (f), (g) x dimension x _E of the third region, the maximum holding current value I acceptable range capable of maintaining the break-over state
_{For Hmax} , S _B is the area of the second semiconductor region,
(3):

[Equation 13] The surge protection device is also proposed.

Regarding the determination of the upper limit of the x-direction dimension x _E of the third region according to the above configuration requirement (f), (h) the x-direction dimension x _E of the third region is required to maintain a breakover state. For the minimum required holding current value I _Hmin , S _B is the area of the second semiconductor region, and the following formula (4):

[Equation 14] The surge protection device is also proposed.

On the other hand, instead of the above configuration requirement (f), (i) among the minority carriers injected from the fourth region, according to the quantity ratio β reaching the second semiconductor region, the above formula (2 ), The third region x direction dimension x _E is _expressed by the following formula (5):

[Equation 15] The surge protection device is also proposed.

Regarding the planar shape of the third region, when the third region has a rectangular or substantially rectangular planar shape with short sides and long sides, (j) x-direction dimension x _E is a dimension in the short side direction, and the second ohmic electrode is a pair of long sides of the rectangular third region, and the second ohmic electrode extends beyond the long side closer to the fourth region at least in the x direction. Proposes a surge protection device which also has the requirement (j) that it has no contacting portion on the surface of the semiconductor region, and also when the third region has a circular or nearly circular shape. In place of the constituent requirement (j), (k) the dimension x _{E in the} x direction is the diameter or the dimension of the diameter of the third region which is circular or substantially circular, and the second ohmic electrode is orthogonal to the x direction. , Bisected by a straight line in the y direction passing through the center or almost the center of the circular or nearly circular third region Of the pair of semicircles or substantially semicircles, there is no portion that contacts the surface of the second semiconductor region beyond the periphery of the semicircle on the side closer to the fourth region when viewed in the x direction. We propose a surge protection device that does. If the third region has a regular polygonal shape or a substantially regular polygonal planar shape, (l) the x-direction dimension x _E is a regular polygonal shape in place of the above configuration requirement (j) or (k). The second ohmic electrode has a width dimension passing through the center or substantially the center of the substantially regular polygonal third region, and the second ohmic electrode is orthogonal to the x direction and is at or about the center of the regular polygonal or approximately regular polygonal third region. Passing through y
Of the area divided by the straight line in the direction, there is no portion that touches the surface of the second semiconductor region beyond the periphery of the area closer to the fourth region in the x direction, and in the x direction. It has a constituent requirement (l) that it does not have a portion that is in contact with the surface of the second semiconductor region beyond the edge portion facing the fourth region even if it is in the area portion far from the fourth region when viewed. Propose a surge protection device. Further, as a constituent requirement (m) that can be adopted in place of the constituent requirements (j), (k), and (l), (m) the third region is composed of at least two separated regions in one cross section along the x direction. The at least two spaced apart regions are connected to each other at their ends in a direction orthogonal to the x direction, and the second ohmic electrode is arranged in a fourth region among the at least two spaced apart third regions. There is also proposed a surge protection device having a constituent requirement (m) that it does not have a portion on the nearer peripheral portion beyond the edge facing the fourth region and contacting the surface of the second semiconductor region;
Instead of this component (m), (n) other regions of the at least two spaced third regions except the region closest to the fourth region (thus, in the case of two, the distant region is simply Region, in the case of three, only the farthest region or the region farthest from the farthest region and the middle region: hereinafter, the same applies to the case of four or more) in the direction orthogonal to the x direction of the second ohmic electrode. We also propose a surge protection device that has a requirement (n) that it is a protection area to prevent the current from flowing around the end and the outflow of current from the end.

On the other hand, in order to obtain a surge protection device which is also developable as a whole structure, the present invention has another aspect. (O) One main surface of the first semiconductor region is provided on both sides of the fourth region. There is at least one portion provided with a pair of the second semiconductor region and the third region, which are spaced apart along the x direction, in total, and the second device terminal is the second semiconductor region and the second semiconductor region. In each set of the third regions, the second semiconductor regions and the third regions are commonly connected to all of the second ohmic electrodes that are in ohmic contact with each other;
We also propose a surge protection device with (o) added.

Similarly, instead of the constituent requirement (o), (p) a set of a plurality of fourth regions and a plurality of second semiconductor regions and a third region is provided on one main surface of the first semiconductor region. And at least one portion is provided alternately along the x direction, and the second device terminal is located in each of the second semiconductor region and the third region in each set of the second semiconductor region and the third region. Commonly connected to all of the second ohmic electrodes in ohmic contact in common, and the first device terminal in common to all of the first ohmic electrodes in ohmic contact with each of the fourth regions; We also propose a surge protection device with additional configuration requirement (p).

However, in principle, the two-terminal lateral surge protection device according to each aspect of the present invention described above is
It becomes a surge protection device for absorbing a unipolar surge, that is, it acts so as to absorb the surge only when a surge having a predetermined polarity is applied between the second device terminals. Therefore, conversely, even under the assumption that a single or common first semiconductor region is used, regardless of the polarity of the surge applied between the first and second device terminals, surges of any polarity In order to be able to absorb also, in the present invention, as another aspect, in the above structural requirements (a) ~ (e), the structural requirements
(c) is separated from the second semiconductor region along the x direction in (c) 'in both in-plane x and y directions of the principal planes on one principal plane side of the first semiconductor region and orthogonal to each other. And a fourth semiconductor region which is provided at a position and which has a conductivity type opposite to that of the first semiconductor region and forms a second pn junction with the first semiconductor region. Is a semiconductor region, and the concept that a second pn junction is formed with the first semiconductor region is introduced, and (q) from the side facing the first semiconductor region. Minority carriers for the fourth semiconductor region can be injected into the fourth semiconductor region, and minority carriers for the fourth semiconductor region can be injected, and at least one number M of at least one cross section along one in-plane direction. A fifth semiconductor region and a fifth region. Regarding the above configuration requirements
(d) is changed so that (d) 'the first ohmic electrode that is in ohmic contact with the fourth semiconductor region and the fifth region in common and is connected to the first device terminal, the second semiconductor region, and the third semiconductor region. A surge having a voltage equal to or higher than the breakdown voltage is applied between the first ohmic contact and the second ohmic electrode connected to the second device terminal while being in ohmic contact with the region in common and having a polarity reverse biasing the first or second pn junction. Then, it begins to absorb a surge current between the first and second device terminals, and after the breakdown, injection of minority carriers from the fourth semiconductor region to the first semiconductor region and from the third region to the second semiconductor. Absorb by a synergistic effect with the injection of minority carriers into the region, or a synergistic effect with the injection of minority carriers from the second semiconductor region into the first semiconductor region and the injection of minority carriers from the fifth region into the fourth semiconductor region. Beginning When the magnitude of the surge current exceeds the breakover current, it breaks through the positive feedback phenomenon and absorbs the surge current while shifting between a pair of device terminals to a clamp voltage that is relatively low in absolute value. It is a two-terminal break-over type surge protection surge protection device for bipolar surge absorption that keeps working;
And Then, in the unipolar surge protection device of the present invention, the structural requirement (e), which is an important structural requirement, is the (e) 'second ohmic electrode commonly in ohmic contact with the second semiconductor region and the third region, In the peripheral portion of the third region, the edge portion facing the fourth semiconductor region when viewed in the x direction has a portion that contacts the surface of the second semiconductor region beyond at least the edge portion closest to the fourth semiconductor region. No; the first ohmic electrode in ohmic contact with the fourth semiconductor region and the fifth region in common has an edge portion facing the second semiconductor region when viewed in the x direction when viewed in the x direction at the peripheral portion of the fifth region. Of the above, there is no part that contacts the surface of the fourth semiconductor region beyond at least the edge closest to the second semiconductor region;

The present invention based on such a constitutional requirement group represents a basic constitution of a surge protection device for absorbing a bipolar surge. Further, regarding each parameter found in the constitutional requirement (f), ρ _B is the sheet resistance of the second semiconductor region in the portion between the first and third regions or the sheet resistance of the fourth semiconductor region in the portion between the first and fifth regions, V
_f is a voltage for forward biasing the third region or the fifth region, C
_Suppose that _O is the junction capacitance per unit area of the first pn junction or the second pn junction and dV / dt is the sharpness of the rising edge of the surge that does not want to respond any further. If the x-direction dimension x _E shown for the third region in the protection device is also for the fifth region, the above-mentioned constituent features (g) to (n)
Can be added to the device according to the above-mentioned basic configuration of the present invention as a surge protection device for bipolar surge absorption by developing it as a constituent requirement for the fifth region. is there.
In this case, the parameter S _B described above represents not only the area of the second semiconductor region but also the area of the fourth semiconductor region.

Further, as a limitation of the surge protection device of the present invention for absorbing the bipolar surge, in the above, the number of the third region and the number of the fifth region are discriminated from each other by M.
, And N, which includes the case where they may be different numbers from each other, conversely, M = N may be satisfied, and each shape and area S _{B of} the second semiconductor region and the fourth semiconductor region may be the same. In the same manner, the x-direction dimension x _E and the y-direction dimension y _{E of} the third region and the fifth region may be the same.

Structural modifications relating to the surge protection device of the present invention for absorbing bipolar surges include (r) one major surface of the first semiconductor region, in addition to the above-specified combination of the above-mentioned constituent groups. Is a plurality of sets of the fourth semiconductor region and the fifth region and a plurality of sets of the second semiconductor region and the third region, and there are at least one or more portions alternately provided along the x direction. The fifth region in the fourth semiconductor region of the set is composed of a pair of spaced regions, the third region in the second semiconductor region of each set is also composed of a pair of spaced regions, the second device The terminal is common to all of the second ohmic electrodes that are in ohmic contact with the second semiconductor region and the pair of third regions in each set consisting of the second semiconductor region and the pair of third regions. Connect and first device terminal , Each of the fourth semiconductor regions and the pair of fifth regions is connected in common to all of the first ohmic electrodes in ohmic contact with the fourth semiconductor regions and the pair of fifth regions in common in each set. We also propose a surge protection device that has the configuration requirement (r).

Similarly, in addition to the constituent requirement (r), (s) two sets each of a set of the fourth semiconductor region and the fifth region and a set of the second semiconductor region and the third region are used. One set of them is alternately arranged in parallel on one main surface of the first semiconductor region, and the first device terminal has a fourth device region in which a fourth device region and a pair of fifth regions form a fourth device terminal. For each of the first ohmic electrodes that are in ohmic contact with the semiconductor region and the pair of fifth regions in common, instead of being commonly connected to all of them, a fourth semiconductor of a group located on the inner side in the juxtaposed direction. Connected only to the first ohmic electrode in ohmic contact with the region and the pair of fifth regions in common, the second device terminal, the second semiconductor region and the second semiconductor region in each set consisting of the pair of third regions. Second ohmic contact in common with a pair of third regions For each Mikku electrode,
Instead of connecting in common to all of them, while connecting only to the second ohmic electrode in ohmic contact in common with the second semiconductor region of the pair and the third region of the pair located on the inner side in the juxtaposed direction, A third device terminal is newly provided, and inside each set including each second semiconductor region and a pair of third regions and each set including each fourth semiconductor region and a pair of fifth regions, the outer side in the juxtaposed direction. A first ohmic electrode commonly in ohmic contact with the fourth semiconductor region of the set and a pair of fifth regions, and a second ohmic electrode commonly ohmic contact with the second semiconductor region and a pair of third regions. On the other hand, we also propose a surge protection device that takes into account the configuration requirement (s) that the third device terminal is commonly connected. However, in this configuration requirement (s), in each set consisting of the fourth semiconductor region and the pair of fifth regions, and inside each set consisting of the second semiconductor region and the pair of third regions, it is located outside in the juxtaposed direction. Instead of using the pair of fifth regions and the pair of third regions also in the positioned group, in each group positioned outside in such a juxtaposed direction, one fifth and third region are provided. You can use them one by one.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Each embodiment of the present invention shown in the accompanying drawings will be described in detail below. However, it should be noted that the surge protection device of the present invention configured to absorb unipolar surges also absorbs bipolar or bipolar surges. Although the surge protection device of the present invention configured for use also has some embodiments suitable for each, as already mentioned, there is a very close relation between the two, and thus they are referred to each other. be able to. First, a basic unipolar surge absorbing device as a surge protection device 20 of the present invention will be described with reference to FIGS. 1 (A) and 1 (B) showing an embodiment having a structure close to the principle structure. In both figures, as will be described later, the opening pattern opened in the insulating film 51 when the second ohmic electrode 32 is attached is slightly different, and the other structure is exactly the same.
In (B), a hole flow f _H is schematically shown together in order to explain the most basic operation of the present invention later, and FIG.
(A) is provided with a reference numeral for defining the dimensions of the second and third regions in each direction, which will also be described later.
It is used to explain the particulars according to the invention with respect to the dimensional relationship between 2, 23. This surge protection device 2
For the first semiconductor region 21 of the first conductivity type 0, a semiconductor substrate supplied from a so-called semiconductor wafer is used as a general case, although not limited thereto. The first semiconductor region 21 has a conductivity type opposite to the first conductivity type of the first semiconductor region, that is, the One semiconductor region 21 and pn
A second semiconductor region 22 forming a junction is formed, and for this second semiconductor region 22, the first semiconductor region 2 is also formed.
The third region 23 is in contact from the side opposite to 1. As will be described later, there may be a plurality of third regions 23 at least in a cross section along one in-plane direction thereof. However, in the case of the first embodiment described here, the third region 23 is the cross section shown in the drawing. There is only one, and it is assumed that it has a rectangular outer contour having a long side direction and a short side direction, and the cross section is one cross section along the short side direction. However, for convenience,
N is a number of 1 or more, and the third region 23 is generalized to be provided in at least N in a cross section along one in-plane direction. On the same surface side of the first semiconductor region 21, a fourth region 24 is formed so as to be appropriately laterally spaced from the second semiconductor region 22. The surge protection device 20 having such a structure is generally called “lateral type” as described above. However, in the drawings relating to the present embodiment, the conductivity type of the semiconductor substrate or the first semiconductor region 21 is assumed to be n-type, and therefore the conductivity type of the second semiconductor region 22 forming a pn junction with the first semiconductor region 21. Is p-type. Further, as is clear from the description of the operation section already described and the description below, the third region 23 forms a rectifying junction with the second semiconductor region 22, and the second semiconductor region 2
2 may be made of a substance capable of injecting minority carriers into the second semiconductor region 22, and the forward bias voltage (forward voltage) V _f as a voltage value to be turned on can be defined. Just like that,
Since the fourth region 24 may be made of a substance capable of injecting minority carriers into the first semiconductor region 21 with respect to the first semiconductor region 21, a silicide capable of injecting holes or a silicide capable of injecting holes depending on the conductivity type of the contacting partner. Although a metal or the like capable of injecting electrons can be selected, it is generally convenient in terms of manufacturing and designing that the third and fourth regions are semiconductors. In the illustrated embodiment, the third region 23 is an n-type region forming a rectifying junction with the second semiconductor region 22, and the fourth region 24 is the first semiconductor region 21 in accordance with the same idea.
The p-type regions forming a rectifying junction are formed by the impurity double diffusion technique. However, since the third semiconductor region 23 forms one end of the main current (device current) line after the breakover, it is preferable that the third semiconductor region 23 has a high conductivity. In this embodiment, the high impurity concentration n-type is used. That is, it is preferable to be an n ⁺ type region (in the figure, such concentration notations + and − are omitted). Of course, with respect to the first semiconductor region 21, each of the regions 22 and 2 has a predetermined conductivity type, a predetermined thickness, and a predetermined impurity concentration.
The technique itself for forming 3, 24 is, for example, as described above,
A technique for selectively diffusing boron (p-type) or phosphorus (n-type) and other well-known existing techniques can be arbitrarily adopted by those skilled in the art. -Even if the conductivity types of all the fourth semiconductor regions 21, 22, 23, and 24 are reversed, only the directions of the operating current and device current described below are reversed, and other explanations in this document are almost the same. Can be applied to.

Now, the horizontal surge protection device 2 of the present invention
0 is essentially a two-terminal device, but one of them, the first device terminal T ₁ is electrically connected to the fourth semiconductor region 24 via the first ohmic electrode 31. The second device terminal T ₂ which is the other terminal is electrically connected in common to the second semiconductor region 22 and the third semiconductor region 23 via the second ohmic electrode 32 which will be described in detail later. Both the first ohmic electrode 31 and the second ohmic electrode 32 have a predetermined area and a pattern opening formed in the insulating film 51 formed on the surface of the first semiconductor region 21 by a usual method in this kind of technical field. Ohmic contacts are made to the corresponding regions respectively. Here, the first ohmic electrode 31 is made to contact only the surface of the fourth semiconductor region 24, while the second ohmic electrode 32 is made to contact the second semiconductor region 22 and the third semiconductor region 23.
Is formed so as to be in common ohmic contact with. At this time, according to the present invention, if the second ohmic electrode 32 has a cross-section shown in the x, y two-dimensional in-plane direction of the surface of the first semiconductor region 21, the cross-section is along the x-direction.
When viewed along the direction, it seems that there is no part of the peripheral portion of the third semiconductor region 23 that contacts the second semiconductor region 22 beyond the closest edge among the edges toward the fourth semiconductor region 24. It has become. In the basic embodiment shown, only one third semiconductor region 23 is shown,
There is only one edge toward the fourth semiconductor region 24, and therefore the edge is the edge that is closest to the fourth semiconductor region 24. Therefore, in this embodiment, in the peripheral portion of the second ohmic electrode 32 in the portion in contact with the surface of the third semiconductor region 23, the fourth semiconductor region 24 is formed.
The edge of this second ohmic electrode 32 facing toward
_As indicated by _i , it remains only in contact with the surface of the third semiconductor region 23, and as seen at the opposite ohmic contact edge P _O , the third semiconductor region 2
3 and the surface of the second semiconductor region 22 are not commonly crossed laterally beyond their boundaries to make ohmic contact. The conventional structure described above with reference to FIG.
That is, this is greatly different from the conventional structure in which the second ohmic electrode 32 that makes ohmic contact with the third region 3 makes equal contact with the second semiconductor region 2 on both sides of the third region 3 in the x direction. However, with the right hand in FIG. 1, the structure of the portion where the second ohmic electrode 32 laterally crosses the contact portion between the third semiconductor region 23 and the second semiconductor region 22 and is in contact with both is shown in FIG. As shown in A), the third semiconductor region 2
The structure may be such that the ohmic electrode portion on the surface of No. 3 extends as-is on the same plane to reach the surface of the second semiconductor region 22, and as shown in FIG. The second ohmic electrode 32 passes over the insulating film portion 51 ′ formed on the surface along the contact portion between the region 23 and the second semiconductor region 22, and the second ohmic electrode 32 is formed on both regions 22, 23.
The structure may be in ohmic contact with. In the following description and other embodiments, the structure of FIG. 1 (A) is representative.

The various points described so far can be applied to the other embodiments described below unless otherwise specified. Similarly, if this is also described in advance, the same applies to any of the following embodiments, but in the drawing, each component pointed out with the same reference numeral as another embodiment is the same as that of the other embodiment. The components may be the same as or similar to the components indicated by the reference numerals, and therefore the description may be omitted. The contents and modified examples described for each of the constituent elements in any of the embodiments can be similarly incorporated unless it is clearly stated that they are not applicable to each embodiment. Now, the surge protection device 20 shown in FIG.
There is no difference from the conventional structure which has already been described with reference to FIGS. 10 to 12 except for the limitation of the pattern of forming the second ohmic electrode 32 according to the present invention, and therefore the basic operation mechanism as a surge protection device. Itself
This is as described regarding the conventional example. In addition to the punch-through phenomenon between the first and third semiconductor regions 21 and 23, avalanche breakdown or zener breakdown between the first semiconductor region 21 and the second semiconductor region 22 is used as the initial breakdown mechanism accompanying the application of surge. The same is true for getting. However, here again, in order to facilitate comparison with the conventional example, the case of using the punch-through phenomenon will be described. First, a surge voltage is applied between the first and second device terminals T ₁ and T _2. , That is, the first semiconductor region 21 and the second semiconductor region 22.
Is a phase at which a reverse bias is applied to the pn junction between ( ₁ and 2) (thus, in the case shown, the phase on the first device terminal T ₁ side connected to the fourth semiconductor region 24 is positive), and is considerably large. And the depletion layer in the pn junction between the first and second regions caused by the application of the reverse bias is not only on the first semiconductor region 21 side but also on the third semiconductor region 23.
When the upper end of the depletion layer reaches the third semiconductor region 23, the first semiconductor region 2
1 and the third semiconductor region 23 punch through. When using punch-through as described above, it may be better to set the second semiconductor region 22 to a p-type having a slightly low concentration, that is, a p ⁻ type (which may still be darker than the substrate 21). , The thickness should be set appropriately.

In any case, when the first semiconductor region 21 and the third semiconductor region 23 are punched through, minority carriers for the first semiconductor region 21 from the fourth semiconductor region 24 to the first semiconductor region 21. As a result of being injected, as shown schematically by an arrow f _H in FIG. 1 (B), this is collected in the second semiconductor region 22 and escapes to the second ohmic electrode 32. The element current begins to flow. The starting voltage of such punch-through operation is the point indicated as the breakdown voltage V _BR on the voltage axis in FIG. 11 showing the operating characteristics of the conventional surge protection device 10. Also in the surge protection device 20 of the present invention, the tendency of the operating characteristics can be obtained by using FIG. 11 used in the description of the conventional example. On the other hand, even if the second semiconductor region 22 and the third semiconductor region 23 are electrically connected to each other on the surface thereof by being commonly connected to the second device terminal T ₂ , the second semiconductor region 22 Current value of the device current (the magnitude of the hole flow f _H ) that increases after starting to flow through the flow path and the resistance value of the current path of the device current along the arrow f _H in the second semiconductor region 22. The voltage value (voltage drop) obtained by the product of the rectifying junction formed by the second semiconductor region 22 and the third semiconductor region 23 (pn in the case shown is the third region 23 is also a semiconductor region. When the forward voltage of (junction) is reached, minority carriers are injected from the third semiconductor region 23 to the second semiconductor region 22 thereafter. Then, the injection of the minority carriers into the second semiconductor region 22 results in the first and second device terminals T ₁ as shown by the characteristic curve portion that sharply rises in the current axis direction in FIG. , T ₂ is further increased, which also causes a positive feedback phenomenon that promotes injection of minority carriers from the fourth semiconductor region 24 to the first semiconductor region 21. Therefore, when viewed in the voltage-current (VI) characteristic diagram shown in FIG. 11, the breakover current I passes through between the first and second device terminals T ₁ and T _2.
If a current with a magnitude greater than the value indicated as _BO flows,
As a manifestation of the positive feedback phenomenon occurring inside the device, a negative characteristic is generated as well shown in the characteristic diagram, and both ends of the device appearing between the first and second device terminals T ₁ and T _2. The voltage is lower than the breakover voltage V _BO , which is the voltage value when the breakover is started, and further, the breakdown voltage V _BR when the punch through is first started.
It is possible to shift the clamp voltage to a lower clamp voltage V _P , which makes it possible to suppress heat generation of the element and absorb a large surge current.

As described above, the surge protection device 20 allows the first and second device terminals T ₁ and T _{2 to be connected.}
The maximum current value that can be absorbed via the
Also, the minimum element current value at which the device once turned on can maintain the on state is the holding current I _H.
Called. On the other hand, the clamp voltage V _P is, in principle, the product of the holding current I _H and the series resistance of each part along the current path, and the forward voltage of the pn junction formed by the second semiconductor region 22 and the third semiconductor region 23. It is almost equal to the value obtained by adding one.
Therefore, the clamp voltage V _P is determined not only by the resistivity and the impurity concentration of the first semiconductor region 21, but also by the distance between the first semiconductor region 21 and the third region 23. Since the punch-through voltage can be controlled depending on the effective thickness and / or the impurity concentration, it can be arbitrarily set within a considerably wide design range. Conversely, if the design parameters such as the geometrical dimensions of each region and the impurity concentration are properly selected, such as making the second semiconductor region thicker and increasing its impurity concentration, the operating characteristics In the figure, the first and second semiconductor regions 2 are included in the initial breakdown phenomenon when starting to rise at the breakdown voltage V _BR.
Avalanche breakdown and Zener breakdown between 1 and 22 can also be used, and the mechanism thereafter can be the same as described above. Even in that case, the surge protection device 20 of the present invention maintains the high breakdown voltage to suppress the current flowing in the element to the minimum when the surge is not applied, and the power is wasted by the present device. On the other hand, once a surge of the breakdown voltage V _BR or more is applied, an extremely low clamp voltage V _P will soon be exhibited, thereby absorbing a large current surge and reliably protecting the subsequent circuit system. I will get it.

However, due to the above mechanism, after the surge is applied, first, minority carriers (holes in this case) from the fourth semiconductor region 24 to the first semiconductor region 22.
Is injected, and when this hole flow f _H reaches the second ohmic electrode 32 from the second semiconductor region 22, if the route cannot be determined, it is eventually formed by the second semiconductor region 22 and the third semiconductor region 23. Since the magnitude of the hole flow f _H flowing until it becomes equal to the forward voltage of the pn junction cannot be determined, the breakover current V _BO cannot be determined, and thus the controllability of the holding current I _H is reduced. It also leads to deterioration of stability. In fact, when the hole flow f _H as in the conventional example shown in FIG. 12 occurs, such a problem occurs as described above. However, in the case of this embodiment constructed in accordance with the present invention, as shown in FIG. 1 (B), the second ohmic electrode 32 has the second semiconductor region 2
Even if it contacts the surface of No. 2, since there is no contact portion on the side close to the fourth semiconductor region 24, the hole flow f _H is
Be sure to pass through the lower surface of the third semiconductor region 23 before the portion P _O
Then, the current flows into the second ohmic electrode 32, and its path can be determined. This means that the controllability and stability of the breakover current V _BO and the holding current I _H can be improved, and in fact, this has been reliably confirmed by experiments by the present inventor. As for the surge withstand capability, it was found that the surge resistance increased in proportion to the element area.

Incidentally, as related to the description below, the planar shape of the third semiconductor region 23 is not limited to the rectangular shape assumed above, and in principle, various shapes are conceivable and may be indefinite. . However, regarding various semiconductor devices that are generally created in this kind of technical field, it is necessary to consider not only manufacturing problems but also improving device characteristics by simplifying each parameter. The planar shape of each area is usually a circle, a regular polygon, or the like, in addition to a rectangle. In these cases, in the case of complying with the gist of the present invention, the relationship as schematically shown in FIG. 2 may be adopted as the planar arrangement relationship among the fourth semiconductor region, the third region, and the second semiconductor region. .

That is, as shown in FIG. 2A, the third semiconductor region 2 is formed in contact with the second semiconductor region provided at a position separated from the fourth semiconductor region 24 in the x direction.
When the shape of 3 is circular or almost circular, a diagonal line is drawn in FIG. 2 (A) among a pair of semicircles that pass through the center O of the circle and are bisected by a straight line in the y direction orthogonal to the x direction. The semi-circular portion indicated by the reference numeral, that is, the semi-circular portion on the side closer to the fourth semiconductor region 24, includes a first semi-circular portion that crosses the edge toward the fourth semiconductor region 24 side and contacts the second semiconductor region 22. The two ohmic electrodes 32 are not provided. That is, the contact edge portion P _{i of} the second ohmic electrode 32 shown in FIG. 1 facing the fourth semiconductor region 24 to the third semiconductor region 23 remains on the surface of the third semiconductor region. . In the semi-circular portion on the opposite side, the second ohmic electrode is contacted with both surfaces of the second semiconductor region 22 and the third semiconductor region 23, as indicated by the portion P _O in FIG. 32 may be formed.

As shown in FIG. 2 (B), the third semiconductor region 23 is a regular polygon, for example, a regular hexagon, and a straight line passing through its center O and orthogonal to the x direction in the y direction is the regular polygon. If it passes through a pair of opposite corners of a polygon, or if it passes through the center of a pair of opposite sides in a relationship rotated by 90 °, the figure will be divided into the two area portions divided by the straight line. As indicated by hatching in 2 (B), it extends over the surface of the second semiconductor region 22 beyond the edge of the area close to the fourth semiconductor region 24, and The second ohmic electrode portion that contacts is not formed, and only on the opposite side, the second and third semiconductor regions 2 are formed.
For the second and second electrodes 23 and 23, the second ohmic electrodes 32 are commonly contacted with their surfaces in ohmic contact.

As shown in FIG. 2C, the third semiconductor region 23 has a triangular shape and is separated from the center of the third semiconductor region 23 by a straight line orthogonal to the x direction, and is close to the fourth semiconductor region. As shown by reference numeral E ′, edge portions E ′, E ′ facing the fourth semiconductor region 24 are likely to occur not only in the shaded area portion on the side but also on the opposite side area portion. For example, the ohmic contact portion of the second ohmic electrode 32 with the second semiconductor region 22 is not formed beyond this. The description using this triangle as an example can be generalized again to a regular polygon. If the regular polygon deviates from the above conditions and the regular polygon is not 90 ° from the rotation angle position shown in the figure, , Can be effectively applied as a consideration when occupying a rotated position. It can even be generalized to an indefinite shape, in short, in the third semiconductor region having an arbitrary shape, the second ohmic electrode 32 is provided to the second and third semiconductor regions beyond the edge portion facing the fourth semiconductor region. It suffices not to contact both surfaces of the region in common.

These considerations with respect to FIG. 2 are likewise applicable to other embodiments, in particular the embodiments of the surge protection device of the invention for bipolar surge absorption described below. Also,
When the third semiconductor region 23 is formed of a plurality of regions,
It is conceivable that the individual regions are arranged in parallel not only along the x direction but also along the y direction. Of course, in that case, the respective third semiconductor regions 23 are electrically connected to each other.

As described above, according to the present invention, the controllability or stability of the breakover current V _BO and the holding current I _H is improved, but a measure against the "small surge" described above can also be taken. . That is, in the structure of the surge protection device 20 shown in FIG. 1, when a surge having a polarity or a phase in which the second device terminal T ₂ side is negative and the first device terminal T ₁ side is positive is applied, it is reversed at that time. A biased pn junction is formed by the first semiconductor region 21 and the second semiconductor region 22. Since a junction capacitance C _j is expected in such a junction, depending on the time differential value (dV / dt) of the surge voltage applied between the first and second device terminals T ₁ and T ₂ at that time, as transient current for charging the junction capacitance C _j, it flows displacement current i _t represented by equation (1) Sunde掲. Therefore, as described above, when the value of the junction capacitance C _j is large, for example, when a lightning surge is applied to the telephone communication line, the peak value of the induced noise voltage value to the circuit system is much lower. , The slew rate (dV / dt) was considerably high even if it was a “small surge” that does not need to be absorbed in the first place, so a displacement current i _{t of} a considerably large value flows, although it is instantaneous. The peak voltage value of the surge is the design break-over voltage V _BO.
The device may break over even though it has not yet reached. In other words, the break-over voltage V _BO as the surge protection device 20 varies depending on the speed or sharpness of the applied surge. Therefore, in the surge protection device 20 of the present invention, as described above, the surge protection device 20 flows in the initial stage of operation as shown in FIG.
Since the path of the hole flow f _H shown in (B) can be controlled or stabilized, the breakover voltage as a device can be controlled without responding to such a small surge by the following measures. It is possible to stabilize V _BO at the designed unique value.

Here again, for simplicity, the third semiconductor region 23 is assumed to have a rectangular shape. And FIG.
As shown in (B), the dimension in the x direction (in this case, the short side direction) is x _E , and the x direction dimension that is the short side direction dimension of the second semiconductor region 22 is x _B , Furthermore, the following symbols are defined. y _E : y-direction dimension of the third semiconductor region 23, y _B : y-direction dimension of the second semiconductor region 22, ρ _B : sheet of the second semiconductor region in a portion between the first semiconductor region and the third semiconductor region Resistance, I _ff : current value required to forward bias the third semiconductor region 23. Therefore, the current density J of the current I _ff required to forward bias the third semiconductor region 23 is expressed by the following equation (6).

[Equation 16] However, the denominator on the right side of the equation (6) is, after all, the total area S _B (= x _B · y _B ) of the second semiconductor region 22. On the other hand, the forward voltage V _f when the third semiconductor region 23 should be turned on
Is generally about 0.5 V, but even if the current value is the same, the current (for example, hole flow f _{H in} FIG. 1B) is a long path along the lower surface of the third semiconductor region 23. The voltage drop corresponding to the forward voltage V _f is most likely to occur as a result of running along the direction of V. In the case of the device of the present invention shown in FIG. As a result of being in contact with the second semiconductor region 22 only in the portion P _O distant from the fourth semiconductor region 24 in the x direction,
Lateral direction (x direction) on the bottom surface of each third semiconductor region 23
Is the closest to the fourth semiconductor region 24. Therefore, the voltage drop due to the device current (hole flow f _H ) flowing along the substantially entire length of the x-direction dimension x _E of the third semiconductor region 23 may be considered, and thus the forward bias of the third semiconductor region 23 is considered. The voltage V _f is calculated using the above current density J by the following equation.
It can be shown in (7).

[Equation 17] Therefore, if this is calculated and the current density J is solved,
(8) is obtained.

[Equation 18] Therefore, if the above equation (6) is equal to this equation (8) with respect to the current density J, it is possible to solve for the total current I _ff required to bias the third semiconductor region 23 in the forward direction. It becomes like 9).

[Formula 19] Meanwhile, the junction capacitance C _j formed by the first semiconductor region 21 and the second semiconductor region 22, the junction capacitance per unit area and C _O, the following equation (10),

[Equation 20] Therefore, when a surge that does not rise quickly and has a sharpness of dV / dt is applied between the first and second device terminals T ₁ and T ₂ , the displacement current i _{t in} Eq. Can be rewritten as the following equation (11).

[Equation 21] Therefore, in order to prevent the third semiconductor region 23 from being forward biased by such a displacement current i _t , the following formula (12),

[Equation 22] Since it suffices to satisfy, the above equations (9) and (11) and this (1
Solving from the equation (2) for each x-direction dimension x _E of the third semiconductor region 23, the important equation (2) given above can be obtained.

In other words, due to the impedance of the circuit to be protected, etc., a surge with a sharper (faster) rise cannot be considered or need not be the target, but the sharpness up to this point can be avoided. The unsharpening speed dV / dt that does not want to cause an erroneous response to a surge
, All the following parameters are known, so
By substituting the determined dV / dt value together with them into the equation (2), the upper limit of the x-direction dimension x _E when forming each third semiconductor region 23 can be determined. Moreover, the dimension y _E of the third semiconductor region 23 in the y direction and the area S _B of the second semiconductor region 22 are irrelevant. Therefore, with respect to the actual creation of each of these regions, the error factor due to the manufacturing dimension parameter can be surely reduced.

This can also be applied to the case where the third semiconductor region has various planar shapes, as described above with reference to FIG. However, when the third semiconductor region 23 has a circular shape or a shape close to it, or a regular polygon or a shape close to it, or an indefinite arbitrary shape, the promise described with reference to FIG. on the formation of a two ohmic electrodes 32, with respect to the above-mentioned x dimension x _E, when the minority carrier flow emitted from the fourth semiconductor region 24 flows into the second ohmic electrode 32 through the lower surface of the third semiconductor region It may be considered as a limitation on the dimension of the third semiconductor region along the longest distance direction. In other words,
By defining such a longest distance direction as the x direction, the above equation (2) can be effectively used. This is because the voltage drop becomes smaller at a shorter distance.

Thus, as one of the objects of the present invention, as in the conventional example shown in FIG. 13, an electrode separately ohmic-contacted from the fourth semiconductor region 24 side to the first semiconductor region 21 is provided. A high dV / dt value is obtained without depending on the method for charging the junction capacitance C _j between the first and second semiconductor regions 21 and 22 by injecting majority carriers for the first semiconductor region 21 through Measures can be taken against the surge. Moreover, such an ohmic contact structure since the it is not to be essential to the fourth semiconductor region 24 in ohmic contact with the common into a first semiconductor region 21, as shown in FIG. 1, the first device terminal T ₁ The first ohmic electrode 31 to be connected can be configured to be conductive only to the fourth semiconductor region 24, and the reverse breakdown voltage as the surge protection device 20 can be ensured. Note that when the yield mechanism that particular punch-through, first by the displacement current i _t, immediately after the punch-through occurs between the third region 21 and 23, the second semiconductor region 22 located between them The sheet resistance of is also considerably high. However, when a current flows through this region, the depletion layer also shrinks, and at least in the portion directly below the third semiconductor region 23, its sheet resistance is originally in the second semiconductor region 24 corresponding to the current value at that time. The expected sheet resistance value or close to it. for that reason,
The sheet resistance ρ _B described above may be set as the sheet resistance of the second semiconductor region in such a case. Conversely, in the case of avalanche breakdown, the depletion layer does not extend to the second semiconductor region near the third semiconductor region, so the resistance there is a sheet of the second semiconductor region according to the current value at that time. Based on the resistance ρ _B , it does not become abnormally high.

Also in the case of complying with the above equation (2), the dimension x _{E in} the x direction and the diameter x _E (in the case of a circular shape or a substantially circular shape) of the third semiconductor region 23 are as shown in FIG. 1 (A). In addition, the thickness dimension h _E of the third semiconductor region may be added as a correction factor.
_{Even if} the short side width x _E and the diameter x _E of the third semiconductor region 23 are considerably shortened, _E is extremely thin, typically about 3 to 4 μm at the most, and especially avalanche breakdown type. As can be seen from the above, even if the thickness becomes slightly thicker (often stays in the order of several μm), the third semiconductor region 23 is a region formed by diffusion with respect to the second semiconductor region 22. In such a case, the lateral diffusion resistance on both sides of the cross section of the third semiconductor region 23 is extremely lower than the resistance of the second semiconductor region below the third semiconductor region. _E can ignore the effect. However, although it is easiest to ignore, there is nothing you have to do,
As long as it is based on equation (2), the dimension x _E for the third region
Of course, it is permissible to make such an appropriate amount of correction. However, hereinafter, for convenience, the thickness h _E of the third semiconductor region 23 will be ignored.

In the present invention, however, the holding current I
We are also considering _H. The required value of the holding current I _H is determined as a value that promptly returns to the high insulation off state after the surge disappears in consideration of the impedance of the protected circuit and the current value that is constantly used in the circuit. However, generally, for protection of communication lines, the holding current I _H is often required to be at least about 100 mA or more. On the other hand, the higher the value, the better, and needless to say, the surge protection device itself has a current value enough to cause self-destruction. However, conversely, it may be better to set the holding current value to a considerably high value within a range where self-destruction does not occur. Based on the invention already disclosed in the above-mentioned publications and based on the disclosure of the present application, the applicant has manufactured or prototyped an extremely large number of punch-through type surge protection devices. The value of the current density that causes self-destruction can be set to a considerably high value, and about 1.5 A / mm ² can be secured. Considering the holding current I _H under such a premise, here again, for convenience, the case where the third semiconductor region 23 has a rectangular planar shape will be representatively described.
This is because the current value I _ff corresponding to when the third semiconductor region 23 stops the minority carrier injection and the current value I _ff when the minority carrier injection from the fourth semiconductor region 24 stops.
It can be considered as the sum with _C , that is, I _H = I _ff + I _C. Here, since the current value I _ff is as previously obtained by the equation (9), even if the above current value I _C is zero, in order to obtain the desired holding current I _H
The following formula (13) can be obtained by replacing I _ff in the formula (9) with the holding current I _H and solving this for the dimension x _E of the third semiconductor region 23 in the x direction.

[Equation 23] Therefore, the third semiconductor region 2 obtained by the equation (13)
The holding current I _H while the dimension x _E of 3 in the x direction also satisfies the upper limit expression (2) regarding the dimension in the x direction described above.
Can be designed, but in the opposite case, the required minimum holding current I _Hmin value (for example, 100 mA as described above)
If the x-direction dimension x _E required at the time becomes shorter than the upper limit of the x-direction dimension x _E defined by the above equation (2), replace the equation (13) with the upper limit equation. Already mentioned
The equation (4) is modified to design the x-direction dimension x _E of each third semiconductor region 23 with the smaller value of these equations (2) and (13) as the upper limit and less than that value. Become. However, in practice, the above equation (2) tends to have a larger value, so determine the dV / dt value of the surge that you do not want to respond, and based on this, the upper limit of the above equation (2). Even if you ask
The required minimum holding current I _Hmin is often sufficiently secured.

On the contrary, it is far more advantageous to consider the lower limit of each third semiconductor region 23 by modifying the above equation (13). In other words, it is more practical to consider how much the x-direction dimension x _E of each third semiconductor region 23 can be narrowed down, on the condition that the surge protection device does not self-destruct. Therefore, if the above formula (13) is transformed into a lower limit formula of the x-direction dimension x _E of each third semiconductor region 23 with respect to the allowable maximum holding current I _Hmax ,
It becomes the above-mentioned expression (3). Thus, in the present invention, regarding the x-direction dimension x _E of the third semiconductor region 23, the above formula (2) is presented as the upper limit thereof and the above formula (3) is presented as the lower limit thereof. Let me give you an example. The number of prototypes has increased to an extremely large number, but the second semiconductor region 22 has 50
0 μm square, that is, the x-direction dimension x _B is also the y-direction dimension y
Both _B are equally 500 μm, and the first semiconductor region 21
A device having a junction capacitance C _j expected to be 23 pF and a sheet resistance on the lower surface of the third semiconductor region of the second semiconductor region 22 of 14200 Ω / □ at an operating voltage of about 150 V will be representatively taken. In this device, dV /
If the dt value want to not respond to more surge 100 V / .mu.s, the (11), replacing the values in (12), when calculating the current value I _ff of that time approximately 0.55mA or any Calculated as good. Therefore, if the I _ff value and the other values described above are substituted into the above equation (2) and calculated, the short side width x _E of the third semiconductor region 23 should be approximately 88 μm or less. Further, if it is in this size range, as is apparent from calculation and calculation of the holding current I _H for the holding current I _H , even when the short side width x _E is at the upper limit dimension of 88 μm, the value of the holding current I _H Is a value that sufficiently exceeds, for example, 100 mA, which is assumed as the value of the minimum holding current I _Hmin required previously.

On the contrary, in consideration of the self-destruction problem described above, when the maximum holding current value I _Hmax is set to 500 mA, the lower limit of the shorter one can be calculated based on the equation (3). The dimension x _E of the region 23 in the x direction is calculated to be approximately 6 μm. Therefore, in the case of such a device parameter example, the x-direction dimension x _E of each third semiconductor region 23 is within the dimension range of 6 μm at the minimum to 88 μm at the maximum.
It can be seen that the device can be designed so as to satisfy the required holding current value I _H. Further, as is clear from the operation principle of the device of the present invention, if the holding current can be controlled as described above, the breakover current can be controlled accordingly, regardless of the breakdown mechanism.

Such a thing can be applied to the case where the third semiconductor region 23 has a circular shape or the like. Earlier similar, in terms of forming a second ohmic electrode 32 protects the promise has been described with reference to FIG. 2, with respect to the above-mentioned x dimension x _E, the minority carrier flow emitted from the fourth semiconductor region 24 is the It may be considered as a limitation on the dimension of the third semiconductor region along the longest distance direction when flowing into the second ohmic electrode 32 through the lower surface of the third semiconductor region.

In any case, under the above conditions,
According to the present invention, it is proved that a very important design guideline is provided for the break-over type lateral two-terminal surge protection device 20 of this type. Next, consider the surge withstand capability. By the operation mechanism described above,
In this type of surge protection device, the main current path (device current path) after it is turned on is the third semiconductor region 2
3 and the fourth semiconductor region 24.
Therefore, it is easily expected that the larger the area of the third semiconductor region 23, the higher the surge withstand capability. Therefore, the ratio of the total area of the third semiconductor region 23 (that is, x _E · y _E ) to the area S _B of the second semiconductor region was changed, and the change in surge withstand capability was observed. Its results are shown in FIG. 3 (A), prototype range, the third semiconductor region area to the second semiconductor region area S _B as close plants in that the surge withstand capability begins to show saturation tendency (x _E · y The ratio of _E ) is 67%, and the smaller one is 20
%, And when the area ratio is 60% or more, the actual surge withstand capability is about 80 A / mm ² or more. Even when the area ratio is 20%, the surge resistance is about half that of the 60% area ratio element, but basically the required break
Since it has been confirmed that the over characteristic is exhibited, in the case of the surge protection device 20 of the present invention for absorbing a unipolar surge as shown in FIG. When the area ratio of the third semiconductor region 23 to the semiconductor region 22 is in the range of 20% to 80%, good surge withstand characteristics can be obtained. Accordingly, it is actually the most desirable to design the x dimension x _E of the third region above within this range.

When it is known that only β can reach the second semiconductor region 22 among the minority carriers injected from the fourth semiconductor region 24,
The equation (2) can be modified to the above-mentioned equation (5) and used, and the β can be obtained by actual measurement or calculation. When the x direction is the long side direction of the third semiconductor region 23, the above equations including the equation (2) can be effectively used. However, the short side direction means that the current path that licks the lower surface of the third semiconductor region becomes shorter, so that the resistance to the "small surge" having a high time differential value dV / dt of the voltage becomes higher.

The description has been given above based on the embodiment for absorbing one-polarity surge, the basic structure of which is shown in FIG. 1, but a further embodiment relating to this will be presented later, and then the surge protection of the present invention will be described. A basic structural example when the device is constructed by absorbing 20 bipolar surges will be described with reference to FIG. The surge protection device 2 of the present invention shown in FIG.
Even if it is 0, there are few structural differences from the embodiment shown in FIG. 1, and the difference is that the fourth semiconductor region 24 is geometrically and physically, and metallurgically It is a semiconductor region similar to the second semiconductor region 22, and in the fourth semiconductor region 24, this is also the third semiconductor region 2 in the above meaning.
A fifth semiconductor region 25 similar to that of the third semiconductor region 2 is added, and the second device terminal T ₂ has the second and third semiconductor regions 2
In the same manner as conducting to the second ohmic electrode 32 which is in ohmic contact with both 2 and 23, the first device terminal T ₁
Not only the fourth semiconductor region 24 but also the fifth semiconductor region 25
Also, it is a dot position where the connection is made via the first ohmic electrode 31. In other words, even in the embodiment for absorbing the bipolar surge, since the surge protection device of the present invention configured for absorbing the unipolar surge described above has all the constituent requirements, the same is applied to them. All the explanations so far regarding the respective constituent elements can be incorporated unless otherwise indicated by the reference numerals and the fact that they are not applicable.

In the surge protection device 20 shown in FIG. 4, however, the fourth semiconductor region 24 is the same as the fourth semiconductor region 24 in FIG. 1 in the surge protection device of the present invention for absorbing unipolar surge described above. Not only is it configured to exhibit exactly the same function, but when the polarity of the applied surge is reversed, it functions as a semiconductor region equivalent to the second semiconductor region 22 described above, and in the same manner, The fifth semiconductor region 25 performs the same function as that performed by the third semiconductor region 23 instead of the third semiconductor region 23 when a surge having a polarity opposite to that described above is applied. Of course, the first ohmic electrode 31 that makes ohmic contact with the newly added fifth semiconductor region 25 and the fourth semiconductor region 24 also has the second semiconductor region 2 when viewed from the fifth semiconductor region 25 in the illustrated cross section.
2 and the edge closest to the second semiconductor region 22 (However, even in this embodiment, since there is only one fifth semiconductor region, the edge facing the second semiconductor region is left as it is. (Which is the edge closest to), there is no part in common contact with the fifth semiconductor region 25 and the fourth semiconductor region 24, and as shown by the symbol P _i , it is on this side. The facing ohmic contact portion of the ohmic electrode 31 remains on the surface of the fifth semiconductor region 25, and the opposite edge portion has a portion commonly contacting the fourth semiconductor region 24 and the fifth semiconductor region 25. ing. Further, each dimension parameter such as the x-direction dimension x _E of the fifth semiconductor region 25 and the x-direction dimension x _B of the fourth semiconductor region 24, the impurity concentration relationship,
Other physical parameters such as the sheet resistance value of the first semiconductor region 21 also satisfy the various restrictions regarding the above-described embodiment of the present invention configured for absorbing unipolar surge.

From the above, as described above with respect to the device 20 for absorbing unipolar surge shown in FIG.
Also in this device, when a surge is applied with a polarity in which the first device terminal T ₁ side is positive and the second device terminal T ₂ side is negative, the same operation as that of the device shown in FIG. 1 is performed. The pn junction that causes punch through, avalanche breakdown, zener breakdown, etc. is a pn junction composed of the first semiconductor region 21 and the second semiconductor region 22, and the newly provided fifth semiconductor region 25 is the fourth semiconductor region. It becomes a reverse bias with the semiconductor region 24 and does not work significantly. On the other hand, when a surge with a polarity in which the second device terminal T ₂ side is positive and the first device terminal T ₁ side is negative is applied, the pn junction that causes punch through, avalanche breakdown, zener breakdown, etc. In the surge protection device 20 shown in FIG.
The state where the third semiconductor region 23, which is the second pn junction between the first semiconductor region 22 and the fourth semiconductor region 22 and has a reverse bias with the second semiconductor region 22, does not function significantly (shown in FIG. 1). This is equivalent to the case of applying a reverse polarity to the surge absorption target polarity in a device with a structure). As a precaution, punch-through should be used for the yielding phenomenon as in the previous examples,
As for the case of applying a surge having a reverse polarity to the previous one, the second pn junction between the first semiconductor region 21 and the fourth semiconductor region 24 is reverse-biased, and the depletion layer generated by this is the first. It extends not only to the side of the semiconductor region 21 but also to the side of the fifth semiconductor region 25, and eventually when the lower end of the depletion layer reaches the fifth semiconductor region 25, the first semiconductor region 21 and The five semiconductor regions 25 are punched through. In this case, minority carriers for the first semiconductor region 21 are injected into the first semiconductor region 21 from the second semiconductor region 22, and the minority carriers are collected in the fourth semiconductor region 24 and the device current starts to flow. On the other hand, even if the fourth semiconductor region 24 and the fifth semiconductor region 25 are electrically connected to each other on the surface thereof by being commonly connected to the first device terminal T ₁ ,
The voltage value (voltage drop) obtained by multiplying the current value of the element current that increases after starting to flow through the resistance value and the resistance value of the element current along the current path in the fourth semiconductor region 24, When the forward voltage of the rectifying junction formed by the fourth semiconductor region 24 and the fifth semiconductor region 25 (the pn junction in the case of the fifth region 25 is also a semiconductor region) becomes equal to the forward voltage, the fifth semiconductor Injection of minority carriers into the fourth semiconductor region 24 occurs from the region 25 to the fourth semiconductor region 24. Then, the injection of minority carriers into the fourth semiconductor region 24 results in the first,
A positive feedback that leads to a further increase in the device current flowing between the second device terminals T ₁ and T ₂ , which also promotes the injection of minority carriers from the second semiconductor region 22 into the first semiconductor region 21. Cause a phenomenon. Therefore, the voltage-current (VI) characteristic diagram shown in FIG. 11 is drawn in the third quadrant with a symmetrical relationship with respect to the origin, but the positive feedback phenomenon described above will eventually occur. As an indication of what is happening inside the device, the first and second device terminals T ₁ , T
_The voltage across the device that appears between ₂ is the voltage value at the time of starting the breakover. Breakover voltage −V _BO
Lower in absolute value than, more can be initially migrate to a lower clamping voltage -V _P in absolute value than the breakdown voltage -V _BR when starting the punch-through, thereby suppressing heat generation of the element However, it is possible to absorb a large surge current.

However, as described above, the first device terminal T
_{Even in the case of} a surge having a negative polarity on the _1st side, in the process until the forward voltage is applied to the second pn junction composed of the fifth semiconductor region 25 and the fourth semiconductor region 24 in the above mechanism, Since the ohmic electrode 31 has no portion in ohmic contact with the surface of the fourth semiconductor region 24 on the side close to the second semiconductor region 22 when viewed from the fifth semiconductor region 25, the ohmic electrode 31 shown in FIG. Similarly to the hole flow f _H shown in FIG. 5, the direction of the arrow is opposite in this case, but is also indicated by the portion P _O of the surface of the fourth semiconductor region while the lower surface of the fifth semiconductor region 25 is made uniform. It can flow into the first ohmic electrode 31 at a location, and the path of the hole flow f _H can be determined. Therefore, it is possible to similarly enjoy the above-described various effects associated therewith, for example, the effect of improving the controllability and stability of the break over current V _BO and the holding current I _H , and the effect of improving the surge resistance. Further, although the voltage of the applied surge is within a range in which the absolute value is smaller than the breakover voltage −V _BO , the time differential value dV / dt of the voltage is considerably large, so that the voltage is turned on. There is a possibility that a malfunction such as (breakover) may occur, the dimension parameters regarding the second semiconductor region 22 described above are set to those of the fourth semiconductor region 24, and each parameter for the third semiconductor region 23 is newly added. By using those of the semiconductor region 25, it is possible to similarly reduce by satisfying each of the above formulas according to the shape of the fifth semiconductor region. From these things,
The same applies to other considerations regarding the holding current, break-over current and surge withstand capability. The second semiconductor region 22 and the third semiconductor region 23 in the device of the present invention shown in FIG.
Each explanation regarding the fourth semiconductor region 24 is described in FIG.
The description can be applied almost as it is to the fourth semiconductor region 24, the fifth semiconductor region 25, and the second semiconductor region 22 of the device of the present invention shown in FIG.

However, a little different point is that when the bipolar surge absorbing device is adopted like the device 20 of the present invention shown in FIG. 4, the device for unipolar surge absorbing shown in FIG. Since the area of the fourth semiconductor region 24 forming one end side of the main current passage is extremely wide, the fifth semiconductor region 25 that functions effectively during reverse polarity surge must be newly provided therein. That is, the area of the fourth semiconductor region 24 is reduced. Therefore, considering the surge absorption of the same polarity as in the surge protection device 20 for absorbing unipolar surge of FIG. 1, it is expected that the surge withstand capacity will be reduced for the time being.
Therefore, the present inventor has also examined this point,
In fact, it was found that there is a design range that does not cause an extreme decrease compared to surge protection devices for absorbing unipolar surges. FIG. 3 (B) proves this, and as shown in FIG. 4, the dimension in the x direction is x _B , and y is orthogonal to this.
A rectangular fifth semiconductor region 25 having a dimension x _{E in} the x direction and a dimension y _{E in} the y direction in the fourth semiconductor region 24 having a dimension y _B.
As the ratio occupied by the fourth semiconductor region 24 decreases, that is, as the effective area of the remaining fourth semiconductor region 24 increases, even a device for absorbing bipolar surge is saturated toward 80% of the surge withstanding capability of the device for absorbing unipolar surge. However, sufficient surge withstand capability was obtained. On the contrary, even if the area occupied by the fifth semiconductor region 25 in the fourth semiconductor region 24 is increased to about 67%, the surge withstand capability of 30% or more in the case of the unipolar surge absorbing device can be secured. Of course, depending on the required surge tolerance,
Although the area ratio between the fourth and fifth semiconductor regions can be determined, the range could be allowed to be between 0.1 and 0.9 in various prototypes. This also applies to the reverse polarity, so in the surge protection device 20 of the present invention for absorbing bipolar surge, the area ratio of the third semiconductor region in the second semiconductor region 22 is also within the above value range. .

While the usefulness of the present invention has been described above for absorbing unipolar surges and absorbing bipolar surges, other structural modifications that can be adopted in the surge protection device of the present invention are described below. Will be explained. However, as promised above, the constituent elements adopted in each embodiment can be applied unless explicitly stated that they are not applicable in other embodiments, and of course, in each embodiment, as shown in FIG. All the dimensional conditions described with respect to the respective examples are satisfied. In particular, a modification of the device of the invention for bipolar surge absorption also excludes the third semiconductor region in the second semiconductor region or the fifth semiconductor region in the fourth semiconductor region, and because they are. Aside from the necessary additional structural requirements, etc., it can easily be another modified embodiment of the device of the present invention for absorbing unipolar surges. First, the modified constitutional examples shown in FIG. 4 will be explained one by one. Up to now, the first breakdown region has the first semiconductor region 21 and the third region (third semiconductor region) 23.
Punch through between the first semiconductor region 21 and the fifth region (fifth semiconductor region) 25 has been planned. However, as described above, in the surge protection device of the present invention, the initial yield mechanism is a so-called “point phenomenon (local phenomenon)” such as avalanche breakdown and zener breakdown.
It is also possible to use other yielding phenomena called. However, on the other hand, in such a case, in each pn junction formed by the first semiconductor region 21 and the second semiconductor region 22 or the first semiconductor region 21 and the fourth semiconductor region 24, a reverse bias is applied depending on the polarity of the applied surge. Usually, the place where the breakdown starts at the pn junction on the side where the electric field is formed or the place where the electric field is concentrated even after the breakdown tends to be local. Therefore,
When such a breakdown principle is intentionally adopted, in order to reduce the local concentration phenomenon of the current, as shown by the phantom line in FIG. 4, the second and fourth semiconductor regions 22, 24 and A plurality of high-concentration impurity regions (and therefore n ⁺ regions) 41, ... Of the same conductivity type as the first semiconductor region are formed by appropriate patterns in a plurality of contact area regions with one semiconductor region 21. Just do it. In this way, even if avalanche breakdown begins to occur at the corners or edges of each of the high-concentration impurity regions 41, ... It is possible to increase the number according to the number of the high-concentration impurity regions 41, ..., From which, it is possible to start flowing the device current associated with the breakdown all at once. As a result, stabilization of electrical characteristics such as surge resistance can be obtained.

On the contrary, essentially when the punch-through is used for the first breakdown mechanism, the first semiconductor region 21 and the first and second semiconductor regions 22, 24 are formed. In the second pn junction portion, if an unexpected avalanche breakdown occurs relatively early in a so-called corner portion of either one of the pn junctions depending on the polarity of the applied surge, the operation greatly increases. It is inconvenient. Therefore,
In order to prevent or suppress this, reference numerals 33 and 3 in FIG.
As shown by 4 respectively, in the ohmic electrode 32 that makes ohmic contact in common with the second semiconductor region 22 and the third semiconductor region 23, the second semiconductor region 22 that appears on the main surface of the first semiconductor region 21 Of the second semiconductor region 22 beyond the boundary of the pn junction of the first semiconductor region 21 and the fourth semiconductor region 24.
In the ohmic electrode 31 which makes ohmic contact with the fifth semiconductor region 25 in common, the fourth semiconductor region is crossed beyond the boundary portion of the pn junction with the fourth semiconductor region 24 which appears on the main surface of the first semiconductor region 21. It is preferable to provide a portion 33 that extends from 24 to above the first semiconductor region 21. Insulating films 51 are respectively interposed between these overhanging portions 33 and 34 and the main surface of the first semiconductor region 21, and such overhanging portions 33 and 34 become so-called field plates 33 and 34, and in particular, The first semiconductor region 21 and the second,
It has a function of alleviating the concentration of the electric field at each corner of each pn junction formed by the fourth semiconductor regions 22 and 24. Therefore, this is effective in the sense of avoiding unexpected avalanche yielding at the corner when using punch-through for the initial yielding phenomenon, but it also reduces current concentration when using the avalanche yielding principle. Effective above. In particular, when avalanche breakdown at a plurality of locations is intended, such as by providing a plurality of high-concentration impurity regions 41, ... (Imaginary line in FIG. 4) as described above, the other It is possible to prevent premature yielding only at the pn junction corner, not at the expected yield point.

For the same purpose, instead of or in addition to the field plates 33, 34 as described above, as indicated by phantom areas 61, 62 in FIG. It is also a good consideration to provide guard rings 61, 62 around the second semiconductor region 22 and the fourth semiconductor region 24, which are of the same conductivity type as those of them but are not in contact with them. This, of course, has a function of relaxing the electric field, and has an effect of suppressing local breakdown near each pn junction corner.

Regarding the plane shape of the fifth semiconductor region, various embodiments have been described with reference to FIG. 2 regarding the embodiment which is also configured to absorb unipolar surges. The surge protection device of the present invention for absorbing surge can also be applied to either or both of the third semiconductor region 23 and the fifth semiconductor region. Usually, since symmetry of characteristics is required, it is preferable that the third and fifth semiconductor regions 23, 25 also have a line-symmetrical plane shape with respect to a dividing line passing through the center of the distance between them. However, with regard to these plane shapes, the meaning of the expression recognized in the essential constitution of the present invention can be understood by further adding the explanation as shown in FIG. FIG. 5 shows an embodiment of the surge protection device of the present invention configured to absorb bipolar surge. First, the lower half of FIG. 5 which is a cross section along one in-plane direction is focused. Then, in the second semiconductor region 22, two third semiconductor regions 2 separated from each other are formed.
3 and 23, and likewise, in the fourth semiconductor region 24, two fifth semiconductor regions 25, 2 in this cross section.
There is 5. Therefore, the edge portions 23E1 and 23E2 facing the fourth semiconductor region 24 can be defined for each of the third semiconductor regions 23 and 23 in the second semiconductor region 24. However, such edge 2
Even in 3E1 and 23E2, if the edge portion is closest to the fourth semiconductor region 24, it is only the edge portion 23E1 located on the right hand side in the drawing. Therefore, in accordance with the gist of the present invention, at least the edge closest to the fourth region, out of the edges of the third region facing the fourth region in the x direction (the cross-sectional direction in the drawing), should be provided. According to the constituent requirement that there is no portion that contacts the surface of the second semiconductor region,
Also in this embodiment, the second ohmic electrode 32 does not have a portion that contacts the surface of the second semiconductor region 22 beyond the edge portion 23E1. In exactly the same manner, the two fifth semiconductor regions 2 in the fourth semiconductor region 24 in the cross section shown in the figure are shown.
Regarding 5 and 25, among the edge portions 25E1 and 25E2 facing the second semiconductor region 22, the edge portion closest to the second semiconductor region 22 is only the edge portion 25E1, and the first ohmic electrode 31 has the edge portion 25E1. Beyond the fourth semiconductor region 24
It has no contact with the surface of.

Further, as is recognized in the constitution of the present invention, the expression of at least two third regions or fifth regions in one in-plane direction (x direction) is shown in the upper half of FIG. This means that the planar shapes of the third semiconductor region 23 and the fifth semiconductor region 25 are allowed. That is, both the third semiconductor region 23 and the fifth semiconductor region 25 have a planar shape, in this case, a frame shape. In other words, in the y direction orthogonal to the x direction, the end portions of the two regions, which are two regions in the cross section along the x direction, are connected to each other by the connecting portions 23C, 23C; 25C, 25C. Even if this is the case, it is clear from the mechanism described above that the object of the present invention can be achieved.
Proceeding further, according to such a structure, the second and first ohmic electrodes 3 shown by phantom lines in FIG.
2, 31 are the second semiconductor region 22 and the fourth semiconductor region only through the openings in the respective frames of the third and fifth semiconductor regions 23 and 25, which are actually frame-shaped in plan view. Since it is in contact with 24, it is possible to prevent the current from sneaking through the ends in the y direction, or the current from flowing out from the ends in accordance with the inversion of the conductivity type of each region. If there is a current sneak through the end (or vice versa), the designability may be deteriorated and the surge withstand capability may be reduced. In view of this, in the cross-sectional structure shown in the lower half of FIG. 5, the third semiconductor region 23 on the side far from the fourth semiconductor region 24 has been described so far, as indicated by the numeral 26 in parentheses in the drawing. The second semiconductor region 22 may be a simple current protection region 26 having no function of the third semiconductor region 23 (that is, no dimensional limitation according to each aspect of the present invention). Regarding the distant fifth semiconductor region 25, this may similarly be configured as a simple current protection region 26.

The plane shape of the second ohmic electrode 32 and the plane shape of the first ohmic electrode 31 are shown differently in the drawing. The second ohmic electrode 32 has both y-direction end portions mounted on the y-direction end portion connection portion 23C of the third semiconductor region 23 described above, whereas both end portions of the first ohmic electrode 31 are the second semiconductor region. 25 y
It is separated from the direction end connecting portion 25C. For convenience of explanation, this is shown all over for convenience of explanation. In practice, either one is selected and the first and second ohmic electrodes 3 are selected.
It is preferable that both 1 and 32 have the same shape. Further, the planar shapes of the third semiconductor region 23 and the fifth semiconductor region 25 are
In addition to the rectangular frame shape shown in FIG. 5, a donut shape or any other frame shape can be converted. This is clear from the discussion with FIG. Furthermore, for example, in the plane shape shown in the upper half of FIG. 5, the number of internal openings is the direction in which the second and fourth semiconductor regions are arranged in parallel (x direction).
5, the number of the third semiconductor regions 23 and the fifth semiconductor regions 25 becomes three in the cross section along the x direction shown in the lower half of FIG. 5, and so on. With the increase in the number of the third to fifth semiconductor regions, the number of the third to fifth semiconductor regions is one more than that in the sectional structure. Even in such a case, the fourth semiconductor region 24 in the third region 23
There is only one edge closest to the second semiconductor region 22 in the fifth region 25. However, conversely from the definition of the structure of the present invention, regarding each of the second and first ohmic electrodes 32 and 31, an edge portion other than the at least the closest edge portion (for example, edge portions 23E2 and 25E2 in FIG. 5). ), Whether or not there is a portion beyond this that contacts the second semiconductor region 22 and the fourth semiconductor region 24 can be left to the design at that time. The various explanations given with reference to FIG. 5 also apply to the surge protection device configured for absorbing unipolar surges according to the present invention as described with reference to FIG. 3 (A). The description regarding the three semiconductor regions 23 and the second ohmic electrode 32 can be applied as they are.

Next, consider integration. In each of the above embodiments, the surge protection device 20 of the present invention has, as it were, a unit structure. However, as a matter of course, a plurality of surge protection device structures of the present invention shown in FIGS. 1 and 4 can be arranged and integrated side by side using the first semiconductor region 21 as a common first semiconductor region. It is possible.
Taking the case of absorbing unipolar surge as an example, there is a structure as shown in FIG. 6, for example, and a plurality of fourth semiconductor regions 24 ...
Each of the first device terminals T ₁ connected to the respective first ohmic electrodes 31 of ... Are connected in parallel, and each of the second and third semiconductor regions 22 and 23 corresponding to each of the fourth semiconductor regions is provided. If all the second ohmic electrodes 32 that are in ohmic contact with each other are connected in parallel via their second device terminals T ₂ , a surge protection device capable of absorbing a large current can be constructed, and as a result, a common single substrate It is also possible to build a plurality of surge protection devices on top of which each can operate independently. In that case, an element isolation region indicated by a virtual line 70 (including mechanical grooving) may be formed between adjacent device structures, if necessary.

On the other hand, as described above, simply as shown in FIGS.
By substituting the structure shown in (1) by appropriately separating it along one main surface of the first semiconductor region 21,
It is also possible to obtain the following structure. FIG. 7 shows a modified example of the surge protection device of the present invention constructed for absorbing unipolar surge, which is formed on one main surface of the first semiconductor region 21 on both sides of the fourth semiconductor region 24. To
A pair of second semiconductor regions 22 _-1 , 2 are appropriately spaced from each other.
2 _-2 are provided in each of which the third semiconductor region ₂ is provided.
3 _-1 , 23 _-2 are formed so that the pair of second semiconductor regions 22 _-1 , 22 _-2 and the corresponding third semiconductor regions 23 _-1 , 23 _-2 are in ohmic contact in common. One second ohmic electrode for each (32 _-1 , 32
_-2 ) _Providing the second device terminals T _2-1 and T 2 to each of them
_{If 2-2} is provided, the two second ohmic electrodes T are provided.
_2-1 and T _2-2 and each of the first ohmic electrode 31 or the first device terminal T ₁ which makes ohmic contact with the fourth semiconductor region 24 by the mechanism already described,
It is possible to absorb the surge of a predetermined polarity. Therefore, a plurality of such structures may be provided on the one main surface of the first semiconductor region 24 while being appropriately separated in the lateral direction, and if necessary, while forming the above-described element isolation region and the like. it can. Of course, each of the second ohmic electrodes 32 _-1 , 32 _-2 has a third semiconductor region 23 in the direction toward the fourth semiconductor region 24.
_-1 , 23 _{-2 on} the surface of which an ohmic contact edge P _i ,
It does not have a portion that stays at P _i and touches the surface of the second semiconductor regions 22 _-1 , 22 _-2 even beyond the boundary between the second and third semiconductor regions 22, 23. Further, as indicated by imaginary lines 24 _-1 , 24 _-2 in the fourth semiconductor region, even if there are a pair of fourth semiconductor regions 24 and they are commonly connected to the first ohmic electrode 31. good. In this case, one of the fourth semiconductor regions 24 _{-1 forms} a pair with the second semiconductor region 22 _-1 and the third semiconductor region 23 _-1 on the left side of the drawing, and the other of the fourth semiconductor regions 24 _-1 . The four semiconductor regions 24 _-2 form a pair with the second semiconductor region 22 _-2 and the third semiconductor region 23 _-2 on the right side of the figure. The first ohmic electrode 31 may directly make ohmic contact with the main surface of the first semiconductor region 21 between the pair of fourth semiconductor regions 24 _-1 , 24 _-2. , First
As described in the section of the description of the conventional example shown in FIG. 3, as one of the existing methods, a means for preventing the response to the “small surge” is also used. Of course, in the present invention, as described above, the problem of erroneous response to this “small surge” is solved, and therefore, as described above, the first semiconductor region 21
If there is no need for ohmic contact with the first semiconductor region 21 between the pair of fourth semiconductor regions 24 _-1 , 24 _-2.
The first ohmic electrode 31 may extend over the insulating film formed on the main surface of the.

In FIG. 8, a set of a fourth semiconductor region 24 and a fifth semiconductor region 25, and a set of a second semiconductor region 22 and a third semiconductor region 23 are provided on the main surface of the first semiconductor region 21, respectively. A plurality of the fifth semiconductor regions 25 in the fourth semiconductor regions 24 of each set are alternately provided along the x direction, and each of the fifth semiconductor regions 25 is composed of a pair of spaced apart regions. The inner third semiconductor region 23 is also composed of a pair of spaced regions. Then, the second device terminal T
₂ is a second semiconductor region 22 and a pair of third semiconductor regions 2
The second semiconductor region 2 in each set of 3, 23
2 and the second ohmic electrode 32 that makes ohmic contact in common with the pair of third semiconductor regions 23, 23,
The first device terminal T ₁ is connected to all of them in common, and the first device terminal T ₁ is connected to the fourth semiconductor region 24 and the pair of fifth semiconductor regions 25 and 25 in each set. The first ohmic electrode 31 which makes ohmic contact with the fifth semiconductor regions 25, 25 in common is connected to all of them. With this configuration, bipolar surges can be absorbed, and a large current surge can be absorbed by the parallel effect. That is, the second semiconductor region 22 and the fourth semiconductor region 2 which are adjacent to each other
4 is considered, the pair of third semiconductor regions 23, 23 and fifth semiconductor regions 25, 25 in each of the regions 22, 24 are considered.
Among them, those adjacent to each other provide a configuration substantially similar to that of the device of the present invention for bipolar surge absorption whose basic configuration is shown in FIG. The other third semiconductor region 23
The fifth semiconductor region 25 and the fifth semiconductor region 25 form a set with the fourth semiconductor region 24 and the second semiconductor region 22 that are adjacent to each other on the opposite side to form a configuration similar to that shown in FIG. Therefore, first,
Looking at the second ohmic electrodes 31 and 32 as a whole,
If the illustrated cross section is taken as a cross section along the x-direction, the second semiconductor region 22 and the third semiconductor region 23 are provided on both sides in the same x-direction, as indicated by symbols P _i and P _i .
Contacting the surface of the second semiconductor region 22 beyond the boundary of the fourth semiconductor region 24 and contacting the surface of the fourth semiconductor region 24 beyond the boundary between the fourth semiconductor region 24 and the fifth semiconductor region 25. Only between the pair of third semiconductor regions 23, 23 and the pair of fifth semiconductor regions 25, 25 are in ohmic contact with the surfaces of the second semiconductor region 22 and the fourth semiconductor region 24. This is as if the two basic configurations shown in FIG. 4 were reversed and the second semiconductor region 22 or the fourth semiconductor region 24 facing each other was brought closer to each other, and the two were arranged in the lateral direction as a common region. It corresponds to the case of connecting to. In other words, in the structure shown in FIG. 8, the ohmic contact portion P _O shown at the center is
This corresponds to the portion P _O in the unit surge protection device structure shown in FIG. Therefore, the above (1)
When using the formula (13) to obtain desired results for the problem of incorrect response to “small surge”, breakover current V _BO , holding current, surge withstanding capability, etc. As shown in FIG. 8, the x-direction dimension x _E is considered only for one of the third semiconductor region 23 and the fifth semiconductor region 25, and the second semiconductor region 22 and the Four semiconductor regions 24
As for the dimension in the x direction, the half dimension shown in the figure will be the previous x direction dimension x _B.

Similarly, a set in which a pair of third semiconductor regions 23, 23 are provided in the second semiconductor region 22 and the fourth semiconductor region 2 are provided.
Even if a plurality of sets each including a pair of fifth semiconductor regions 25, 25 in FIG. 4 are alternately arranged on one main surface of the first semiconductor region 21 with a proper interval, as shown in FIG. As described above, for example, two sets of these are used, and among the two first device terminals T ₁ and T ₁ in ohmic contact with the two fourth semiconductor regions 24 and each pair of fifth semiconductor regions 25 and 25, The first device terminal T ₁ which makes ohmic contact with the fourth semiconductor region 24 and the pair of fifth semiconductor regions 25, 25 of the set located on the inner side in the juxtaposed direction of each set is taken out as an independent terminal T _A. , Two second semiconductor regions 24
And a total of two second device terminals T ₂ and T ₂ in contact with each pair of third semiconductor regions 23, 23, which is also the second group of the second group located on the inner side in the juxtaposed direction of each group. Semiconductor region 2
The second device terminal T ₂ that makes ohmic contact with the second semiconductor pair 23 and the pair of third semiconductor regions 23, 23 is taken out as an independent terminal T _B , while the remaining first device terminals T ₂ are positioned outside in the juxtaposed direction. If the device terminal T ₁ and the second device terminal T ₂ are commonly connected and newly taken out as the third terminal T _C, as is often seen in this kind of field, as a delta connection circuit, typically one It is possible to construct a three-terminal type surge protection device that can entrust the communication line. That is, a so-called common mode surge applied between each of a pair of lines forming one communication line and the ground, and a so-called normal mode surge applied between a pair of lines.
It is possible to obtain a device that can equally protect against both surges. If this were to serve the same purpose only with a basic two-terminal surge protection device capable of absorbing bipolar surges, then three such elements would be required. However, when used as such a delta connection circuit, the fourth semiconductor region 24
And a pair of fifth semiconductor regions 25, 25, and the second semiconductor region 22 and the pair of third semiconductor regions 2
In the group located outside in the juxtaposed direction among the groups consisting of 3 and 23, instead of using the pair of fifth semiconductor regions 25 and 25 and the pair of third semiconductor regions 23 and 23, one group each is formed. Fifth semiconductor region 25 and third semiconductor region 2
3 can be used. The third semiconductor region and the fifth semiconductor region, which can be omitted, are denoted by virtual line symbols 23 'or 25' in FIG.

[0065]

INDUSTRIAL APPLICABILITY According to the present invention, it is possible to provide a suitable surge protection device for both unipolar surge absorption and bipolar surge absorption. As a result of being able to control or determine the current path of the device current up to the overshoot, good results can be obtained regarding the controllability and stability of the breakover current and the holding current, and the surge withstand capability is also improved. Further, according to one aspect of the present invention, even if the peak value of the voltage is small, the time differential value of the voltage is large, so that an erroneous response that would break over in the conventional structure is effective. Can be prevented. In this regard, an electrode structure that is in contact with the first semiconductor region on the region side opposite to the breakdown operation side, as is recognized in the conventional structure as a countermeasure against such "small surge". However, since it is not essential in the present invention, it is also possible to secure a reverse breakdown voltage as a device with respect to a voltage having a polarity opposite to that of the surge to be absorbed.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a principle structure or a basic embodiment of a surge protection device for absorbing unipolar surge configured according to the present invention.

FIG. 2 is an explanatory diagram of how to attach an ohmic electrode when the third semiconductor region has various planar shapes.

FIG. 3 shows the tendency of the relationship between the surge ratio and the area ratio of the third semiconductor region in the second semiconductor region in the surge protection device of the present invention configured for absorbing unipolar surge, and for absorbing bipolar surge. In the surge protection device of the present invention configured as a relationship between the effective residual area ratio of the fourth semiconductor region and the surge withstand capacity, and an explanatory diagram showing the tendency of the surge withstand capacity for the surge protection device for unipolar surge absorption. is there.

FIG. 4 is a schematic diagram of the principle structure or basic embodiment of a surge protection device for absorbing bipolar surges constructed according to the present invention.

FIG. 5 is an explanatory diagram of a case where the third semiconductor region and the fifth semiconductor region have a frame shape when seen in a plan view.

FIG. 6 is a schematic configuration diagram of an embodiment modified to a structure suitable for large current absorption based on the basic embodiment configuration of the present invention configured for absorbing unipolar surge.

FIG. 7 is a schematic configuration diagram of still another embodiment modified based on the basic embodiment configuration of the present invention configured to absorb unipolar surge.

FIG. 8 is a schematic block diagram of an embodiment modified as an example of a parallel configuration based on the basic embodiment of the present invention configured for bipolar surge absorption.

FIG. 9 is a schematic configuration diagram of an embodiment of the present invention having a configuration suitable for surge protection as a so-called delta connection circuit.

FIG. 10 is a principle configuration diagram of a conventional surge protection device configured for absorbing unipolar surge.

FIG. 11 is a characteristic diagram regarding surge absorption of a conventional surge protection device.

FIG. 12 is an explanatory diagram for explaining a problem that has occurred in the conventional surge protection device.

FIG. 13 is a schematic configuration diagram of a conventional surge protection device having a device for preventing an erroneous response to a small surge.

[Explanation of symbols]

20 Surge Protective Device of the Present Invention 21 First Semiconductor Region 22 Second Semiconductor Region 23 Third Semiconductor Region 24 Fourth Semiconductor Region 25 Fifth Semiconductor Region 31 First Ohmic Electrode 32 Second Ohmic Electrode 33 Field Plate 34 Field Plate 51 Insulating film 61 Guard ring 62 Guard ring T ₁ First device terminal T ₂ Second device terminal P _i Edge part of ohmic contact remaining on the surface of the third semiconductor region or the fifth semiconductor region f _H Hole flow

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Masaaki Sato Inventor Masaaki Sato 4-3-8 Osaki, Shinagawa-ku, Tokyo Inside Sankosha Co., Ltd. Masao Inoue Examiner, Cosmos Electric Co., Ltd.

Claims (26)

[Claims] 1. A second semiconductor layer provided on one main surface side of the first semiconductor region and having a conductivity type opposite to the conductivity type of the first semiconductor region and forming a pn junction with the first semiconductor region. The semiconductor region and the first semiconductor region are in contact with the second semiconductor region from opposite sides, and minority carriers for the second semiconductor region can be injected into the second semiconductor region,
At least in one cross section along one in-plane direction, at least one third region consisting of N pieces, and in the plane of the one main face of the first semiconductor region, which is orthogonal to each other on the one main face side. A fourth device which is provided in a position apart from the second semiconductor region along the x direction in both the x and y directions and which can inject minority carriers for the first semiconductor region into the first semiconductor region. A first ohmic electrode having a region, which is in ohmic contact with the fourth region and is connected to the first device terminal, and is in ohmic contact with the second semiconductor region and the third region in common and second When a surge having a voltage equal to or higher than the breakdown voltage is applied with a polarity that reverse-biases the pn junction between the first ohmic electrode and the second ohmic electrode connected to the device terminal, the breakdown occurs between the first and second device terminals. Absorbs surge current With the start, after the breakdown, the absorption due to the synergistic effect of the injection of the minority carriers from the fourth region to the first semiconductor region and the injection of the minority carriers from the third region to the second semiconductor region, When the magnitude of the surge current that has started to rise exceeds the breakover current, it breaks through the positive feedback phenomenon and shifts to a clamp voltage that is relatively low in absolute value between the first and second device terminals. A two-terminal break-over type surge protection device that continues to absorb the surge current while the second ohmic electrode is in ohmic contact with the second semiconductor region and the third region in common.
A portion of the peripheral portion of the third region which faces the fourth region when viewed in the x direction and which contacts the surface of the second semiconductor region beyond at least the edge closest to the fourth region. A surge protection device characterized by having no. 2. The device according to claim 1, wherein ρ
_B is the sheet resistance of the second semiconductor region in the portion between the first and third regions, V _f is the voltage for forward biasing the third region, C _O is the junction capacitance per unit area of the pn junction, and dV / The x-direction dimension x _{E of} the third region is expressed as the sharpness of the rising edge of the surge that is not desired to respond to dt. A device characterized by being defined based on. 3. A device according to claim 2; the above x dimension x _E of the third region, the maximum holding current value I _Hmax acceptable range capable of maintaining a state in which the break-over On the other hand, with S _B as the area of the second semiconductor region, The device characterized by satisfying 4. The device according to claim 2, wherein the dimension x _E in the x direction of the third region is the minimum holding current value I _Hmin required to maintain the breakover state _. On the other hand, with S _B as the area of the second semiconductor region, The device characterized by satisfying 5. The device according to claim 2, 3 or 4, wherein among the minority carriers injected from the fourth region, the above formula ( 1) [Formula 4] Instead of the above, the third region x direction dimension x _E is A device characterized by being defined based on. 6. The device according to claim 2, 3, 4 or 5, wherein the third region has a rectangular or substantially rectangular planar shape with short sides and long sides; the x-direction dimension x. _E
Is the dimension in the short side direction; the second ohmic electrode is the long side of the pair of the long sides of the rectangular third region which is closer to the fourth region at least in the x direction. A device which has no contact portion over the surface of the second semiconductor region. 7. The device according to claim 2, 3, 4 or 5, wherein the third region has a circular or substantially circular shape; the x-direction dimension x _E is the circular or substantially circular shape. A diameter of or about the diameter of the third region; the second ohmic electrode is a straight line in the y-direction orthogonal to the x-direction and passing through the center or substantially the center of the circular or substantially circular third region. Of the pair of halved semicircles or nearly semicircles, there is no portion that contacts the surface of the second semiconductor region beyond the periphery of the semicircle on the side closer to the fourth region when viewed in the x direction. A device characterized by; 8. The device according to claim 2, 3, 4 or 5, wherein the third region is a regular polygon or a substantially regular polygon; the x-direction dimension x _E is the regular polygon or A width dimension passing through or approximately through the center of the substantially regular polygonal third region; the second ohmic electrode being orthogonal to the x-direction, the second region of the regular polygonal or substantially regular polygonal third region being Of the area portion divided by the straight line in the y direction passing through the center or substantially the center, the surface portion of the second semiconductor region is contacted beyond the peripheral edge of the area portion on the side closer to the fourth region when viewed in the x direction. Even if it has no portion and is in the area portion on the side far from the fourth region when viewed in the x direction, it contacts the surface of the second semiconductor region beyond the edge portion facing the fourth region. A device having no parts; 9. A device according to claim 2, 3, 4 or 5, wherein the third region comprises at least two spaced regions in a cross section along the x direction.
The at least two spaced regions are connected to each other at their ends in a direction orthogonal to the x direction; the second ohmic electrode is in the at least two spaced third regions, the fourth A device having no portion in contact with the surface of the second semiconductor region beyond the edge facing the fourth region at the peripheral edge of the third region closer to the region. 10. The device according to claim 9, wherein:
Instead of the third region being composed of at least two spaced regions in one cross section along the x direction, the side closest to the fourth region among the at least two spaced regions is Except for the above, the other region is a protective region for preventing the current from flowing into or flowing out from the end of the second ohmic electrode in the direction orthogonal to the x direction; Device characterized by. 11. Claims 1, 2, 3, 4, 5, 6, 7,
8. The device according to 8, 9, or 10, wherein the one main surface of the first semiconductor region is separated from the second semiconductor region on both sides of the fourth region along the x direction. There is at least one portion provided with a pair of the third regions, one pair in total; the second device terminals are each second semiconductor in each set of the second semiconductor region and the third region. A device which is commonly connected to all of the second ohmic electrodes which are in ohmic contact with the region and the third region in common. 12. The method according to claim 1, 2, 3, 4, 5, 6, 7,
8. The device according to 8, 9, or 10, wherein a plurality of the fourth regions, a plurality of the second semiconductor regions, and a set of the third regions are provided on the one main surface of the first semiconductor region. However, there are at least one or more portions alternately provided along the x direction; the second device terminal is a second semiconductor region and a third semiconductor region in each set of the second semiconductor region and the third region. Commonly connected to each of the second ohmic electrodes in ohmic contact with the region; the first device terminal commonly connected to all of the first ohmic electrodes in ohmic contact with the fourth regions. A device characterized by: 13. A first pn junction is formed on one main surface side of the first semiconductor region, and has a conductivity type opposite to that of the first semiconductor region and forms a first pn junction with the first semiconductor region. The second semiconductor region and the first semiconductor region are in contact with the second semiconductor region from opposite sides, and minority carriers for the second semiconductor region can be injected into the second semiconductor region, At least in one cross section along one in-plane direction, at least one third region consisting of N pieces, and in the plane of the one main face of the first semiconductor region, which is orthogonal to each other on the one main face side. It is provided at a position apart from the second semiconductor region along the x direction in both x and y directions, and has a conductivity type opposite to the conductivity type of the first semiconductor region and between the first semiconductor region and the second semiconductor region. A fourth semiconductor region forming a second pn junction, and the first semiconductor region Is in contact with the fourth semiconductor region from the opposite side, minority carriers for the fourth semiconductor region can be injected into the fourth semiconductor region, and at least in the one cross section along one in-plane direction. A first ohmic electrode having a fifth region consisting of one or more number M and making ohmic contact in common with the fourth semiconductor region and the fifth region and connected to a first device terminal; Polarity for reverse biasing the first or second pn junction between the second semiconductor region and the third region and a second ohmic electrode connected to the second device terminal in common ohmic contact. When a surge having a voltage equal to or higher than the breakdown voltage is applied, the semiconductor device starts to absorb a surge current between the first and second device terminals, and after the breakdown, the fourth semiconductor region to the first semiconductor region. Injection of the minority carriers to the, and a synergistic effect of injection of the minority carriers from the third region to the second semiconductor region, or injection of the minority carriers from the second semiconductor region to the first semiconductor region. , Due to the synergistic effect of the injection of the minority carriers from the fifth region to the fourth semiconductor region, the magnitude of the surge current that begins to be absorbed breaks.
When the current exceeds the over current, a break occurs via the positive feedback phenomenon.
A two-terminal break-over type surge protection device for bipolar surge absorption, which continues to absorb the surge current while shifting between the pair of device terminals to a clamp voltage of a relatively low voltage in absolute value; The second ohmic electrode that makes ohmic contact with the second semiconductor region and the third region in common has an edge portion facing the fourth semiconductor region when viewed in the x direction at a peripheral portion of the third region. No at least a portion that contacts the surface of the second semiconductor region beyond at least the edge closest to the fourth semiconductor region;
The first ohmic electrode that makes ohmic contact with the fourth semiconductor region and the fifth region in common has an edge portion facing the second semiconductor region when viewed in the x direction at a peripheral portion of the fifth region. A surge protection device having at least no portion that contacts the surface of the fourth semiconductor region beyond at least the edge closest to the second semiconductor region. 14. The device according to claim 13, wherein ρ _B is a sheet resistance of the second semiconductor region in the portion between the first and third regions or a value in the portion between the first and fifth regions. 4 sheet resistance of the semiconductor region, V _f is a voltage for forward biasing the third region or forward biasing for the fifth region, C _O is a junction capacitance per unit area of the first pn junction or the second junction capacitance per unit area of the pn junction, dV / dt surge rising sharpness you do not want to respond to more, as said above x dimension x _E of the third region or the fifth region, Equation 6] A device characterized by being defined based on. 15. The device of claim 14, wherein the x-direction dimension x _{E of} the third region or fifth region.
_Where S _B is the area of the second semiconductor region or the area of the fourth semiconductor region with respect to the maximum holding current value I _Hmax that can be tolerated within the range in which the break-over state can be maintained. The device characterized by satisfying 16. The device according to claim 14 or 15, wherein the x-direction dimension x _E of the third or fifth region is the minimum retention required to maintain the breakover condition. Let S _{B be} the area of the second semiconductor region or the area of the fourth semiconductor region with respect to the current value I _Hmin. The device characterized by satisfying 17. The device according to claim 14, 15 or 16, wherein in the minority carriers injected from the fourth semiconductor region, the quantity ratio β reaching the second semiconductor region or the second semiconductor region. Among the minority carriers injected from, depending on the amount ratio β reaching the fourth semiconductor region,
(6) [Equation 9] Instead of, the dimension x _{E in the} x direction of the third region or the fifth region is A device characterized by being defined based on. 18. The device according to claim 14, 15, 16 or 17, wherein the numbers N and M are equal, and the shapes and the areas S of the second semiconductor region and the fourth semiconductor region are the same. _{B is} also the same, and the x-direction dimension x _E and the y-direction dimension y _{E of} the third region and the fifth region are also the same. 19. The device according to claim 14, 15, 16, 17 or 18, wherein the third region or the fifth region has a rectangular or substantially rectangular planar shape having short sides and long sides. The dimension in the x direction x _E is the dimension in the direction of the short side; The first ohmic electrode has no part that contacts the surface of the second semiconductor region beyond the long side close to the four semiconductor regions; , A device having no portion contacting on the surface of the fourth semiconductor region beyond at least the long side closer to the second semiconductor region when viewed in the x direction. 20. The device according to claim 14, 15, 16, 17 or 18, wherein said third region or said fifth region has a circular or substantially circular shape; said x
The directional dimension x _E is the diameter or the dimension of the diameter of the third region or the fifth region of the circular or substantially circular shape; and the second ohmic electrode is orthogonal to the x direction and has a circular or substantially circular shape. The above y passing through the center or almost the center of the three regions
In a pair of semi-circles or almost semi-circles that are bisected by straight lines
The first ohmic electrode is orthogonal to the x direction, and does not have a portion that contacts the surface of the second semiconductor region beyond the periphery of the semicircle near the fourth semiconductor region when viewed in the x direction; In the pair of semicircles or approximately semicircles bisected by the straight line in the y direction passing through the center or substantially the center of the circular or substantially circular fifth region, close to the second semiconductor region when viewed in the x direction. A device that has no portion that contacts the surface of the fourth semiconductor region beyond the peripheral edge of the side semicircle. 21. The device according to claim 14, 15, 16, 17 or 18, wherein said third region or said fifth region is a regular polygon or a substantially regular polygon; said x-direction dimension x. _E is a width dimension passing through the center or substantially the center of the third region or the fifth region of the regular polygon or the substantially regular polygon; the second ohmic electrode is orthogonal to the x direction, and the regular polygon is Or, in the area portion divided by the straight line in the y direction passing through the center or substantially the center of the substantially regular polygonal third region, the peripheral edge of the area portion on the side closer to the fourth semiconductor region in the x direction is defined. An edge facing the fourth semiconductor region even if it does not have a portion beyond and in contact with the surface of the second semiconductor region and is in an area portion on the side far from the fourth semiconductor region when viewed in the x direction. A portion that contacts the surface of the second semiconductor region The first ohmic electrode is orthogonal to the x-direction, and in the area divided by the straight line in the y-direction passing through the center or substantially the center of the fifth region of the regular polygon or substantially regular polygon, The second semiconductor region does not have a portion that contacts the surface of the fourth semiconductor region beyond the periphery of the area portion on the side closer to the second semiconductor region when viewed in the x direction, and the second semiconductor region when viewed in the x direction. A device having no area contacting the surface of the fourth semiconductor region beyond the edge portion facing the second semiconductor region even in the area portion on the far side. 22. A device according to claim 14, 15, 16, 17 or 18, wherein the third region is the x
It is composed of at least two spaced regions in one cross section along the direction, the at least two spaced regions,
The ends thereof are connected to each other in a direction orthogonal to the x direction; the second ohmic electrode is a third region of the at least two spaced apart third regions closer to the fourth semiconductor region. Has no portion in contact with the surface of the second semiconductor region beyond the edge facing the fourth semiconductor region at the periphery of the fifth region; and the fifth region has at least two in a cross section along the x direction. The at least two spaced apart regions are connected to each other at their ends in a direction orthogonal to the x direction; the first ohmic electrode comprises the at least two spaced apart fifth regions. In the region, the peripheral portion of the fifth region closer to the second semiconductor region does not have a portion that contacts the surface of the fourth semiconductor region beyond the edge portion facing the second semiconductor region; Special Devices that. 23. The device of claim 22, wherein the third region comprises at least two spaced apart regions in a cross section along the x direction, the at least two spaced apart regions. In the other regions, other than the side closest to the fourth semiconductor region, the current wraps around the end portion of the second ohmic electrode in the direction orthogonal to the x direction and the end portion. And the third region is also composed of at least two separated regions in one cross section along the x direction, instead of the at least two separated regions. Of the separated regions, the other regions except the side closest to the fourth semiconductor region are sneaked by a current or the end of the current with respect to the end portion of the first ohmic electrode in the direction orthogonal to the x direction. From the department The device is a protective area for preventing the outflow of electric current of the device. 24. Claims 13, 14, 15, 16, 1
7. The device according to 7, 18, 19, 20, 21, 22, or 23; on the one main surface of the first semiconductor region, a set of the fourth semiconductor region and the fifth region,
The second semiconductor region and the third region each have a plurality of sets, and at least one or more portions are provided alternately along the x direction; the fifth region in the fourth semiconductor region of each set. At least in one cross section along the in-plane one direction, is composed of two regions that are separated; the third region in the second semiconductor region of each set also at least in one cross section along the in-plane one direction The second device terminal comprises a second semiconductor region and a pair of third regions in each set consisting of the second semiconductor region and the pair of third regions. To each of the second ohmic electrodes in common ohmic contact with all of them; the first device terminal is in each set consisting of the fourth semiconductor region and the pair of fifth regions. The fourth semiconductor For each of the first ohmic electrode in ohmic contact with both the and region and the pair of fifth region,
A device characterized by being connected in common to all of them. 25. The device according to claim 24; two sets each of the fourth semiconductor region and fifth region set and the second semiconductor region and third region set are used. And a pair of the fifth semiconductor regions and the pair of the fifth semiconductor regions are arranged in parallel on the one main surface of the first semiconductor region. For each of the first ohmic electrodes that are in ohmic contact with the fourth semiconductor region and the pair of fifth regions in common in the set, instead of being commonly connected to all of them, the middle side in the juxtaposed direction. Connected to only the first ohmic electrode which is in ohmic contact with the fourth semiconductor region of the pair and the pair of fifth regions in common; the second device terminal is connected to the second semiconductor region and the pair of fifth regions. In each set consisting of the third area, For each of the second ohmic electrodes in ohmic contact with the two semiconductor regions and the pair of third regions in common, instead of being commonly connected to all of them, a group positioned on the inner side in the juxtaposed direction. Of the second semiconductor region and the pair of third regions are commonly connected only to the second ohmic electrode in ohmic contact; a third device terminal is newly provided, and each of the second semiconductor regions and the pair of Of each set consisting of a third region and each set consisting of each of the fourth semiconductor regions and the pair of fifth regions, a set of the fourth semiconductor region and a pair of fifth regions located outside in the juxtaposed direction. A first ohmic electrode in ohmic contact with the region in common,
A device in which the third device terminal is commonly connected to the second ohmic electrode that is in ohmic contact with the second semiconductor region and the pair of third regions in common. 26. The device according to claim 25; each set including the fourth semiconductor region and the pair of fifth regions, and each set including the second semiconductor region and the pair of third regions. In the above, in the group located on the outer side in the juxtaposed direction, instead of using the pair of fifth regions and the pair of third regions, one each of the fifth region and the third region is used; Device characterized by.