JPH0777420B2 - Digital image processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a digital image processing apparatus that performs a rotation process on a digital image represented by digital image data.

[Prior art]

There is a method in which a digital image is divided into blocks of a predetermined size, and the image pattern of the block is coded in block units. Image processing such as movement and rotation can be performed. This is because, in this system, since each block is coded, only that block can be processed independently without affecting other blocks.

However, it should be noted here that when the rotation process is performed, only the process is performed in block units, and the reproduced image is not perfect even if the decoding is performed as it is.

This will be described with reference to FIG. If 0 is the original image in FIG. 6, encode this in block units and
An example of rotating 90 degrees clockwise is shown. First, the original image 0 is 4x4 block size 4 blocks.
It is divided into 01 to 04. And each block 01 ~
The pattern of 04 is encoded into B ₁₁ , B ₁₂ , B ₂₁ , and B ₂₂ by the encoder 11 and stored in the memory 12. Here, in order to rotate 90 ° clockwise, the memory in the case where there is no rotation processing
If the reading from 12 is in the order of B ₁₁ , B ₁₂ , B ₂₁ and B ₂₂ , the reading from the memory 12 is in the order of B ₂₁ , B ₁₁ , B ₂₂ and B ₁₂ as shown in FIG. Do.

However, the image R ₁ reproduced by the decoder 13 as it is is not an image obtained by rotating the original 0 clockwise by 90 degrees. This is because the block position is certainly rotated,
This is because the inside of each block is as it is. Therefore, the complete reconstructed image R ₂ can only be obtained by rotating the inside of the block clockwise by 90 ° in the same manner. For this reason, the data decoded by the decoder 13 must be processed by the rotator 14 according to the contents of each processing, and the pixels in each block must be rearranged.

That is, if the block size is 4 × 4 as shown in FIG. 7 and the pixel position forming the block is indicated by X (i, j), the rotator 14 is provided for each pixel forming the block.
In the above, position conversion processing as described below was required.

X (i, j) → x (j, 5-i) 90 degree rotation → x (5-i, 5-j) 180 degree rotation → x (5-j, i) 270 degree rotation → x (i, 5) -J) Mirror image → x (j, i) 90 degree rotation + mirror image → x (5-i, j) 180 degree rotation + mirror image → x (5-j, 5-i) 270 degree rotation + mirror image The direction and the mirror image are taken with respect to the i-axis.

However, it is difficult to execute such processing by hardware and in real time. Further, the method of processing the pixels in the block must be changed according to the processing content of the image, and this problem becomes serious.

〔Purpose〕

The present invention has been made in view of the above points, and an object thereof is to enable a digital image rotation process to be executed at high speed by a simple process. More specifically, the digital image data is composed of N × N pixels Encoding means for dividing into a plurality of blocks and encoding each block into a block code consisting of a pattern code indicating a pattern of image data in the block and a status code indicating a direction of the pattern, and encoded by the encoding means. Storage means for storing the block code of each block, and rotation processing means for changing the reading order of the block code from the storage means and converting the status code of each read block code in accordance with an instruction of image rotation. , An image pattern composed of N × N pixels for each block code which is rotated and output by the rotation processing means. (EN) A digital image processing device having a decoding means for decoding the image.

〔Example〕

Hereinafter, the present invention will be described based on preferred embodiments. FIG. 1 illustrates the concept of the present invention.

The original image 0 is divided into 4 × 4 blocks, and each block has a pattern code representing the pattern structure of the block and a status code representing the rotational / symmetrical state of the pattern by the encoder 1. Encoded in the code. This block code is stored in the memory 2.

Then, also in this case, in order to rotate the image clockwise by 90 degrees, the reading order B ₁₁ , B ₁₂ , B ₂₁ ,
Against B _22, in order from the memory 2 in this process each _{Burotsukukodo, B 21, B 11, B} 22, B 12 reads in the order of the state code in rotator 5 represents the rotation mode of the Burotsukukodo Then, the block code itself is converted into a block code with a pattern obtained by rotating the original block pattern by 90 degrees.

In this way, if the rotated block code is decoded by the decoder 5 to reproduce the image, the 90-degree rotated image R of the original 0 can be obtained, and individual processing for each pixel in the block is not possible. Will be needed.

By the way, of the digital image block encoding methods, a vector quantization encoding method is well known as a representative method for encoding a block pattern. This vector quantization considers the block pixel as a vector element, and if the block is 4 × 4, the block of the input image is regarded as a 16-dimensional vector. Then, several vectors are registered as reproduction vectors in the same 16-dimensional space, and the input vector is mapped to a reproduction vector that minimizes distortion. For example, if the input image is 1
Or, if it is a binary image that takes only 0, there are 2 ¹⁶ patterns in a 4 × 4 block, but by assigning the same code to several different patterns, for example, there are 2 ⁸ patterns in the reproduced image. If a pattern is registered, the amount of information can be halved from 16 bits to 8 bits. If the distortion of the reproduced image can be further tolerated, 2 ¹⁶ patterns may be compressed into ²⁵ patterns.

In this vector quantization, the block pattern is encoded as an address indicating the reproduction vector in the encoding. Also, when implemented as hardware, a memory ROM that stores a conversion table for encoding or decoding.
The mapping can be realized relatively easily by the above. In this way, the coding by vector quantization can be regarded as a method for coding the block pattern structure.

As described above, in such encoding, the pattern of the block is expressed and encoded by the pattern code indicating the structure of the pattern and the state code indicating the rotational / symmetrical state of the pattern. This is because a plurality of patterns that can be obtained by considering one pattern out of a plurality of patterns that become the same pattern by rotation / symmetry processing when registering as a reproduction pattern as a basic pattern and performing rotation / symmetry processing on this basic pattern. Register the pattern,
The pattern code representing a plurality of patterns derived from these basic patterns is common to that of the basic pattern, and the status code representing the rotation / symmetry mode thereof is combined with the pattern code representing each pattern. As a result, by changing only the status code, for example, a code having a pattern rotated by a desired angle can be obtained.

FIG. 2 shows a concrete example of the encoding based on the above concept, and shows the case of encoding a 4 × 4 block image with 8 bits, and the image pattern is formed in the upper 5 bits of the 8 bit block code. , And the status code SC indicating the rotational / symmetrical mode in the lower 3 bits.
Assign Incidentally, the pattern of 2 ^sixteen in this example 2 ⁵
It is compressed to the street pattern code.

FIG. 3 shows an operation example in which the image BP encoded by the block code shown in FIG. 2 is rotated 90 degrees in the clockwise direction. The pattern code PC corresponding to the image BP is “11111”, and the image is It is assumed that BP is registered as a basic pattern. As mentioned above, if the basic pattern is "000" as the status code SC, the block code of the basic pattern is "11".
111000 ". For a pattern rotated 90 degrees, if the clockwise 90 degree rotation is" 001 "as the status code SC, the block code representing the pattern BP ¹ after this rotation processing is" It becomes 11111001 ".

At this time, the status code SC itself can be used as the reproduction vector by performing the following coding for the rotational / symmetrical mode. For that purpose, the state code SC is not regarded as a code merely indicating an absolute rotational / symmetrical state with respect to the basic pattern, but is a code indicating a relative rotational / symmetrical state. By doing so, the same state can be created before and after the processing by performing the same processing regardless of the state of the original state code SC with respect to the basic pattern.

An example of status code SC is shown below. Further, FIG. 4 shows a state transition diagram of an image by the state code SC.

Basic pattern 000 90 degree rotation 001 180 degree rotation 010 270 degree rotation 011 Mirror image 111 90 degree rotation + mirror image 110 180 degree rotation + mirror image 101 270 degree rotation + mirror image 100 That is, the status code SC indicating the basic pattern is 000, 8
One state is represented by a 3-bit code as described above. And, as shown in the state transition diagram of FIG. 4, there is a regularity between the eight rotationally symmetric states.

That is, by adding 1 to the lower 2 bits of the status code SC of 3 bits, the pattern is moved to the right (clockwise) direction.
It can be a pattern code rotated 90 degrees.
On the contrary, every time 1 is subtracted from the lower 2 bits, left (counterclockwise)
You can rotate the pattern 90 degrees in any direction. Further, by inverting each of the 3 bits of the status code SC (1 is set to 0, 0 is set to 1), a mirror image of the pattern can be obtained.

With this kind of coding, we should be aware of the basic pattern for mapping the input block to the reproduction vector, and the pattern of how many times it was rotated, when coding such as vector quantization. All can be treated as reproduction vectors of the same level. At this time, it is necessary to be careful when rotating a certain basic pattern.
That is, the pattern obtained by the symmetric processing is not used as the basic pattern again.

FIG. 5 is a detailed configuration example of the rotator 5 shown in FIG. 1 for realizing the processing of the status code SC. C ₂ , C ₁ and C ₀ are 3-bit status codes indicating the rotational / symmetrical mode shown in FIG.
SC.

Further, R ₁ and R ₀ are rotation angles of the pattern, and M is a signal indicating the presence or absence of mirror image processing, for example, a signal according to an image processing command from an operator using an input device such as a keyboard or a digitizer. Is. Signal M is "1" and status code is SC
Inversion of 3 bits, that is, a mirror image processing is instructed. Also,
The following processing is instructed by the combination of the signals R ₁ and R ₀ .

Reference numeral 21 is a 2-bit adder for rotating the lower 2 bits (C ₁ , C ₀ ) of the input status code SC by the aforementioned signals R ₁ , R _0. Specifically, C ₁ C ₀ + R ₁ R ₀ addition operation,
The lower 2 bits of the addition result are output as Y ₁ Y ₀ .

22-25 are inverters that invert the level of the input signal, 26-
31 is an AND gate, and 32 to 34 are OR gates. Two outputs of adder 21 and C ₂ of upper 1 bit of status code SC
Y ₁ and Y ₀ are respectively inverted by inverters 22 to 24 and input to AND gates 26, 28 and 30, and C ₂ , Y ₁ and Y ₀ are input to AND gates 27, 29 and 31 as they are. AND gate 26,2
Signal M is input to 8,30, and AND gate 27,29,
A signal obtained by inverting the signal M by the inverter 25 is input to 31.

Accordance connexion, input of the AND gate 27, 29, 31 in the case of the signal M is "0", _{i.e., C 2, Y 1, C} Y 0 is through respective OR gate _{32,33,34 '2, C' 1,} C It is output as' ₀ . When the signal M is "1", the inputs of the AND gates 26, 28 and 30, that is, C ₂ and Y
_The inverted values of ₁ and Y ₀ are output as C ′ ₂ , C ′ ₁ and C ′ ₀ through the OR gates 32, 33 and 34, respectively. In this way, the status code SC rotated by the adder 21 is mirror-processed.

As described above, the status code SC is converted by the rotator 5 shown in FIG. 5 in accordance with the processing command. The pattern code of the block code is not processed by the rotator 5.

The block code including the status code SC and the pattern code PC thus processed is decoded into an image pattern in the decoder shown in FIG. 1 by using the conversion table search technique as described above.

In the embodiment described above, the encoding block is 4 × 4, but the present invention is not limited to this, and the pixel to be encoded is not limited to the binary value of white / black and has gradation. May be. Further, the pattern code is not limited to 5 bits and the status code is not limited to 3 bits, and the number of bits is increased or decreased according to the compression rate or the processing content.

As described above, when encoding a block pattern such as vector quantization, by configuring the block code from a code representing the pattern and a code representing the rotation and symmetry states of the pattern, When processing such as rotation and symmetry in the encoded state, the processing of pixels in the block can be realized at high speed by performing a simple operation on the code.

In addition, in a coding method that causes distortion in the reconstructed image, such as vector quantization, the block of rotation and symmetry always exists, so no matter what rotation or symmetry, In terms of image quality, there is no difference in image quality, and it is practically a great advantage that an image rotated 90 ° and an image rotated 180 ° can have exactly the same image quality.

〔effect〕

As described above, according to the present invention, the order of reading the block code from the storage unit is changed according to the image rotation instruction without performing a complicated and large amount of processing for rotating a digital image in pixel units. At the same time, the simple execution of converting the read status code of each block code enables high-speed execution.

[Brief description of drawings]

FIG. 1 is a diagram showing a concept of encoding according to the present invention, FIG. 2 is a diagram showing an example of a code used for encoding according to the present invention, and FIG.
FIG. 4 is a diagram showing an example of image processing, FIG. 4 is a state transition diagram, FIG. 5 is a diagram showing a configuration example of a rotator, FIG. 6 is a diagram showing conventional encoding, and FIG. 7 is a conventional image. It is a figure which shows an example of a process, 1 is an encoder, 5 is a rotator, 3 is a decoder.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yukio Sato 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) Reference JP-A-54-2619 (JP, A)

Claims (1)

[Claims] 1. Digital image data is divided into a plurality of blocks each consisting of N × N pixels, and each block is divided into a block code consisting of a pattern code showing a pattern of image data in the block and a state hood showing a pattern direction. Encoding means for encoding, storage means for storing the block code of each block encoded by the encoding means, and changing the reading order of the block code from the storage means according to an instruction of image rotation. Rotation processing means for converting the read status code of each block code, and decoding means for decoding each output block code rotated by the rotation processing means into an image pattern consisting of N × N pixels. Digital image processing device characterized by: