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JPH0783071B2 - Microwave integrated circuit - Google Patents
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JPH0783071B2 - Microwave integrated circuit - Google Patents

Microwave integrated circuit

Info

Publication number
JPH0783071B2
JPH0783071B2 JP59264557A JP26455784A JPH0783071B2 JP H0783071 B2 JPH0783071 B2 JP H0783071B2 JP 59264557 A JP59264557 A JP 59264557A JP 26455784 A JP26455784 A JP 26455784A JP H0783071 B2 JPH0783071 B2 JP H0783071B2
Authority
JP
Japan
Prior art keywords
substrate
integrated circuit
dielectric substrate
semiconductor substrate
transmission line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP59264557A
Other languages
Japanese (ja)
Other versions
JPS61142803A (en
Inventor
博世 小川
和紀 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59264557A priority Critical patent/JPH0783071B2/en
Publication of JPS61142803A publication Critical patent/JPS61142803A/en
Publication of JPH0783071B2 publication Critical patent/JPH0783071B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は誘電体基板と半導体基板とを用いたマイクロ波
集積回路の構成に関するものである。
The present invention relates to a structure of a microwave integrated circuit using a dielectric substrate and a semiconductor substrate.

(従来の技術) 従来この種の装置は第4図に示すように誘電体基板3の
間に半導体基板5を挿入し、各基板上に設けたマイクロ
ストリップ線路4,7を金属シート8を用いて接続する構
成であった。6は各基板の表面の高さを等しくして接続
部の不連続を無くするためのものであり、通常導体が用
いられている。
(Prior Art) Conventionally, in this type of device, as shown in FIG. 4, a semiconductor substrate 5 is inserted between dielectric substrates 3, and microstrip lines 4 and 7 provided on each substrate are connected to a metal sheet 8. It was configured to connect. Reference numeral 6 is for equalizing the heights of the surfaces of the respective substrates to eliminate discontinuity of the connection portion, and a conductor is usually used.

(発明が解決しようとする問題点) 本構成では、誘電体基板と半導体基板の厚みの差が大き
い場合、基板を設置するための導体6の突起部の高さが
高くなるため、基板接続部の不連続成分が増大し、接続
損失が増加する欠点があった。また、このため半導体基
板の厚さを誘電体基板に比較して小さくできず、この基
板上の回路の寸法の大きさが制限されてしまう問題があ
る。逆に、薄い半導体基板を用いた場合、誘電体基板の
厚さを薄くする必要があるが、これは機械工作上誘電体
基板の大きさを大きくできず、誘電体基板上に配置する
回路の大きさが制限されていまう問題があった。本発明
はこれらの欠点を改善することを目的とする。
(Problems to be Solved by the Invention) In the present configuration, when the difference in thickness between the dielectric substrate and the semiconductor substrate is large, the height of the protruding portion of the conductor 6 for installing the substrate becomes high, so that the substrate connecting portion is high. However, there is a drawback that the discontinuous component of increases and the connection loss increases. Therefore, there is a problem that the thickness of the semiconductor substrate cannot be made smaller than that of the dielectric substrate, and the size of the circuit on this substrate is limited. On the other hand, when a thin semiconductor substrate is used, it is necessary to reduce the thickness of the dielectric substrate. However, this cannot be increased in size due to machining, and the size of the circuit placed on the dielectric substrate cannot be increased. There was a problem that the size was limited. The present invention aims to remedy these drawbacks.

(問題点を解決するための手段) 本発明によれば、誘電体基板と、この誘電体基板上に設
けられておりマイクロ波領域でインピーダンス設計して
形成されたマイクロ波集積回路用の第1の伝送線路と、
半導体基板と、この半導体基板上に設けられておりマイ
クロ波領域でインピーダンス設計して形成されたマイク
ロ波集積回路用の第2の伝送線路とを有するマイクロ波
集積回路であって、誘電体基板が裏面に貫通しない穴を
有しており、この穴に半導体素子を搭載する半導体基板
が取り付けられており、誘導体基板上の第1の伝送線路
と半導体基板上の第2の伝送線路とが互いに接続されて
いるマイクロ波集積回路が提供される。
(Means for Solving the Problems) According to the present invention, a dielectric substrate and a first microwave integrated circuit provided on the dielectric substrate for impedance design in a microwave region. Transmission line of
A microwave integrated circuit having a semiconductor substrate and a second transmission line for a microwave integrated circuit, which is provided on the semiconductor substrate and designed by impedance design in a microwave region, the dielectric substrate comprising: The back surface has a hole that does not penetrate, and a semiconductor substrate on which a semiconductor element is mounted is attached to this hole, and the first transmission line on the dielectric substrate and the second transmission line on the semiconductor substrate are connected to each other. A microwave integrated circuit is provided.

また、誘導体基板と、この誘電体基板上に設けられてお
りマイクロ波領域でインピーダンス設計して形成された
マイクロ波集積回路用の第1の伝送線路と、半導体基板
と、この半導体基板上に設けられておりマイクロ波領域
でインピーダンス設計して形成されたマイクロ波集積回
路用の第2の伝送線路とを有するマイクロ波集積回路で
あって、誘電体基板が裏面に貫通しない複数の穴を有し
ており、こられの各穴に半導体素子を搭載する半導体基
板が取り付けられており、誘電体基板上の第1の伝送線
路と半導体基板上の第2の伝送線路とが互いに接続され
ており、誘電体基板には第1の伝送線路で接続される周
辺回路が搭載されているマイクロ波集積回路が提供され
る。
Further, a dielectric substrate, a first transmission line for a microwave integrated circuit, which is provided on the dielectric substrate by impedance design in a microwave region, a semiconductor substrate, and provided on the semiconductor substrate. A microwave integrated circuit having a second transmission line for a microwave integrated circuit formed by impedance designing in a microwave region, wherein the dielectric substrate has a plurality of holes that do not penetrate to the back surface. A semiconductor substrate on which a semiconductor element is mounted is attached to each of these holes, and a first transmission line on the dielectric substrate and a second transmission line on the semiconductor substrate are connected to each other. There is provided a microwave integrated circuit in which a peripheral circuit connected to the first transmission line is mounted on the dielectric substrate.

(作用) 誘電体基板の非貫通穴内に半導体基板を設け表面の高さ
が等しくなるように設定する。接地導体又は外部導体は
誘電体基板の下面又は誘電体基板及び半導体基板の上面
に設けることができるので、半導体基板の下面には導体
が不要となり、従ってこの部分で特性インピーダンスが
不連続となり不整合となる等の不都合が生ぜず、両基板
を低損失で接続したマイクロ波伝送線路が得られる。
(Operation) A semiconductor substrate is provided in the non-through hole of the dielectric substrate and the heights of the surfaces are set to be equal. Since the ground conductor or the outer conductor can be provided on the lower surface of the dielectric substrate or on the upper surfaces of the dielectric substrate and the semiconductor substrate, the conductor is not required on the lower surface of the semiconductor substrate. Therefore, a microwave transmission line in which both substrates are connected with low loss can be obtained.

(実施例) 第1図は本発明の実施例であり、1,2は信号入出力ポー
ト、3は誘電体基板、20は半導体基板、4,21はマイクロ
ストリップ線路、8はマイクロストリップ線路を接続す
るための金属シート、17は誘電体基板内に設けた穴であ
る。
(Embodiment) FIG. 1 shows an embodiment of the present invention. 1, 2 are signal input / output ports, 3 is a dielectric substrate, 20 is a semiconductor substrate, 4 and 21 are microstrip lines, and 8 is a microstrip line. The metal sheet 17 for connection is a hole provided in the dielectric substrate.

穴17の深さは基板20の厚みと一致させ、マイクロストリ
ップ線路の接続部の段差を無くし、不連続成分を無くす
ることができる。そのため、本構成では不連続部による
接続損失の増加を少なくすることができる。また、不連
続部の影響は周波数の増大とともに増加する傾向がある
ため、本構成は高周波帯で動作させる回路に適してい
る。
The depth of the hole 17 can be made equal to the thickness of the substrate 20 to eliminate the step at the connecting portion of the microstrip line and eliminate the discontinuous component. Therefore, in this configuration, it is possible to suppress an increase in connection loss due to the discontinuous portion. Further, since the influence of the discontinuous portion tends to increase as the frequency increases, this configuration is suitable for a circuit operated in the high frequency band.

第4図の従来例では半導体基板5の下面に接地導体23を
設けて導体部6との電気的接続を図っているが、第1図
の実施例では半導体基板20の下面に接地導体が不要であ
り、製造工程の簡素化が図られている。
In the conventional example of FIG. 4, the ground conductor 23 is provided on the lower surface of the semiconductor substrate 5 to electrically connect to the conductor portion 6, but in the embodiment of FIG. 1, the ground conductor is not required on the lower surface of the semiconductor substrate 20. Therefore, the manufacturing process is simplified.

本構成では半導体基板20の厚みを十分薄くすることがで
き、基板上の回路パターンを小さくできる利点がある。
また、誘電体基板の厚みを薄くする必要がなく、そのた
め面積の大きな基板を用いることができ、誘電体基板上
に種々の回路を配置できる利点がある。
This configuration has the advantage that the thickness of the semiconductor substrate 20 can be made sufficiently thin and the circuit pattern on the substrate can be made small.
Further, it is not necessary to reduce the thickness of the dielectric substrate, so that a substrate having a large area can be used, and various circuits can be arranged on the dielectric substrate.

第2図は本発明の他の実施例であり、9は誘電体基板18
の上に設けたコプレナー線路、11はその中心導体、12,1
3は外部導体であり、10は半導体基板19上のコプレナー
線路、14はその中心導体、15,16は外部導体である。17
は誘電体基板内に設けた穴であり、8は各基板上のコプ
レナー線路接続するための金属シートである。
FIG. 2 shows another embodiment of the present invention, in which 9 is a dielectric substrate 18.
The coplanar line installed on the top, 11 is the center conductor, 12,1
3 is an outer conductor, 10 is a coplanar line on the semiconductor substrate 19, 14 is its center conductor, and 15 and 16 are outer conductors. 17
Is a hole provided in the dielectric substrate, and 8 is a metal sheet for connecting the coplanar line on each substrate.

コプレナー線路は第1図のマイクロストリップ線路4と
異り、基板の裏面には接地導体22が無く、そのかわり基
板の上面に中心導体と外部導体(これはマイクロストリ
ップ線路の接地導体と同様の働きをする)を同時に配置
している。そのため、このような共平面線路(通常、コ
プレナー線路等の接地導体が基板の上面にある線路をこ
のようによんでいる)を有する基板を第4図に示した導
体6を用いる構成で接続する場合、基板の下面に導体が
存在することになり、伝送線路の特性インピーダンスが
変化してしまう欠点がある。ところが、第2図に示す本
発明による構成では半導体基板を誘電体基板内に設けた
穴の中に埋め込んで接続するため、半導体基板の下面に
は導体が存在せず特性インピーダンスが変化せず、特性
の劣化がない。
Unlike the microstrip line 4 of FIG. 1, the coplanar line does not have a ground conductor 22 on the back surface of the substrate, but instead has a center conductor and an outer conductor on the top surface of the substrate (this works similar to the ground conductor of the microstrip line). Are placed at the same time. Therefore, a substrate having such a coplanar line (usually, a line having a ground conductor such as a coplanar line on the upper surface of the substrate is referred to in this way) is connected in a configuration using the conductor 6 shown in FIG. In this case, there is a drawback that the conductor is present on the lower surface of the substrate and the characteristic impedance of the transmission line changes. However, in the configuration according to the present invention shown in FIG. 2, since the semiconductor substrate is embedded in the hole provided in the dielectric substrate for connection, there is no conductor on the lower surface of the semiconductor substrate and the characteristic impedance does not change, No deterioration of characteristics.

したがって、本発明はコプレナー線路等の共平面線路を
用いる回路を配置した誘電体基板及び半導体基板を接続
するのに適した構成法である。
Therefore, the present invention is a construction method suitable for connecting a dielectric substrate and a semiconductor substrate on which a circuit using a coplanar line such as a coplanar line is arranged.

第3図は本発明の他の実施例であり、24,25は入出力ポ
ート、26は低域通過フィルタ、27は方向性結合器、28は
ダミー、29は誘電体共振器、30,31は半導体基板であ
る。このように種々の機能を有する周辺回路を誘電体基
板上に配置することによって半導体基板を有効に使用す
ることができ、集積回路の低価格化を図ることのできる
利点がある。
FIG. 3 shows another embodiment of the present invention, in which 24 and 25 are input / output ports, 26 is a low pass filter, 27 is a directional coupler, 28 is a dummy, 29 is a dielectric resonator, and 30, 31. Is a semiconductor substrate. By arranging the peripheral circuits having various functions on the dielectric substrate in this manner, the semiconductor substrate can be effectively used, and the cost of the integrated circuit can be reduced.

(発明の効果) 以上説明したように、誘電体基板内に設けた穴の中に半
導体基板を組み込んで各基板上の伝送線路を接続してい
るため、半導体基板を薄くすることができ、そのための
基板上の回路パターンを小さくでき、基板上に多数の回
路を設けることができるとともに、誘電体基板を薄くす
る必要がないため基板の面積を大きくでき、そのためこ
の基板上に種々の回路を配置できる利点がある。また、
本発明はコプレナー線路等の共平面線路を用いた各基板
を回路の特性劣化をともなわずに接続できる利点もあ
る。さらに、複数の半導体基板を実装し、誘電体基板上
に周辺回路を設けることにより経済的な集積回路を実現
できる利点もある。
(Effects of the Invention) As described above, since the semiconductor substrate is incorporated into the hole provided in the dielectric substrate and the transmission lines on each substrate are connected, the semiconductor substrate can be thinned, and therefore The circuit pattern on the board can be made small, many circuits can be provided on the board, and the area of the board can be increased because it is not necessary to thin the dielectric board. Therefore, various circuits can be arranged on this board. There are advantages. Also,
The present invention also has an advantage that each board using a coplanar line such as a coplanar line can be connected without deterioration of the circuit characteristics. Further, there is an advantage that an economical integrated circuit can be realized by mounting a plurality of semiconductor substrates and providing peripheral circuits on the dielectric substrate.

特に本発明によれば、マイクロ波領域でインピーダンス
設計して形成されたマイクロ波集積回路用の第1の伝送
線路を有する誘電体基板の、裏面に非貫通の単数又は複
数の穴に、マイクロ波領域でインピーダンス設計して形
成されたマイクロ波集積回路用の第2の伝送線路を有す
る半導体基板が取り付けられているため、接地導体又は
外部導体を誘電体基板の下面又は誘電体基板及び半導体
基板の上面に設けることができる。このため半導体基板
の下面には導体が不要となり、この部分で特性インピー
ダンスが変化してマイクロ波的に不連続となる不都合を
防止できる。従って、誘電体基板と半導体基板との厚さ
が異なる場合にも、両者の接続部分でインピーダンスの
不整合が生ぜず、反射損失、挿入損失の増大を確実に防
止したマイクロ波伝送線路を得ることができる。
In particular, according to the present invention, the dielectric substrate having the first transmission line for the microwave integrated circuit, which is formed by impedance designing in the microwave region, is provided with the microwave in the non-penetrating single hole or holes on the back surface. Since the semiconductor substrate having the second transmission line for the microwave integrated circuit formed by impedance designing in the region is attached, the ground conductor or the outer conductor is provided on the lower surface of the dielectric substrate or the dielectric substrate and the semiconductor substrate. It can be provided on the upper surface. For this reason, no conductor is required on the lower surface of the semiconductor substrate, and it is possible to prevent the inconvenience that the characteristic impedance changes in this portion and the discontinuity is caused by microwaves. Therefore, even if the thickness of the dielectric substrate and that of the semiconductor substrate are different, impedance mismatch does not occur at the connection between the two, and a microwave transmission line that reliably prevents reflection loss and insertion loss from increasing can be obtained. You can

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の特許請求の範囲(1)の実施例を示す
図、第2図は本発明の他の実施例であり、第3図は特許
請求の範囲(2)の実施例、第4図は従来の集積回路の
構成例である。 1,2,24,25……入出力ポート、 3,18……誘電体基板、 4,7,21……マイクロストリップ線路、 5,19,20,30,31……半導体基板、 6……導体部、 8……金属シート、 9,10……コプレナー線路、 11,14……中心導体、 12,13,15,16……外部導体、 17……穴、 22,23……接地導体、 26……低域通過フィルタ、 27……方向性結合器、 28……ダミー、 29……誘電体共振器。
FIG. 1 is a diagram showing an embodiment of claims (1) of the present invention, FIG. 2 is another embodiment of the present invention, and FIG. 3 is an embodiment of claims (2), FIG. 4 shows a configuration example of a conventional integrated circuit. 1,2,24,25 …… Input / output port, 3,18 …… Dielectric substrate, 4,7,21 …… Microstrip line, 5,19,20,30,31 …… Semiconductor substrate, 6 …… Conductor, 8 …… Metal sheet, 9,10 …… Coplanar line, 11,14 …… Center conductor, 12,13,15,16 …… Outer conductor, 17 …… Hole, 22,23 …… Ground conductor, 26 …… Low pass filter, 27 …… Directional coupler, 28 …… Dummy, 29 …… Dielectric resonator.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】誘電体基板と、該誘電体基板上に設けられ
ておりマイクロ波領域でインピーダンス設計して形成さ
れたマイクロ波集積回路用の第1の伝送線路と、半導体
基板と、該半導体基板上に設けられておりマイクロ波領
域でインピーダンス設計して形成されたマイクロ波集積
回路用の第2の伝送線路とを有するマイクロ波集積回路
であって、前記誘電体基板が裏面に貫通しない穴を有し
ており、該穴に半導体素子を搭載する前記半導体基板が
取り付けられており、前記誘導体基板上の前記第1の伝
送線路と前記半導体基板上の前記第2の伝送線路とが互
いに接続されていることを特徴とするマイクロ波集積回
路。
1. A dielectric substrate, a first transmission line for a microwave integrated circuit which is formed on the dielectric substrate by impedance designing in a microwave region, a semiconductor substrate, and the semiconductor. A microwave integrated circuit provided on a substrate and having a second transmission line for a microwave integrated circuit formed by impedance design in a microwave region, wherein the dielectric substrate does not penetrate to the back surface. The semiconductor substrate on which a semiconductor element is mounted is attached to the hole, and the first transmission line on the dielectric substrate and the second transmission line on the semiconductor substrate are connected to each other. A microwave integrated circuit characterized by being provided.
【請求項2】誘電体基板と、該誘電体基板上に設けられ
ておりマイクロ波領域でインピーダンス設計して形成さ
れたマイクロ波集積回路用の第1の伝送線路と、半導体
基板と、該半導体基板上に設けられておりマイクロ波領
域でインピーダンス設計して形成されたマイクロ波集積
回路用の第2の伝送線路とを有するマイクロ波集積回路
であって、前記誘電体基板が裏面に貫通しない複数の穴
を有しており、該各穴に半導体素子を搭載する前記半導
体基板が取り付けられており、前記誘電体基板上の前記
第1の伝送線路と前記半導体基板上の前記第2の伝送線
路とが互いに接続されており、前記誘電体基板には前記
第1の伝送線路で接続される周辺回路が搭載されている
ことを特徴とするマイクロ波集積回路。
2. A dielectric substrate, a first transmission line for a microwave integrated circuit which is formed on the dielectric substrate by impedance design in a microwave region, a semiconductor substrate, and the semiconductor. A microwave integrated circuit having a second transmission line for a microwave integrated circuit, which is provided on a substrate and designed by impedance design in a microwave region, wherein a plurality of the dielectric substrates do not penetrate to the back surface. Of holes, the semiconductor substrate on which a semiconductor element is mounted is attached to each hole, the first transmission line on the dielectric substrate and the second transmission line on the semiconductor substrate. Are connected to each other, and a peripheral circuit connected to the first transmission line is mounted on the dielectric substrate.
JP59264557A 1984-12-17 1984-12-17 Microwave integrated circuit Expired - Fee Related JPH0783071B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59264557A JPH0783071B2 (en) 1984-12-17 1984-12-17 Microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59264557A JPH0783071B2 (en) 1984-12-17 1984-12-17 Microwave integrated circuit

Publications (2)

Publication Number Publication Date
JPS61142803A JPS61142803A (en) 1986-06-30
JPH0783071B2 true JPH0783071B2 (en) 1995-09-06

Family

ID=17404929

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59264557A Expired - Fee Related JPH0783071B2 (en) 1984-12-17 1984-12-17 Microwave integrated circuit

Country Status (1)

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JP (1) JPH0783071B2 (en)

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JP2006222797A (en) * 2005-02-10 2006-08-24 Tdk Corp Low pass filter, module component, and method of manufacturing low pass filter
US7528792B2 (en) * 2005-06-06 2009-05-05 Raytheon Company Reduced inductance interconnect for enhanced microwave and millimeter-wave systems
JP4885618B2 (en) * 2006-06-06 2012-02-29 株式会社豊田中央研究所 Electronic device having mounting structure of high-frequency circuit chip
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