JPH0783090B2 - Semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor device in which monolithic integrated elements separated from each other by a PN junction isolation technique are required to have the same inter-element characteristics. Vessel TO-236 (JEDEC
It is used to correct the capacitance balance between the terminals of the 3-terminal twin Schottky diode (model name).

[Technical background of the invention]

Generally, in an electronic circuit, a high quality functional element is often obtained by appropriately combining semiconductor elements having uniform characteristics such as a differential amplifier circuit and a push-pull power amplifier circuit. A three-terminal Schottky diode that is particularly used in a balanced mixer circuit or the like is also a device of this type, and is a high-quality semiconductor device that combines two Schottky diodes having substantially the same electrical characteristics that are simultaneously formed on the same semiconductor substrate.

The background art will be described below by taking a three-terminal twin Schottky diode by the PN junction separation technology as an example.

FIG. 1 is a sectional view of a 3-terminal twin Schottky diode incorporated in a conventional TO-236. 1 is a P-type silicon substrate, 2a and 2b are N-type isolation layers (hereinafter referred to as N-type layers)
And are isomorphic to each other. 4 is an insulating film SiO ₂ film), and 5a and 5b are Schottky electrodes having the same shape. 6 is a wiring electrode,
6'is a connecting line, and 7,8,9 are parts of the frame of TO-236 (transistor outline name standardized by JEDEC), which also serve as external connection terminals. The silicon substrate 1 is mounted on the terminal 8. Schottky electrode
Schottky diode A is formed by 5a and N-type layer 2a, and Schottky diode B is formed by Schottky electrode 5b and N-type layer 2b. Since the diodes A and B have the same shape and are simultaneously formed through the same process, their characteristics are almost the same. The electrode 5a of the Schottky diode A and the N-type layer 2b of the Schottky diode B are connected by the wiring electrode 6, and the midpoint thereof is connected to the terminal 8 by the connection line 10. The terminals 7 and 9 are connected to the N-type layer 2a and the electrode 5b through the wiring electrodes 6, respectively. The N-type layers 2a and 2b form a PN junction with the P-type substrate 1 and are separated from each other by a junction depletion layer during operation. FIG. 2 shows a capacitance equivalent circuit focusing on the electric capacitance when the element side is viewed from the three terminals 7, 8 and 9 of the three-terminal twin Schottky diode having the above configuration. C _Sa and C _Sb are Schottky capacitors of Schottky diodes A and B, respectively, and C _pNa is PN when the N-type layer 2a is separated from the P-type substrate 1.
The junction capacitors C _MOSa and C _MOSb are so-called MOS capacitors formed between the wiring electrode and the substrate when the insulating film is a silicon oxide film.

[Problems of background technology]

As described above, the twin-type Schottky diode used particularly in the balanced mixer circuit is required to have the same terminal characteristics in the product. In particular, there is a strong demand that the forward voltage-current characteristics and the capacity are the same. On the other hand, the PN junction separation method according to the above-mentioned prior art 3
In the terminal twin Schottky diode, the capacitances appearing between the terminals are unbalanced as shown in the capacitance equivalent circuit of FIG. This is because the PN junction capacitance when the N-type layer 2b is separated from the P-type substrate 1 is short-circuited externally by the connection line 10 (see FIG. 1). This is a problem that cannot be avoided by the conventional technology.

[Object of the Invention]

An object of the present invention is to solve the above-mentioned problems in a plurality of monolithic integrated devices of the same shape which are separated from each other by the PN junction separation method, and to provide a semiconductor device in which the capacitance between the devices is balanced.

[Outline of Invention]

The present invention relates to a plurality of elements having the same shape and the same electrical characteristics that are separated by the PN junction separation method, and when the PN isolation junction capacitance is used at a frequency that cannot be ignored, between the external terminals of the element due to the PN isolation junction capacitance. It improves the capacity imbalance. As is well known, the PN junction capacitance has voltage dependence, so
It is difficult to obtain sufficient capacitance balance by using an ordinary capacitor having a constant value. It is necessary to connect junction capacitances having equal voltage dependence in parallel between the desired terminals of the element exhibiting imbalance. That is, the present invention relates to a three-terminal twin in which two Schottky diodes of the same shape monolithically integrated on one main surface of a semiconductor substrate and separated from each other by a PN junction separation method and one balancing PN junction capacitor are provided. A semiconductor device comprising a Schottky diode, wherein a first terminal of the three-terminal twin Schottky diode is an anode terminal of the first diode and is connected to the balancing PN junction capacitance,
A second terminal is a cathode terminal of a second diode, a third terminal is a common terminal of a cathode of the first diode and an anode of the second diode, and a semiconductor substrate is mounted on the semiconductor device. is there.

Example of Invention

The present invention will be described below using a three-terminal twin Schottky diode as an example. FIG. 3 is a sectional view of a three-terminal twin Schottky diode according to the present invention, and FIG. 4 is a capacitance equivalent circuit diagram thereof. The same parts as those in FIGS. 1 and 2 represent the same parts. The three-terminal twin Schottky diode (FIG. 3) according to the present invention is the same as the conventional one (FIG. 1) and has an N-type separation layer (hereinafter referred to as N
Form layer) 2c is newly provided. The N-type layer 2c has the same shape as the N-type layers 2a and 2b and is formed on the same main surface of the P-type silicon substrate 1 by the same step. The N-type layer 2c forms a balancing PN junction capacitor in the junction region with the P-type substrate 1. The N-type layer 2c is connected to the Schottky electrode 5b by the wiring electrode 6 and also to the terminal 9. The manufacturing process is almost the same as that of the conventional one, and the electrode wiring and wire bonding described above are carried out and it is incorporated into the TO-236.

The characteristics of the three-terminal twin Schottky diode are required to have the same characteristics between the common terminal 8 (also called a neutral terminal depending on the usage) and the two terminals 7 and 9. FIG. 4 is a capacitance equivalent circuit diagram between three terminals regarding the capacitance characteristic. C _Sa and C _Sb are Schottky diodes A
And B are represented by Schottky capacitances (capacitances when a Schottky diode is represented by a parallel equivalent circuit of a non-linear resistance and an electrostatic capacitance).
Since the electric characteristics of are almost equal, Cas = C _Sb . C _MOSa and C _MOSb are the _total equivalent capacitances of the so-called MOS capacitances of the wiring electrode and the substrate, each of which has a silicon oxide film as a dielectric,
It is possible to set C _MOSa = C _MOSb by making the shapes of the wiring electrodes almost the same. The junction capacitance formed between the N-type layer 2b and the P-type substrate 1 can be ignored in the capacitance equivalent circuit because the connection line 10 short-circuits the wiring electrode 6 and the terminal 8 of the N-type layer 2b. C _pNa is a PN junction capacitance when the N-type layer 2a is separated from the P-type substrate 1, and C _pNc is a balancing PN junction capacitance when the N-type layer 2c is separated from the P-type substrate 1. N-type layer 2a and N-type layer
Since 2c is formed on the same P-type substrate 1 in the same shape and in the same diffusion process, C _PNa = naturally when no bias is _applied.
It becomes C _PNc . When a forward bias is applied to the 3-terminal twin diode, a forward bias is applied between the N-type layer 2a and the P-type substrate (C _PNa ) and between the N-type layer 2c and the P-type substrate (C _PNc ). Is reverse biased and C _PNa and C _PNc
However, the difference is extremely small because the bias in the balanced mixer circuit is at most 0.4 V or less. The PN junction capacitance is, for example,
Total capacitance 0.8pF (Schottky capacitance 0.5pF, MOS capacitance, etc.
(0.1pF), which accounts for 0.2pF, the fluctuation of PN junction capacitance due to bias of 0.4V or less is relatively small. Therefore, the combined capacitance C ₇₈ between the terminal 7 and the common terminal 8 is (C _Sa + C _MOSa + C _PNa ), and the combined capacitance C ₉₈ between the terminal 9 and the common terminal 8 is (C _Sb + C _MOSb + C
_PNc ), and the agreement between C ₇₈ and C ₉₈ is significantly improved compared to the case where the balancing junction capacitance C _PNc is not provided.

The value of the balance PN junction capacitance C _pNc is as in this example.
It is not limited to _making it equal to C _pNa . For example, when C _MOSa and C _MOSb are different due to the difference in wiring electrode structure,
The value of C _PNC adjusts the PN junction area for balance (C _pNa + C
_MOSa- C _MOSb ).

〔The invention's effect〕

As is well known, the electric characteristics of semiconductor elements formed in the same step on the same substrate in an integrated circuit are substantially equal to each other even if the temperature changes. In addition to this feature, by applying the present invention having a structure in which capacitance between elements is well balanced, an extremely high quality semiconductor device can be obtained. In the 3-terminal twin Schottky diode according to the present invention described in the embodiments, the capacitance C ₇₈ and C between the terminals of the product
The difference with ₉₈ is so small that it can be ignored, and as a result of using this in the balanced mixer circuit in combination with the uniformity of the characteristics of the two Schottky diodes, the leakage of the local oscillation voltage is sufficiently reduced and the mixing efficiency is high. A quality mixer circuit characteristic was obtained.

[Brief description of drawings]

1 and 2 are cross-sectional views of a three-terminal twin Schottky diode and a capacitance equivalent circuit diagram thereof, respectively, for explaining the prior art, and FIGS. 3 and 4 are three-terminal twin Schottky diodes according to the present invention. FIG. 3 is a cross-sectional view of a diode and an equivalent circuit diagram of capacitance between terminals thereof. 1 ... P-type silicon substrate, 2a, 2b ... N-type isolation layer (referred to as N-type layer), 2c ... N-type isolation layer for capacitance balance correction (N
Form layer) 4 ... Insulating film, 5a, 5b ... Schottky electrode, 6 ... Wiring electrode, 7,8, 9 ... Terminal (also serves as the frame of TO-236), A, B ... Shot Key diode,
C _sa , C _sb Schottky capacitance, C _pNa …… PN separation junction capacitance, C _pNc …… Balance PN junction capacitance.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 21/8222 27/06 29/872 7514-4M H01L 27/06 101 D 8826-4M 29/48 F

Claims (1)

[Claims] 1. A three-terminal twin in which two Schottky diodes of the same shape monolithically integrated on one main surface of a semiconductor substrate and separated from each other by a PN junction separation method and one balancing PN junction capacitor are provided side by side. A semiconductor device comprising a Schottky diode, wherein the first terminal of the three-terminal twin Schottky diode is the anode terminal of the first diode and the balance
It is connected to the PN junction capacitor, the second terminal is the cathode terminal of the second diode, the third terminal is the common terminal of the cathode of the first diode and the anode of the second diode, and the semiconductor substrate is mounted. A semiconductor device characterized by: