JPH0790652B2 - Printer - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printing apparatus that stores printing data in an image memory and reads the data to print on a sheet.

(Prior Art) Various devices such as an electrophotographic printer, a thermal printer, and a wire dot printer are available as devices for printing print data created on a paper by a host controller such as a computer or a word processor. Are known.

FIG. 2 shows a block diagram of a printing apparatus adopting a conventional electrophotographic method.

In this apparatus, a processor 4, a program memory 5, a working memory 6, a font memory 7, an image memory 8 and a print engine interface 9 are connected to a system bus 3 connected to a host controller 1 via an interface 2. It is a composition. A print engine 10 is connected to the print engine interface 9.

The higher-level device 1 is a device such as a computer, a word processor, and an image reading device that creates print data. The interface 2 is a known circuit including a so-called RS232C interface and a parallel interface. The processor 4 is a circuit that controls the entire printing apparatus, and its execution program is stored in the program memory 5. The working memory 6 is a memory for storing and managing data transmitted and received by the interface 2. The font memory 7 is a memory that converts the character character code and other codes sent from the upper control device 1 into font data for printing.

The image memory 8 is composed of a random access memory for storing, for example, one page of print data which has been edited and imaged. Print engine 10
Is a device that prints on a printing sheet based on the printing data stored in the image memory 8, and is a device that includes a sheet conveying system, an electrophotographic process, and the like. The print engine interface 9 reads the print data 9a from the image memory 8 and transfers the print data 9a to the print engine 10 according to an instruction from the processor 4, or receives the print control signal 9b output from the print engine 10 and sends it to the processor 4 and the like. This is an interface circuit for transmitting.

The printing apparatus as described above temporarily stores, in the working memory 6, the control command, the character character code, the graphic command, the bit image data, etc. received from the higher-level control apparatus 1 via the interface 2, Under the control of the processor 4, print data imaged is created in the image memory 8.

The print data in the image memory 8 thus created is
It is processed as follows.

FIG. 3 is a conceptual diagram illustrating a conventional read operation of print output from an image memory.

As shown in the figure, the read address for the image memory 8
When 8a is input, each raster in the image memory 8,
, Are sequentially read and printed in that order (,, ...) to obtain the print output 20. That is, the data read from the image memory 8 is converted into a bit stream for each raster and sent to the print engine 10 in FIG. 2, and the print operation corresponding to the read is performed and the print output 20 is obtained. can get. Incidentally, the reading of data from the image memory 8 is usually performed in word units rather than in bit units.

FIG. 4 is an explanatory diagram more specifically showing a conventional method of reading a printout from an image memory.

As shown in the figure, the image memory is divided in units of 1 word (for example, 8 bits) for each raster. The data is (1) in this word unit in order,
(2), (3) ... Are read, and the print output as shown on the right side is obtained.

As can be seen from this figure, the data stored in the image memory 8 and its print output 20 have a one-to-one correspondence. Normally, the image memory 8 prints out about one page
Even if the memory capacity is set to 20 and the amount of information being printed out is very small, one page of print data is always stored in the image memory 8 and then printing is performed. Was there.

(Problems to be Solved by the Invention) In an electrophotographic printing apparatus, a photosensitive drum having a photosensitive layer formed on the outer periphery thereof is rotated at a constant speed, and a static image corresponding to printing data is printed on the photosensitive drum. An electric latent image is formed. The electrostatic latent image is developed with toner, transferred onto a sheet and fixed, but such a printing process is performed in a continuous operation and cannot be interrupted. Therefore, normally, after the print data is completely edited in the image memory 8, the conveyance of the paper is started and the printing process is started.

FIG. 5 is an operation explanatory diagram of a print engine that executes such a printing process.

In the figure, on the trays 11a and 11b, the paper 1 to be printed
2 are housed. This paper 12 is the hopping roller 1
It is pulled out by 3a or 13b and is transported on the transport path 14.

A photosensitive drum 15 and a writing device 16 for writing an electrostatic latent image on the outer periphery of the photosensitive drum 15 are arranged in front of the transport path 14. The writing device 16 is composed of, for example, a light emitting diode array or a laser head.

In this device, the paper 12 is conveyed through the conveyance path 14 and is transferred to the transfer position.
When W ₀ is reached, the toner on the photosensitive drum 15 is transferred, fixed by a fixing device (not shown), and discharged. Normal,
At a point W _P on the conveyance path, the sheet 12 is temporarily stopped by a registration roller or the like (not shown) and stands by, and the conveyance is resumed at the same time when the writing device 16 starts writing the electrostatic latent image. That is, while the photosensitive drum 15 rotates by l ₀ (angle α), the paper 12 is conveyed by l ₀ ′ and reaches the transfer position W ₀ .

In order to control such timing, the timing for transferring the printing data from the image memory 8 to the writing device 16 in FIG. 2 is such that the hopping roller 13a conveys the paper 12 by l ₁ or the hopping roller 13b moves the paper. 12 to l ₁ + l ₂
Only after being transported.

FIG. 6 is a time chart showing the timing of writing data to the image memory and reading the data.

As shown in the figure, when writing is started at time t ₀ and writing of the print data for the first page to the image memory is completed at time t ₁ , at time t ₂ , hopping roller 13a or 13b in FIG.
Starts feeding the paper 12. Then, after waiting until the time t _3, read from the image memory for printing data of the first page is started. Between times t _{2 and} t ₃ , the paper 12 pulled out from the trays 11 a and 11 b shown in FIG. 5 is transported to one point W _P on the transport path 14. Then, the transfer position W ₀ (fifth
(Fig.). In this way, the printing process of the first page proceeds.

On the other hand, if writing and reading of printing data to and from the image memory are alternately performed, the waiting time on the print engine side increases.

Therefore, in order to speed up the processing, the reading of the data of the first page is started, and the writing of the data of the second page is started before the reading is completed. From time t ₃ to time
During the time until t ₃ ′, the reading of the first page is started,
This is the time for securing a certain memory area for writing the data of the second page. Normally, comparing the data read time from the image memory and the write time to the image memory as shown in the figure, in the case of writing, it takes time to check the write margin, calculate the write address, access the font memory, etc. Therefore, the total processing time becomes a little longer.

Considering such a point, conventionally, when the image memory is to be used to the maximum extent, it is necessary to set the operation timing with reference to the writing operation.

FIG. 7 is a timing chart showing the timing of the conventional image memory writing operation.

As shown in the figure, when each page write operation to the image memory is marked with a symbol, ..., It is necessary to provide a waiting time of t _X1 between each write operation.

This waiting time is the time between times t _{1 and} t ₃ ′ shown in FIG. 6, and is the time to wait for the conveyance of the paper and the reading of a certain amount of data from the image memory. Therefore, in the printing apparatus in which the memory capacity of the image memory is one page, the timing shown in FIG. 7 is the timing of maximum efficiency, and it is not possible to achieve higher speed.

On the other hand, if the image memory for two pages is provided, it is possible to write the data to the image memory for another page while reading and printing the data from the image memory for one page. Wait time t _{X1 to} t shown in FIG.
_X5 can be eliminated.

FIG. 8 is a timing chart showing such a most desirable writing operation of the image memory.

As shown in this figure, the printing speed can be increased by increasing the capacity of the image memory. However, increasing the capacity of the image memory causes the cost of the apparatus to increase.
In particular, as the resolution of a print image increases, a large-capacity image memory is required, and there is a price difference between a printing apparatus having an image memory having a capacity of one page and an apparatus having an image memory having a capacity of two pages. It gets bigger and bigger.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a printing apparatus that speeds up printing without increasing the capacity of the image memory.

(Means for Solving the Problem) A printing apparatus according to the present invention includes an image memory for storing print data, a print control unit for writing print data in the image memory, and reading the print data from the image memory. The printing control unit divides a virtual page consisting of an image of one page virtually set corresponding to print output into a plurality of blocks, and the virtual page. When the data included in each block of the data determination unit that determines whether the data is blank data or valid data and the address of each block in the virtual page is called a virtual block address, the virtual block address of the accessed data is An address determination unit that determines whether the virtual block address of the data accessed immediately before is the same or different, and based on the determination result of the data determination unit , An image memory write control unit that selects only the valid data and writes the data in the image memory, a virtual block address in which the valid data was written, and the image memory in which the valid data is written. A mapping flag that associates a block address with each other and identifies, in the virtual page, a valid block containing the valid data and a blank block containing only the blank data, and a valid block written in the image memory. An address conversion unit storing a page identification flag for identifying the virtual page to which the image memory writing control unit belongs is provided, and when the image memory writing control unit accesses the data, the image memory write control unit accesses the data immediately before based on the determination result of the address determination unit. If the virtual block address of the data is different, refer to the address conversion unit to add Performs scan conversion, If virtual block addresses of data accessed immediately before is the same, is characterized in the use of address translation results when accessing the previous data.

(Operation) Even if the above apparatus has an image memory having a capacity of one page, for example, it is possible to store data for several pages depending on the content of print data.

First, a virtual page is set on the processor side for each page to be printed. Then, each virtual page is divided into a plurality of blocks. Of these blocks, blank blocks consisting only of blank data are excluded, and only valid blocks containing valid data are written to the image memory. For virtual pages with a lot of white space, this number of valid blocks is very small. Therefore, several pages of virtual pages can be stored in one page of image memory.

In this way, an address conversion unit is prepared in order to store valid data in a predetermined block of the image memory or read out the data stored in the image memory for printing.

The print control unit refers to the block address and the flag stored in the address conversion unit to identify the effective block and the blank block of each virtual page, and the effective block of which virtual page corresponds to which block address of the image memory. Recognize whether it is stored.

Then, at the time of data reading, the print control unit generates blank data for the blank block portion, and only valid data is read from the image memory at a predetermined timing.

When writing valid data to the image memory or reading valid data or blank data included in a valid block from the image memory, the address determination unit is currently trying to access before referring to the address conversion unit. The virtual block address of the data is compared with the virtual block address of the data accessed immediately before to determine whether they are the same.

If they are different, the address conversion is performed by referring to the address conversion unit. When the two are the same, the address translation is not performed, and the address that has already been translated is used to prevent unnecessary address translation.

As a result, the print output corresponding to the virtual page is obtained.

(Embodiment) <Device Configuration> The present invention will be specifically described below with reference to embodiments.

FIG. 1 is a block diagram showing an embodiment of the printing apparatus of the present invention. The overall configuration of this device is similar to that of FIG. 2, but in this device, writing and reading of data in the image memory 30 is controlled by the print control unit 40 as shown in the drawing.

This apparatus includes a block determination unit 41 that receives print data 60, an image memory write control unit 42 that assigns a write address of the data to the image memory 30, and an address that generates a word unit address of data to be accessed. A generation unit 43, an address determination unit 80 that compares the virtual block address of the data that is currently being accessed with the virtual block address of the data that was accessed immediately before, an address conversion unit 44 that performs predetermined address conversion, and an image. A connection switching circuit 45 for switching the input path of write data to the memory 30 or the output path of read data, and a printing section 50 are provided.

<Principle of Operation> Before explaining the detailed operation of this apparatus, first, the principle of operation of the apparatus of the present invention will be described with reference to FIG.

In FIG. 9, this example shows a case where printing of two virtual pages is requested.

First, here, the virtual page and are respectively divided into a plurality of blocks 62, 62 '. This block is, for example, one block having a structure of 128 × 128 bits. In this way, when a virtual page is divided into multiple blocks, each block is a blank block consisting of blank data only.
62 'and a valid block 62 containing valid data. Then, the print control unit 40 shown in FIG. 1 writes only the effective block 62 containing the effective data of each virtual page into the image memory 30. In this way, the image of each virtual page will be disassembled into pieces, but one page of image memory 30
On the other hand, the effective blocks 62 for two pages are stored with a sufficient margin.

In this way, after the print data is written in the image memory 30, in order to obtain the print output as shown in the right side of FIG. 9, the first block (coordinates (0,0 Block)) is a blank block 62 ', and if it is a blank block, the image memory writing control unit 42 of FIG. 1 generates blank data there and outputs it to the printing unit 50. If it is the effective block 62, the data corresponding to the effective block is read from the image memory 30 and the printing unit
Output to 50.

As a result, the print output corresponding to the virtual page and the print output can be reproduced. Further, as a result, it is possible to write the print data of the virtual page into the image memory 30 in parallel while the print output of the virtual page is being printed, so that the processing speed can be increased.

<Structure of Each Block> Returning to FIG. 1 again, a specific structure of such an apparatus of the present invention will be described.

In FIG. 1, the print data 60 is the virtual page 61.
As for the above, it is divided into a large number of blocks 62.

When performing a write operation, the data is in units of one word (for example, 8 bits), and the data determination unit 41 and the connection switching circuit 45.
And enter. The data determination unit 41 is a circuit that determines whether the write data for one word is blank data or valid data. That is, the write data and the reference value 41a (data set to the level of blank data) are input to the comparator 41b provided in the data determination unit 41. Then, the determination result is input to the image memory writing control unit each time.

The image memory writing control unit 42 is a circuit configured of a microprocessor, an LSI, or the like that controls writing of data to the image memory 30 and the like. This image memory writing controller
42, based on the determination result output from the comparator 41b, when the write data is blank data, it blocks the writing of the data to the image memory 30, and when it is valid data, the connection switching circuit
The write data input to the image memory 30 via 45 is controlled to be written at a predetermined address.

Therefore, when one block 62 of the virtual page 61 is entirely composed of blank data, the corresponding block is never written in the image memory. On the other hand, if there is valid data even in one word, the valid data is written in the image memory, and thereafter, the block including the valid data is treated as a valid block.

The address generator 43 is a circuit that generates the word address and outputs it to the image memory write controller 42 and the address determiner 80 in order to read the data of the virtual page 61 word by word.

When the address of each block of the virtual page is called a virtual block address, the address determination unit 80 uses the address generation unit.
The virtual block address of virtual page 61 output by 43 is
This is a circuit that compares the virtual block address output immediately before that and determines whether they are the same. This virtual block address is the upper bit of the word address above,
It corresponds to an address of a common portion through one block. For example, it is assumed that the address space of the virtual page 61 is represented by 24 bits, one block has a structure of 128 × 128 bits, and one word has 8 bits. When the intra-block address of each word is assigned to the lower bits, the intra-block address requires 11 bits. Therefore, of the total 24 bits, the upper 13 bits are the block address that represents the block. That is, the virtual block address generated by the address generation unit 43 and the virtual block address generated immediately before stored in the register 80a are input to the comparator 80b provided in the address determination unit 80. The determination result is input to the image memory writing control unit 42.

The address conversion unit 44 associates the mapping flag T for identifying whether each block is a valid block or a blank block with the block address RM of the image memory 30 in which each valid block is written in the virtual block address order of the virtual page 61. It has an address translation memory 44a. The address conversion memory 44a has a capacity capable of storing flags and the like for all virtual blocks of a plurality of virtual pages. Further, in addition to this, the address conversion unit 44 stores page identification flags P _{1 to} P _X for identifying which virtual page effective block is written in the block address of the image memory 30 in the order of the block address. for,
An empty block instruction memory 44b is provided.

Based on the determination result of the address determination unit 80, the image memory write control unit 42 determines that the virtual block address of the data to be written is the same as the virtual block address of the data written immediately before. Uses an address that has already been translated by referring to the address translation unit 44 stored in a register (not shown). The lower bits except for the block address are used as they are because they do not need to be converted. If it is different from the virtual block address of the data written immediately before, the data of each virtual page is written in the image memory 30 with reference to the address conversion unit 44 in the manner shown in FIG. In the case of printing, the data is read out toward the printing section 50 via the connection switching circuit 45.

The printing unit 50 is a print engine having the same mechanism as described with reference to FIG.

<Operation of Device> The printing device of the present invention having the above-described configuration operates as follows.

First, when the word address of the virtual page is generated from the address generating unit 43, the image memory writing control unit 42 reads the data of this word address from the virtual page 61 in word units (for example, 8-bit units). Next, the data judgment section
Based on the determination result obtained in 41, if the one-word data is blank data, writing to the image memory 30 is not performed, and if it is valid data, writing to the image memory 30 is performed. At this time, a fixed word address is generated from the address generation unit 43, and a strobe signal indicating that the fixed write data is input to the data determination unit 41 is output from the address generation unit 43. In response to this,
The image memory write control unit 42 outputs an acknowledge signal to the address generation unit 43 each time the data access processing is completed, which indicates that the next word address and write data can be accepted. When the data determination unit 41 determines valid data, the address determination unit 80 determines whether the virtual block address of the data accessed immediately before and the virtual block address of the data accessed this time are the same, Determine if they are different.

The determination result that the read data is valid data is input from the data determination unit 41 to the image memory write control unit 42, and the virtual block address generated by the address generation unit 43 is the virtual block address generated immediately before. When the determination result that is different from is input to the image memory writing control unit 42, the image memory writing control unit 42 refers to the address conversion memory 44a of the address conversion unit 44.

In addition, the determination result that the read data is valid data is obtained from the data determination unit 41 to the image memory writing control unit 42.
When the determination result that the virtual block address reflected by the address generator 43 is the same as the virtual block address generated immediately before is input to the image memory write controller 42, the image memory write control is performed. Part 42 is
It is obtained by referring to the address conversion memory 44a of the address conversion unit 44 at the time of the previous access without referring to the address conversion memory 44a of the address conversion unit 44 and stored in a register (not shown). Use the translated block address.

<Address Translation Unit> FIG. 10 shows a detailed operation explanatory diagram of the address translation unit.

The address conversion memory 44a stores a mapping flag T indicating whether the block containing the read data is a blank block and a block address RM of the image memory 30 into which the block is written. There is.
In the case of storing the first one-word data of each block, which is a blank block or a valid block, in the image memory 30, the mapping flag has an initial value of zero, and the block address RM of the image memory 30 is also undetermined. . As described above, each block writes one word at a time, but the valid data is the data determination unit.
When input to 41, the mapping flag is set to 1. In the block address RM of the image memory 30 of the address conversion unit 44, a predetermined block address of the image memory 30 is written at that time, and then the data of one word is written in the image memory.
Write to that block address of 30.

The data included in the same virtual block following the one-word data has the same virtual block address. Therefore, based on the output of the address determination unit 80, the image memory writing control unit 42 controls the writing to the image memory by adding the lower bit of the word address to the block address of the image memory held in the register.

On the other hand, when valid data included in a predetermined valid block of the virtual page 61 is written to a predetermined block address of the image memory 30, the free block instruction memory 44b of the address conversion unit 44 stores the image memory 30 of the image memory 30. A page identification flag is written for each block address in order to identify which virtual page of data is stored. Like the mapping flag, this page identification flag is 1 if it is mapped, zero if it is not mapped,
That is the content. Therefore, for each block address of the image memory 30, when the page identification flags are all zero, it is known that no block is mapped, and if any of the page identification flags is 1, it is already mapped. It turns out that it is a block. When determining a block address to write a new valid block, the empty block designating memory 44b is referred to.

In this way, when the address generator 43 of FIG. 1 supplies the address for one page to the image memory write controller 42, the data write of the virtual page for one page to the image memory 30 is completed. Then, subsequently, the data of the next virtual page is written.

<Data Writing Operation> Here, the data writing operation will be described more specifically.

First, when trying to write the first 1-word data of one block, the word address is
It is output from 43. The upper bits of this word address form a virtual block address, and the lower bits form an intra-block address.

When one word is determined to be blank data by the data determination unit 41, writing to the image memory 30 is not performed regardless of whether this block is a blank block or a valid block. Then, when the next data for one word is accessed, the virtual block address remains unchanged and the block address is incremented.

If the data for one word is blank data again, writing to the image memory 30 is not performed as in the previous case.
Then, it is assumed that valid data is accessed this time after several words have been accessed. The data determination unit 41 determines that the determination result of the valid data is the image memory writing control unit.
Output to 42.

Here, for the first time, the address conversion unit 44 rewrites the mapping flag of the corresponding virtual block address from 0 to 1. Then, the block address of the image memory 30 to write the data is determined. This is written in the address conversion memory 44a. The block address of the image memory 30 obtained by this address conversion is stored in the register or the like in the image memory write control unit 42 as described above.

After the block address of the image memory is determined in this way, the lower bit corresponding to the in-block address in the word address is added to the block address of the image memory 30 so that 1 word of valid data to be stored in the image memory 30. Used for writing.

When the next data is read from the block of virtual page 61, if this is valid data, the virtual block address is compared with the previous virtual block address. If the two match, the block address of the image memory stored in the image memory writing control unit 42 is used as it is,
The effective address is written in the image memory by adding the address in the block.

After that, for example, when blank data is input to the data determination unit 41 again, the writing is not performed. When writing is not performed, the data at the corresponding address of the image memory 30 is in the initial state, that is, the data having the same content as the blank data.

In this way, the block address of the image memory stored in the image memory writing control unit 42 is used until the data of the last one word of one block is read. That is, for one block, the address translation memory
You only have to refer to 44a once.

The addresses generated by the address generator 43 are not specified in order, and it does not matter whether they are sequential or random. In addition, the address to be generated may be the entire one page or a partial virtual page, and there is no problem.

<Data Read Operation> In parallel with these writing operations, printing of already written pages can be executed. In this case, first
The address generating unit 43 in the figure generates word addresses for the virtual pages 61 in the raster direction. The image memory writing control unit 42 refers to the address conversion memory 44a of the address conversion unit 44 based on the virtual block address which is the higher bit of this word address.

If the mapping flag T corresponding to the virtual block address is 1, the image memory 30 corresponding to the mapping flag T is 1.
All the data contained in the effective block are read from the image memory 30 by referring to the block address RM of, and the printing data is output to the printing unit 50 via the connection switching circuit 45. When the address conversion memory 44a is referred to and the mapping flag T is zero, the image memory write control unit 42 itself generates blank data for one block, and the blank data is generated via the connection switching circuit 45. And outputs it to the printing unit 50.

The address determining unit 80 compares the virtual block address generated by the address generating unit 43 with the virtual block address accessed immediately before, and the image memory write control unit 42 does not need to perform the same as when writing. Prevent repeated repeated address translations.

If such operations are sequentially executed in block units,
As shown in FIG. 9, the image on the virtual page 61 can be reproduced as a printout. When the reading is completed, the mapping flag T and the page identification flag of the virtual page are all cleared to zero to enable writing of the next virtual page.

<Modification> The present invention is not limited to the above embodiments.

The address conversion unit 44 associates the virtual block address in the virtual page 61 of the effective block with the block address of the image memory 30 in which the effective block is written as described above, and further, the effective block in the virtual page. And a blank block for identifying a blank block, and a page identification flag for identifying a virtual page to which a valid block written in the image memory belongs.

Therefore, as shown in FIG. 1, the address translation memory
It is not always necessary to provide the 44a and the empty block instruction memory 44b separately.

FIG. 1 shows a modification of the address conversion unit.

The address conversion unit stores the page identification flags P ₁ , P ₂ , P ₃ , P ₄ , the mapping flag T, and the image memory block address RM in a table corresponding to the virtual block address. There is.

Here, for example, the address conversion unit is configured assuming that the image memory stores four pages of virtual pages (in the case of a normal image, the maximum number of pages is about four). That is, the page identification flag is provided with 4 bits from P _{1 to} P ₄ , the mapping flag T, 1 bit, and the remaining 11-bit block address RM are prepared.

If such a table is stored in the memory of the address conversion unit 44, the processing described in FIG. 1 is executed.

If the table data are combined into one as described above, the control signal can be simplified and the memory capacity can be reduced, so that the circuit can be highly integrated (made into an LSI). If the mapping flag T is coded, the mapping flags for four pages can be displayed with 2 bits.

Further, when the content of the virtual page is simpler, more virtual pages can be written in the image memory 30 for one page.

FIG. 12 shows a modification of the address conversion unit when writing a large number of virtual pages in this way.

The data width of the address conversion unit is 16 bits as in the case of FIG. 1. Here, the page identification flags P _{1 to} P _X are taken in the required number of bits, and then the mapping flag T is taken in 1 bit to obtain the block address. The RM is divided into two, and one block address including the next 16-bit data is displayed. In this case, the virtual block address is 1
It goes without saying that it is set every other time.

With such a method, the configuration of the address conversion unit 44 itself can be simplified and the operation of the image memory write control unit 42 can be simplified.

Further, the present invention is not limited to the electrophotographic configuration of the printing unit,
It may be applied to any type such as a thermal printer type and a wire dot type. Further, the print control unit may be replaced with various circuits having the same function.

(Effects of the Invention) According to the printing apparatus of the present invention described above, an image memory having a relatively small capacity, for example, about one page is used to store printing data for two pages or more, and to efficiently perform addressing. After the conversion is completed, printing processing can be performed at high speed without waiting time. Further, the cost of the printing apparatus can be reduced by reducing the memory capacity.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a printing apparatus of the present invention,
FIG. 2 is a block diagram of a conventional printing apparatus, FIG. 3 is a conceptual diagram for explaining a read control of print output from a conventional image memory, and FIG. 4 is a concrete operation of read operation of print output from a conventional image memory. FIG. 5 is an explanatory view explaining an example, FIG. 5 is an operation explanatory view of the print engine, FIG. 6 is a time chart explaining writing / reading timing of a conventional image memory, and FIG.
FIG. 8 is a time chart for explaining a writing operation of a conventional image memory, FIG. 8 is a time chart for explaining a desirable writing operation of an image memory, and FIG. 9 is an explanatory view for explaining the operation principle of the printing apparatus of the present invention. FIG. 10 is a detailed operation explanatory diagram of the address conversion unit of the device of the present invention, and FIGS. 11 and 12 are explanatory diagrams showing a modified example of the address conversion unit of the present invention. 30 ... Image memory, 40 ... Print control unit, 41 ... Data determination unit, 42 ... Image memory writing control unit, 43 ... Address generation unit, 44 ... Address conversion unit, 44a ... Address conversion memory , 44b ... Empty block instruction memory, 45 ... Connection switching circuit, 50 ... Printing section, 60 ... Printing data, 80 ... Address determination section, 80a ... Register, 80b ... Comparator, 61 ... ... virtual page, 62 ... block, T ... mapping flag, RM ... image memory block address, P ₁ , P ₂ ... P _X ... page identification flag.

Claims (1)

[Claims] 1. An image memory for storing print data, a print control unit for writing print data in the image memory, and a print unit for performing printing while reading the print data from the image memory, The print control unit divides a virtual page including one page of images virtually set corresponding to print output into a plurality of blocks,
A data determination unit that determines whether the data included in each block of the virtual page is blank data or valid data, and when the address of each block in the virtual page is called a virtual block address, the virtual block of the accessed data An address determination unit that determines whether the address is the same as or different from the virtual block address of the data accessed immediately before, and based on the determination result of the data determination unit, selects only the valid data and stores it in the image memory. An image memory writing control unit for writing data, a virtual block address where the valid data was written, and a block address of the image memory where the valid data was written are associated with each other, and in the virtual page. ,
An address that stores a mapping flag that identifies a valid block including the valid data and a blank block that includes only the blank data, and a page identification flag that identifies a virtual page to which the valid block written in the image memory belongs. A conversion unit is provided, and the image memory write control unit, when accessing the data, based on the determination result of the address determination unit, if the virtual block address of the last accessed data is different, the address conversion unit The printing apparatus is characterized in that the address conversion is performed by referring to, and if the virtual block address of the data accessed immediately before is the same, the address conversion result at the time of accessing the data immediately before is used.