JPH0793353B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

Due to the miniaturization of the semiconductor device, the diameter of the contact opening is reduced, and the reliability of interlayer connection between the upper and lower wirings is reduced.

FIGS. 3A to 3D are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method for manufacturing a semiconductor device.

As shown in FIG. 3 (a), one conductivity type silicon substrate 1
-A thick field oxide film 2 is selectively provided on the main surface to partition an element formation region, a thin silicon oxide film 3 is provided on the surface of the element formation region, and an impurity of opposite conductivity type is ion-implanted into the element formation region. Then, the diffusion region 4 is provided. Next, the wiring 5 is selectively provided on the field oxide film 2, and the interlayer insulating film 6 is provided on the surface including the wiring 5 to flatten it.

Next, as shown in FIG. 3B, the interlayer insulating film 6 is selectively etched to provide contact openings 7 and 8 for the diffusion region 4 and the wiring 5, respectively. The portion 8 is formed shallower than the contact opening 7 of the diffusion region 4.

Next, as shown in FIG. 3C, the tungsten layer 9 is selectively grown only in the openings 7 and 8 by the low pressure CVD method to fill a part of the openings 7 and the entire openings 8.

Next, as shown in FIG. 3D, an aluminum layer is deposited on the entire surface and is selectively etched to provide wirings 12 and 13 connected to the tungsten layers 9 in the openings 7 and 8, respectively.

Here, in the contact of the opening 8, the filled tungsten layer 9 and the wiring 13 are satisfactorily connected in a plane. However, in the case of the opening 9, contact failure occurs if the step coverage of the wiring 1 is poor. . For example, when the diameter of the opening 7 is 0.6 μm and the depth up to the tungsten layer 9 is 0.5 μm or more, the step coverage of the aluminum layer is deteriorated and there is a high possibility that the wire will be disconnected.

[Problems to be Solved by the Invention]

In the above-described conventional semiconductor device, the depth of the plurality of contact openings provided in the interlayer insulating film is different, and if the difference in depth is large, the contact of the upper layer wiring provided in the opening on the deep side is unsuccessful. However, there is a problem in that the reliability of the semiconductor device is deteriorated due to disconnection of the semiconductor device.

An object of the present invention is to improve the step coverage of a deep contact opening by providing a conductive layer filling up to the upper end of each of the fine contact openings having different depths, thereby improving the reliability. It is to provide a method of manufacturing a device.

[Means for Solving the Problems]

A method of manufacturing a semiconductor device according to the present invention includes a method for selectively etching an interlayer insulating film provided on a surface including an element region and a wiring provided on a semiconductor substrate to connect with the element region or the wiring. Providing a deep first opening and a second opening shallower than the first opening according to the film thickness; and selectively growing a tungsten layer in the first and second openings to form the first opening. Filling up to the middle region of the opening and the upper end surface of the second opening, and a growth stop film made of a titanium nitride film or a silicon nitride film on the surface.
And selectively covering the surface of the tungsten layer with which the second opening is filled by providing it on the interlayer insulating film other than the opening of the first opening, and further forming a tungsten layer on the tungsten layer of the first opening. Selectively growing and filling up to the upper end surface of the first opening, and electrically connecting to each of the tungsten layers filled in the first and second openings to form a layer on the interlayer insulating film. And a step of selectively forming the extending wiring.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

1 (a) to 1 (d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1 (a), a thick field oxide film 2 is selectively provided on one main surface of a silicon substrate 1 of one conductivity type to partition an element formation region, and a surface of the element formation region is formed. A thin silicon oxide film 3 is provided. Next, an impurity of opposite conductivity type is ion-implanted into the element forming region in a self-aligned manner to form a diffusion region 4. Next, the wiring 5 of the polycrystalline silicon layer is selectively provided on the field oxide film 2, the interlayer insulating film 6 is provided on the surface including the wiring 5, and the surface of the interlayer insulating film 6 is flattened. Next, the interlayer insulating film 6 is selectively etched to provide the contact opening 7 of the diffusion region 4 and the contact opening 8 of the wiring 5. Here, the opening 7 is formed deeper than the opening 8.

Next, as shown in FIG. 1B, the tungsten layer 9 is selectively grown only on the diffusion regions 4 of the openings 7 and 8 and the wiring 5 by the low pressure CVD method to reach the upper end surface of the opening 8. When it does, it stops growing.

At this time, the tungsten layer 9 in the deep opening 7 has grown to the middle of the hole, but has not reached the upper end surface.
Then, the tungsten layer 9 in the opening 8 is formed by the growth blocking film in which the titanium nitride layer 10 having a high selectivity for the selective growth of the tungsten layer is selectively formed on the interlayer insulating film 6 other than the opening 7. To prevent the tungsten layer from being deposited by selective growth on the surfaces of the interlayer insulating film 6 and the titanium nitride layer 10 in the region other than the surface of the tungsten layer 9 in the opening 7.

Next, as shown in FIG. 1C, the tungsten layer 11 is formed only on the tungsten layer 9 in the opening 7 by the low pressure CVD method.
Are grown to the upper end surface of the opening 7 to fill the inside of the opening 7.

Next, an aluminum layer is deposited on the entire surface, and the aluminum layer and the titanium nitride layer 10 are selectively and sequentially etched to form a wiring 12 connected to the diffusion region 4 and a wiring connected to the wiring 5.
Form 13. Here, since the titanium nitride layer 10 used as the growth blocking film has conductivity, it need not be removed.

A silicon layer may be selectively grown instead of the tungsten layers 9 and 11.

2A and 2B are cross-sectional views of the semiconductor chip shown in the order of steps for explaining the second embodiment of the present invention.

As shown in FIG. 2A, a tungsten layer 9 is grown in the same process as that of the first embodiment described with reference to FIGS. 1A and 1B, and the silicon nitride film 14 is used instead of the titanium nitride 10. Are selectively provided as a growth stop film. Here, the silicon nitride film 14 has an advantage that the selectivity for the selective growth of the tungsten layer 11 is large. Next, the tungsten layer 11 is grown to the upper end of the opening 7 to fill the opening 7.

Next, as shown in FIG. 2B, wiring for removing the silicon nitride film 14 and electrically connecting to the diffusion region 4 and the wiring 5.
13 and 14 are selectively provided.

Here, instead of the silicon nitride film 14, a silicon oxide film or an aluminum oxide film may be used.

〔The invention's effect〕

As described above, according to the present invention, the tungsten layer is selectively grown only in the first and second contact openings having different depths, and the grown tungsten layer is opened in the shallow second contact opening. After filling up to the upper end of the portion, the surface other than the deep first contact opening is covered with a film that prevents the growth of tungsten, and then the tungsten layer is grown only in the first contact opening to form the first contact opening. By filling up to the upper end of the opening of each of the first and second openings and providing wirings connected to the tungsten layers in the first and second openings, respectively, good contact can be realized in each of the contact openings having different depths. Has the effect of improving the reliability of.

[Brief description of drawings]

FIGS. 1 (a) to (d) and FIGS. 2 (a) and (b) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first and second embodiments of the present invention. FIGS. 3A to 3D are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method for manufacturing a semiconductor device. 1 ... 1 Silicon substrate, 2 ... Field oxide film, 3 ...
... Silicon oxide film, 4 ... Diffusion region, 5 ... Wiring, 6 ...
… Interlayer insulating film, 7,8 …… Opening, 9 …… Tungsten layer, 10 …… Titanium nitride layer, 11 …… Tungsten layer, 12,1
3 ... Wiring, 14 ... Silicon nitride film.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/3205

Claims (1)

[Claims] 1. An interlayer insulating film provided on a surface including an element region and a wiring provided on a semiconductor substrate is selectively etched according to a film thickness of the interlayer insulating film for connecting to the element region or the wiring. A deep first opening and a second opening shallower than the first opening, and a tungsten layer is selectively grown in the first and second openings to form the first opening.
Filling up to the middle region of the opening of the second opening and the upper end surface of the second opening, and forming a growth prevention film made of a titanium nitride film or a silicon nitride film on the surface of the interlayer insulating film other than the first opening. A step of selectively providing the tungsten layer on the film to cover the surface of the tungsten layer filled in the second opening;
A step of selectively growing a tungsten layer on the tungsten layer in the opening to fill up to the upper end surface of the first opening, and each of the tungsten layers filled in the first and second openings. And a step of selectively forming a wiring that electrically connects and extends on the interlayer insulating film.