JPH079521B2 - Method of manufacturing active matrix substrate capable of detecting and repairing point defects - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a substrate which enables effective detection and repair of point defects in a substrate of active matrix organization used in an image display device.

2. Description of the Related Art Due to recent advances in microfabrication technology, liquid crystal materials, packaging technology, etc., it has become possible to obtain television images on a commercial basis that are small in size of about 2-6 inches, but are practically unproblematic for liquid crystal panels. It was Configure the LCD panel 2
Color display is easily realized by forming an RGB colored layer on one of the glass plates, and a so-called active type liquid crystal panel with a built-in switching element for each picture element has less crosstalk. Images with a high contrast ratio are guaranteed. Such a liquid crystal panel has 120-240 scanning lines and 240-7 signal lines.
A matrix organization of about 20 pieces is standard, and for example, one glass substrate 2 constituting a liquid crystal panel 1 as shown in FIG.
A seagage (COG) (Chip-On-Glass) method of directly connecting the semiconductor integrated circuit chip 3 that supplies a drive signal to the electrode terminal group 6 of the scanning line formed above, or for example, based on a polyimide resin thin film, An electrical signal is supplied to the image display unit by mounting means such as a method of fixing the connection film 4 having a gold-plated copper foil terminal group (not shown) to the electrode terminal group 5 of the signal line while pressing it with an adhesive. It Here, for convenience, two mounting methods are illustrated at the same time, but it goes without saying that either mounting method is actually selected. Numerals 7 and 8 are wiring paths for connecting between the image display portion in the center of the liquid crystal panel 1 and the electrode terminal groups 5 and 6 of the signal line and the scanning line, which are not necessarily made of the same conductive material as the electrode terminal group. There is no.

Reference numeral 9 is another glass plate having a transparent conductive counter electrode common to all the picture elements, and the two glass plates 2 and 9 are formed with a spacer at a predetermined distance, and the gap is a sealing material. It is a closed space sealed with a sealing material, and the closed space is filled with liquid crystal. Glass plate 9 in many cases
The glass substrate 9 is referred to as a color filter because an organic thin film containing one or both of a dye and a pigment called a coloring layer is applied to the closed space side of the above to provide a color display function. Depending on the properties of the liquid crystal material, a polarizing plate is attached to either the upper surface of the glass plate 9 or the lower surface of the glass plate 2 or both surfaces thereof, and the liquid crystal panel 1 functions as an electro-optical element.

FIG. 10 is an equivalent circuit diagram of an active liquid crystal panel in which an insulated gate transistor 10 is arranged as a switching element for each picture element. The element drawn by the solid line is formed on one glass substrate 2, and the element drawn by the broken line is formed on the other glass substrate 9. The scanning line 11 (8) and the signal line 12 (7) use, for example, amorphous silicon as a semiconductor layer,
Simultaneously with the formation of the thin film transistor 10 using a silicon nitride film (Si ₃ N ₄ ) as a gate insulating film, it is formed on the glass substrate 2. The liquid crystal cell 13 includes a transparent conductive picture element electrode 14 formed on the glass substrate 2, a transparent conductive counter electrode 15 formed on the color filter 9, and a closed glass plate composed of two glass plates. It is composed of liquid crystal that fills the space, and is electrically treated like a capacitor.

An alignment film needs to be formed on the transparent electrode in order to align the liquid crystal molecules in a predetermined direction, but a detailed description thereof will be omitted here.

As described above, the colored layer made of the colored photosensitive gelatin or the colored photosensitive resin is arranged according to the predetermined arrangement in the three primary colors of RBG (RGB) corresponding to the pixel electrodes on the closed space side of the color filter 9. Has been done. The counter electrode 15 common to all the pixel electrodes is formed on the coloring layer in order to avoid voltage distribution loss due to the presence of the coloring layer.

Although the storage capacitor 16 in FIG. 10 is not necessarily an essential component for an active liquid crystal panel, it improves the utilization efficiency of the driving signal source, suppresses the stray parasitic capacitance failure, and operates at high temperatures. Image flicker
It is effective for prevention and is appropriately adopted. 17 is a conductive path common to all storage capacitors 16, and 15 and 17 are generally connected and used.

As is well known, since an image display device is an object that is identified by a highly sensitive sensor, which is human vision, there are very severe restrictions on various image defects, not to mention line defects but point defects. Even then, it is very difficult to compare with CRT, in other words, the yield is low,
It's a difficult device to make. Further technological development will be needed in order for the yield to become extremely high and active type liquid crystal panels to be provided in a state close to that of non-inspection, and it will take some time, and similar to the silicon-based semiconductor process. As long as the manufacturing method is continued, no matter how much the yield is improved, it cannot be said to be 100% non-defective product.

A line defect is a defect that appears as a line on the screen, literally, and the reason for its occurrence is clearly caused by the causes described below.
(1) The scanning line or the signal line was broken on the way,
Mainly, (2) an electric signal does not reach the scanning line or the signal line, (3) the scanning line and the signal line are short-circuited, (4) a plurality of scanning lines or the signal line is short-circuited, etc. It is a factor. Line defects are relatively easy to detect even before the two glass plates are bonded to each other to form a liquid crystal panel, that is, even in the state of the active matrix substrate, and they can be apparently defect-free by repairing. .

The point defect inspection corresponds to, for example, a full-bit inspection in a semiconductor memory, and although it varies depending on the device structure, it is not hard to imagine that the inspection time is generally long and difficult. In fact, it is the actual situation that the point defects are also checked from the viewpoint of quality during the image inspection in the final process, and an inspection machine that can effectively detect the point defects during the manufacturing process has not yet been put to practical use. . It is an urgent task to reduce the point defects to improve the image quality.

Problems to be Solved by the Invention FIG. 11 shows an equivalent circuit of an example of improvement measures implemented to reduce the influence of a point defect on a display image. Insulation gate type transistor which is a switching element that constitutes a unit picture element and the picture element electrode are divided into a plurality of pieces (two in FIG. 11), and at least one set of insulation gate type transistor and picture element electrode is used for display. It is intended to secure the function. It is easy to understand that in this improvement measure, the deterioration of the display image due to the point defect that cannot be controlled by the electric signal is alleviated as compared with the surrounding pixel in which the plurality of pixel electrodes are normally operating. See. The degree of relaxation is more effective as the number of divided picture elements is larger. However, when the number of divisions is increased, the space for separating the elements does not contribute to the display, and the reduction of the aperture ratio is inevitable, so that it is obviously restricted. In addition, although the white spot defect is alleviated in the case of the normally black display method, it is always lit when there is no signal, so it is very noticeable unless the pixel is very small, and the degree of relaxation of the black spot defect is high. It is unavoidable that the effect is evaluated low compared with.

Figure 12 shows the equivalent circuit of another improvement. 2 in unit picture element
By arranging the insulated gate type transistors 10-1 and 10-2 and driving one liquid crystal cell 13 alternately (interlaced) by two sets of drive loops, one of the insulated gate type transistors is driven by the liquid crystal cell 13. It is said that even if it loses the current ability to charge the battery, it can avoid deterioration of display image quality. However, the two scanning lines 11 and 11 'naturally reduce the reduction of the aperture ratio, and the drawback that the driving method is limited to the interlace cannot be denied. In addition, the degree of improvement in white spot defects remains low compared to the normally black display method. The improvement measure in FIG. 12 should rather evaluate the feature that the redundancy is increased and the line is disconnected without being disconnected because the drive loop has two series.

In the above-mentioned improvement measures, even if a plurality of insulated gate type transistors, which are switching elements, are arranged to provide redundancy for the reduction of the current capacity, it is possible to prevent the control due to the internal short circuit of the insulated gate type transistors. It cannot be said that the essential problem that cannot be detected in the active matrix substrate state and eventually cannot detect the presence of the white spot defect unless the liquid crystal panel is used to display an image. Although the success rate is low by irradiating the liquid crystal panel with a laser to separate the insulated gate transistor having an internal short circuit from the pixel electrode, it is possible to convert a white dot defect into a black dot defect. When a plurality of insulated gate transistors are arranged, it is completely meaningless unless it is known which insulated gate transistor has an internal short circuit.

The present invention aims to solve such problems of the conventional technology.

Means for Solving the Problems The present invention first uses a removable wiring material so as to enable insulation of a driving element to be evaluated on an active matrix substrate so that the electrical characteristics of an insulated gate transistor that is a switching element can be evaluated. A temporary electrical connection is made between the gate type transistor and a necessary signal line, between the plurality of insulated gate type transistors, and further between the auxiliary insulated gate type transistors, and the like. An electrical inspection is performed to detect the position of the defective insulated gate transistor, which is the main cause of point defects. Then, it is determined based on the information on the position and type of the characteristic defect whether or not to advance the active matrix substrate in the panel assembling process. Prior to proceeding to the panel assembly process, the temporary connection made of removable wiring material is removed by etching devised so as not to adversely affect the regular wiring, and more than one insulated gate transistor is used. In the case where the unit picture element is configured, it is possible to eliminate the point defect by disconnecting the insulation gate type transistor having a characteristic failure such as having an internal short circuit and the picture element electrode by using a means such as a laser. The purpose is to obtain a repaired liquid crystal panel.

In a further improved manufacturing method, the pixel electrodes are formed after the electrical inspection of a plurality of insulated gate transistors is completed, and the insulated gate transistors with defective characteristics are selectively excluded so that only normal insulated gate transistors are formed. By sharing the pixel electrode, it is possible to suppress the generation of point defects with extremely high accuracy.

Effect In the present invention, the insulated gate type transistor for driving forms a closed loop so as to form a closed loop between the signal line outside the normal circuit configuration and the auxiliary insulated gate type transistor, or a plurality of insulated gate type transistors. It is formed as an active matrix substrate in a state of being temporarily connected by using a wiring material that can be removed in between. Therefore, it is possible to inspect the transistor characteristics of all insulated gate transistors electrically independently from the outside. Therefore,
The isolation or suppression of point defects is promoted by separating the driving insulated gate transistor having a defective characteristic or an internal short circuit from the pixel electrode. Since the wiring material used for the temporary connection is removed by an etching method selected so as not to affect other elements after the electrical inspection of the insulated gate transistor is completed, a secondary defect does not occur.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1A is an equivalent circuit of a liquid crystal panel having an active matrix structure according to a first embodiment which is the basic concept of the present invention. As can be seen from the comparison with the conventional example in FIG. 10,
The active matrix substrate in which the provisional connection line 20 is formed between the drain electrode of the insulated gate transistor 10 which drives the liquid crystal cell 13 and the adjacent signal line is inspected once in the inspection step. After the electrical inspection of the insulated gate transistor 10 is completed, for example, a signal adjacent to the drain electrode of the insulated gate transistor 10 is removed by a means such as removing the provisional connection line in the opening 21 formed to include the provisional connection line 20. By releasing the connection with the line, the circuit configuration finally becomes the same as that of the conventional liquid crystal panel.

The insulated gate transistor 10 has a function of alternatingly charging and discharging the liquid crystal cell 13 as a switching element, and its source and drain cannot be uniquely defined, but here it is customary to supply a video signal. The one connected to the signal line is defined as the source, and the one connected to the pixel electrode is defined as the drain.

According to the circuit configuration of FIG. 1 (a), the insulated gate transistor 10 (n, m) at the address (n, m) has two signal lines 12
If a DC voltage is applied between (m) and 12 (m + 1) and the current value flowing therethrough is measured, one scanning line 11
Since the transistor characteristics can be inspected by the magnitude of the DC voltage applied to (n), it is possible to inspect the electrical characteristics of all insulated gate transistors by repeating the above measurement on all signal lines and scanning lines. Become. As a result, it becomes possible to predict a point defect due to a defective characteristic of a driving insulated gate transistor which cannot be found unless a liquid crystal panel is formed as in the conventional case, and the effect is remarkably high.

The failure modes of the insulated gate transistor 10 are roughly classified into 1) a drain current is small with respect to a predetermined gate voltage, 2) a drain current constantly flows too much, 3) a gate and a drain are short-circuited (leakage), 4) There are four items, that is, the gate and the source are short-circuited (leakage). In the image display of the normally black display method,
In the case of 1), it becomes a black defect, in the cases of 2) and 3), it becomes a white spot defect, and in the case of 4), it becomes a cross-shaped line defect.

In the case of 1), the cause of the point defects irregularly occurring on each substrate is that the electrical contact between the pixel electrode, the insulated gate transistor and the source / drain wiring is unstable or lost. In some cases, the function of the insulated gate transistor may not be sufficiently exhibited due to the lack of the semiconductor layer. In case 2), the insulated gate transistor is turned off.
There are cases where the leakage current between the source and drain is too large and there is a case where the source and drain are short-circuited.
The former, which occurs as an abnormal film quality of the semiconductor layer in all insulated gate transistors, cannot cause point defects that occur irregularly on each substrate, and it is necessary to separately manage it by inspecting the monitor transistor. is there. In the circuit configuration of Fig. 1, 200-400 insulated gate transistors that are not inspected exist in parallel in the scanning line direction, but the ON / OFF ratio of insulated gate transistors is usually 5 digits or more. It does not hinder the inspection of the ON characteristics of. In the case of the latter occurrence, in the embodiment of FIG. 1, it is practically impossible to electrically test the insulated gate type transistors arranged in a line in the scanning line direction. A circuit configuration that enables electrical inspection even in such a case will be described in another embodiment.

If all the defects of the insulated gate transistor except the source and the drain are short-circuited can be known together with the generation address, it can be used as a defect, defective product or recyclable product in the panel assembling process according to preset judgment criteria. It is possible to avoid wasteful consumption of an expensive color filter after the progress is decided. In the first embodiment, since there is only one driving insulated gate transistor in the unit pixel, as a reproducible failure mode, a white spot defect is generated by a cutting means such as a laser against the short circuit of 3) and 4). Is only effective to convert the black dots into black spot defects. Needless to say, in the short circuit of 4), either the scanning line or the signal line must be cut to be converted into a disconnection, and a method for relieving the disconnection must be prepared at the same time.

It is difficult to say that the structure and manufacturing method of the insulated gate transistor have been established yet. Therefore, various structures and manufacturing methods of the active matrix substrate are conceivable.
FIG. 1B shows an example of a pattern layout diagram corresponding to FIG. The branch portions 22 and 23 of the signal line 12 are, for example, A1
Drain wiring 23
Is the pixel electrode 14 below the insulating layer and is the opening formed in the insulating layer
Connected through 24. The connection 20 between the drain and the adjacent signal line is formed in the same step as the scan line 11, for example.
A connection pattern 25 made of Cr is arranged, and the connection pattern 25 is formed between the drain wiring 23 and the branch portion 28 of the adjacent signal line through the openings 26 and 27 formed in the gate insulating layer on the connection pattern 25. There is. The release of the connection 20 is achieved by removing the Cr exposed by the opening 21 on the connection pattern 25 formed at the same time as the openings 26, 27 with a Cr etching liquid containing cerium nitrate as a main component. The Cr etching liquid has a low acidity of PH5-6 and does not corrode the signal line and source / drain wiring made of Al.

It is of course possible that the pixel electrode 14 and the drain electrode 23 are directly connected to each other instead of being connected through the opening 24, and the connection pattern 25 is made of a material different from that of the scanning line 11. Although it is possible to do so, the above-mentioned process is optimal in the sense that the number of manufacturing steps does not increase.

2 (a) and 3 (a) are equivalent circuits of a liquid crystal panel having an active matrix structure according to the second and third embodiments of the present invention. Compared with the first embodiment shown in FIG. 1, since two sets of driving insulated gate transistors are arranged in parallel, the redundancy is high with respect to the point defect relief as described later. Is characterized by. In order to electrically test the two sets of insulated gate transistors independently, it is necessary to prepare two sets of closed loops, each of which corresponds to the second and third embodiments.

First, according to the circuit configuration of FIG. 2 (a), the first insulated gate transistor 10-1 at the address (n, m) has two signal lines.
12 (m) and 12 (m + 1) and the first connection 20-1 form one closed loop, and the second insulated gate transistor 10
-2 forms another closed loop with the two signal lines 12 (m) and 12 (m + 2) and the second connection 20-2. Since two sets of insulated gate transistors share one scanning line 11 (n), a DC voltage is applied to the scanning line 11 (n) and the transistor characteristics of the two sets of insulated gate transistors are measured at the same time. You can also do it. A pattern layout diagram corresponding to FIG. 2 (a) is shown in FIG. 2 (b). First connection 20-
1 partially overlaps the second connection 20-2. Second connection
Since 20-2 needs to intersect with the signal line, inevitably a multilayer wiring formed in the same process as the scanning line is used at the intersection,
It is rational to connect the signal line and the drain of the insulated gate transistor through the opening. Connection 20 in Figure 2
-2 does not have a probability of being short-circuited to the signal line 12 (m + 1), but if short-circuited, the source-drain current of the first insulated gate transistor 10-1 will cause the second insulated gate transistor 10 -2 source / drain current is superposed and observed, so it is possible to judge the quality of the insulated gate transistor based on the magnitude of the current value, and the two openings 21-2 and 21-3 near the intersection. It can be seen that a secondary defect does not occur if the second connection can be released. FIG. 3 (a) shows a configuration in which the arrangement of the pair of insulated gate transistors and the pixel electrodes is changed. A pattern layout diagram corresponding to FIG. 3 (a) is shown in FIG. 3 (b). Show. It will be understood that the structure of the unit pixel is shifted by a half pitch in the scan line direction. In FIG. 2 (b), two picture element electrodes are arranged side by side in a rectangle formed by scanning lines and signal lines, and in FIG. 3 (b), two picture element electrodes are located on both sides of the scanning line. Therefore, it is closely related to the arrangement of the colored layer of the color filter. If the numbers are determined in FIG. 3 (a), the electrical inspection method for the two sets of insulated gate transistors and the temporary connection release are the same as those described above.

In the second and third embodiments, since two sets of insulated gate type transistors and picture element electrodes form a unit picture element,
In contrast to the normally black display method, the fact that one of the insulated gate transistors becomes black spot defect due to insufficient current capability is the same effect as before, but a short circuit between the gate and drain Since the generation position can be identified, a unique effect that a white spot defect can be converted into a black spot defect by using a cutting means such as a laser is produced.

In the first to third embodiments, when a short circuit occurs between the source and the drain of the insulated gate transistor, it is substantially impossible to measure the insulated gate transistors in one column, and it is not possible to detect the point defects completely. Since it cannot be said, an auxiliary insulated gate transistor was introduced, and the characteristics and internal short circuit of all driving insulated gate transistors were measured even if a short circuit between the source and drain occurred. As described in.

FIG. 4 (a) is an equivalent circuit of a liquid crystal panel having an active matrix structure according to a fourth embodiment showing the basic concept of the case where an auxiliary insulated gate transistor is introduced. A temporary connection line 20 is provided between the drain of the auxiliary insulated gate transistor 18 connected to the scanning line and the signal line adjacent to each other in the unit pixel and the drain of the insulated gate transistor 10 for driving.
Once the active matrix substrate with the
Inspect in the inspection process. After the electrical inspection of the insulated gate type transistor is completed, the temporary connection lines in the two openings 21-1 and 21-2 are removed to cause a secondary defect such as an internal short circuit of the auxiliary insulated gate type transistor 18. While preventing the above, the insulating gate type transistor for driving and the auxiliary insulating gate type transistor are separated. According to the circuit configuration of FIG. 4 (a), the driving insulated gate transistor 10 (n, m) at the address (n, m) is connected to the (n + 1, m +) via the connection line 20.
1) A closed loop having a common drain is formed with the auxiliary insulated gate transistor 18 connected to the address scanning line and the signal line. Therefore, two signal lines 12 (m) and 12 (m
+1), a direct current voltage is applied between the two and scanning line 11 (n) and scanning line 11 (n)
The quality of the two insulated gate transistors can be determined by the magnitude of the DC voltage applied to 11 (n + 1). For example, when a voltage sufficient to turn on the insulated gate transistor 10 is applied to the scanning line 11 (n) and a voltage that does not turn on the insulated gate transistor 18 is applied to the scanning line 11 (n + 1), the signal line 12 ( If a current flows between m) and 12 (m + 1), it can be seen that the source and drain of the auxiliary insulated gate transistor 18 are short-circuited, and it is extremely low in probability, but it is two. This is because it can be seen that the source and the drain of both of the insulated gate transistors are short-circuited as long as a current flows even though a voltage that does not turn on is applied to the scanning line. In this way, if the scanning lines and the signal lines are combined two by two, the characteristics and internal short circuits of all the driving insulated gate transistors and the auxiliary insulated gate transistors can be inspected. A pattern layout diagram corresponding to FIG. 4 (a) is shown in FIG. 4 (b). The pixel electrode 14 also plays a part of the temporary connection 20 in order to make the pixel electrode larger.

With a structure with only one driving insulated gate transistor, only white spot defects can be repaired by converting them to black spot defects. Therefore, it is possible to increase the redundancy against point defects by using two driving insulated gate transistors. . In that case, there are two combinations in which the driving insulated gate type transistor and the auxiliary insulated gate type transistor provide temporary connection so as to form a closed loop, and each embodiment is shown in FIG. 5 and FIG. . Since the equivalent circuit is complicated, the liquid crystal cell is omitted in the drawing.

According to the circuit configuration of FIG. 5 (a), the first of the addresses (n, m)
The insulated gate type transistor 10-1 of the above is an auxiliary insulated gate type transistor 18-1 connected to the scanning line and the signal line of the address (n + 1, m + 1) via the connecting line 20-1, and the second insulating type. The gate type transistor 10-2 forms a closed loop having a common drain with the auxiliary insulated gate type transistor 18-2 connected to the scanning line and the signal line at the address (n + 1, m + 2) via the connection line 20-2. is doing. Therefore, two scanning lines 11 (n) and 11 (n + 1), and two signal lines 12
(M) and 12 (m + 1) are used to form a first insulated gate transistor 10-1 and an auxiliary insulated gate transistor.
18-1 pass / fail judgment is performed and two scanning lines 11 (n) and 11
(N + 1) and two signal lines 12 (m) and 12 (m + 2)
Using the and, the quality of the second insulated gate transistor 10-2 and the auxiliary insulated gate transistor 18-2 is determined to determine whether the two driving insulated gate transistors at the address (n, m) are defective or defective. Can be done independently.

On the other hand, according to the circuit configuration of FIG. 6 (a), the first insulated gate transistor 10-1 at the address (n, m) is connected to the connection line 20-
An auxiliary insulated gate transistor 18-1 connected to the scanning line and the signal line at the address (n + 1, m + 1) via 1;
The second insulated gate transistor 10-2 is connected to the connection line 20.
-2 to form a closed loop having a common drain with the auxiliary insulated gate transistor 18-2 connected to the scanning line and the signal line at the address (n + 2, m + 1). Therefore, using the two scanning lines 11 (n) and 11 (n + 1) and the two signal lines 12 (m) and 12 (m + 1), the first insulated gate transistor 10-1 and the auxiliary The quality of the insulated gate transistor 18-1 is judged and the two scanning lines 11
(N) and 11 (n + 2), and two signal lines 12 (m) and 12
(M + 1) is used to determine the quality of the second insulated gate transistor 10-2 and the auxiliary insulated gate transistor 18-2 to determine whether the two insulated gate transistors for driving at the address (n, m). It is possible to independently judge the quality.

Pattern layout diagrams corresponding to FIGS. 5 (a) and 6 (a) are shown in FIGS. 5 (b) and 6 (b). In the configuration of FIG. 6 (a), in order to connect the drain of the second insulated gate type transistor 10-2 and the auxiliary insulated gate type transistor 18-2, it is necessary to intersect the scanning line 11 (n + 1). And the temporary connection 20-2 is the same as the signal line at the intersection.
Al pattern 29 is used.
It is understood that the temporary connection may be released by using Cr to partially remove the Cr connection pattern 30 in the openings 21-3 and 21-4 by etching.

Since there are two insulating gate type transistors for driving in a unit pixel and it is known which one of the insulating gate type transistors has a defective characteristic or an internal short circuit, a cutting means such as laser irradiation is used to form a white dot. As described above, it is possible to convert a defect into a black dot defect, and the degree of improvement with respect to the black dot defect is high.

Although it has a more complicated circuit configuration, by arranging four driving insulated gate type transistors in a unit pixel, it is possible to judge pass / fail of all the insulated gate type transistors without introducing an auxiliary insulated gate type transistor. It will be explained with reference to an embodiment described below. Also in this case 2
Two types of circuit configurations are conceivable depending on the configuration of the closed loop when the insulated gate type transistors are connected in series by a temporary connection line, each of which will be described with reference to FIGS. 7 and 8. The liquid crystal cell is omitted in the drawing and is shown as an active matrix substrate.

According to the circuit configuration shown in FIG. 7 (a), the first address at the address (n, m)
Of the insulated gate transistor 10-1 is connected to the scanning line and the signal line at the address (n + 1, m + 1) via the connection line 20-1, and the insulated gate transistor 10-3 and (n, m) second insulated gate transistor 10-2
Constitutes a closed loop having a common drain with the fourth insulated gate transistor 10-4 connected to the scanning line and the signal line at the address (n + 1, m + 2) via the connection line 20-2. Therefore, by using the two scanning lines 11 (n) and 11 (n + 1), and the two signal lines 12 (m) and 12 (m + 1), the first insulated gate transistor 10-1 and the third The quality of the insulated gate transistor 10-3 is judged to be two scanning lines 11 (n) and 11 (n + 1) and two signal lines 12 (m).
And 12 (m + 2), the second insulated gate transistor 10-2 and the fourth insulated gate transistor 10-4 are used.
By making a pass / fail judgment of 10-1, 1 of (n, m)
It is possible to independently perform pass / fail judgment of three insulated gate type transistors, 0-2 and 10-3, and 10-4 at the address (n, m + 1).

On the other hand, according to the circuit configuration of FIG. 8 (a), the first insulated gate transistor 10-1 at the address (n, m) is connected to the connection line 20-
A third insulated gate transistor 10-3 connected to the scanning line and the signal line at the address (n + 1, m + 1) via 1;
The second insulated gate transistor 10 at the address (n, m)
-2 constitutes a closed loop having a common drain with the fourth insulated gate transistor 10-4 connected to the scanning line and the signal line at the address (n + 2, m + 1) via the connection line 20-2. . Therefore, two scanning lines 11 (n) and 11 (n +
1) and the two signal lines 12 (m) and 12 (m + 1) are used to determine the quality of the first insulated gate transistor 10-1 and the third insulated gate transistor 10-3. Two
Scanning lines 11 (n) and 11 (n + 2), and two signal lines
By using 12 (m) and 12 (m + 1) to judge pass / fail of the second insulated gate transistor 10-2 and the fourth insulated gate transistor 10-4, 1 of the address (n, m) is obtained.
Three of 0-1, 10-2, 10-3 and 10 of (n + 1, m)
It is possible to independently judge the quality of four insulated gate type transistors of -4.

Pattern layout diagrams corresponding to FIGS. 7 (a) and 8 (a) are shown in FIGS. 7 (b) and 8 (b). By releasing the temporary connection line after the electrical inspection of the insulated gate transistor, the insulated gate transistor and the pixel electrode in the unit pixel are divided into four sets, but the same scanning line and signal line In order to display the same image by driving from, the arrangement of the colored layers on the color filter side is the first and second at the (n, m) address,
And must correspond to the third and fourth pixel electrodes at address (n-1, m-1).

Since there are four insulating gate type transistors for driving in a unit pixel and it is known which of the insulating gate type transistors has a defective characteristic or an internal short circuit, a cutting means such as laser irradiation is used to form a white dot. Needless to say, it is easy to convert a defect into a black dot defect, and the degree of improvement as a black dot defect is further enhanced. Therefore, it is possible to obtain a liquid crystal panel having virtually no apparent point defects.

In the embodiment described above, the formation of the pixel electrodes had already been completed when the active matrix substrate was completed. This is after following the conventional method of manufacturing a liquid crystal panel. However, in order to collect information such as characteristic defects of the insulated gate transistor for driving and internal short circuit which are the main causes of point defects (in the embodiment, the pattern layout diagram which is diverted as part of the temporary connection is also illustrated. (Although shown)
The pixel electrode is not always necessary, and by forming the pixel electrode after the electrical inspection of the insulated gate transistor is completed, a unique effect that cannot be obtained by simply multiplying the insulated gate transistor can be expected. An example of the present invention will be described.

In order to independently electrically inspect a plurality of driving insulated gate type transistors in a unit pixel, a plurality of insulated gate type transistors are provided on an insulating substrate together with scanning lines, signal lines and their connecting terminals. It is manufactured in the state where the interconnection between the elements is given by the removable wiring material. After completing the electrical inspection of the insulated gate transistors, the interconnection is released to separate the plurality of insulated gate transistors. By forming a pixel electrode shared only by normal insulated gate transistors on the basis of the electrical inspection data, it is possible to complete an active matrix substrate in which point defects are controlled with extremely high accuracy. This is because the insulated gate transistor having an internal short circuit that causes a white spot defect in the case of normally black display is not provided with the connection with the pixel electrode as described above, and the current which is the main cause of the black spot defect. This is because the insulated gate type transistor having insufficient driving capability is reinforced to enhance the current driving capability. In this sense, it is necessary to design a transistor with a surplus current driving capability in advance, and it can be said that this is an essential design item especially when the number of insulated gate transistors is two. It is known that the current driving capability of an insulated gate transistor is determined by W / L, which is the ratio of the channel width (W) to the channel length (L) in terms of pattern design.

There are two methods for avoiding the connection between one common pixel electrode and a defective insulated gate transistor having an internal short circuit. As a first method, when a pixel electrode is formed, the drain or drain wiring is removed by a cutting means such as a laser so that the defective insulated gate transistor and the pixel electrode are not connected to each other. Alternatively, the connection between the defective insulated gate type transistor and the scanning line or the signal line is similarly removed by laser, and it is rational to simultaneously perform the electrical inspection of the insulated gate type transistor.
As a second method, in the photo-etching process for forming the pixel electrodes, a positive type photosensitive resin is used and spot exposure is performed based on the data of the electrical inspection, and a defective insulated gate type is used. Part of the pixel electrode is removed from the transistor. The second method requires a slightly complicated process and requires data transfer for electrical inspection, but there is no possibility that the conductive material scattered on the substrate will cause a secondary defect like laser irradiation. .

Regarding the specific method of forming the pixel electrode after the formation of the insulated gate transistor, since there are various structures and manufacturing methods of the insulated gate transistor and it is not possible to cover all of them, the points to be particularly considered are described. I will keep it.

They are 1) do not damage the transistor characteristics of the insulated gate transistor so as not to be recovered by heat treatment, and 2) drain or drain wiring of the insulated gate transistor and a wiring layer that needs to be connected. To maintain ohmic contact between
It does not change the film thickness or film quality of other conductive layers or insulating layers, and industrially, by forming the pixel electrode after forming the insulated gate transistor, a new manufacturing process occurs or a special manufacturing machine is used. It is important to keep in mind that it will not be necessary and costly.

The effect of repairing point defects cannot be said to be sufficient unless a plurality of driving insulated gate transistors are prepared. Therefore, in the first to eighth embodiments, the pixel electrodes are not tested after the insulated gate transistor is inspected. The matrix formation to which the manufacturing method to be formed is effective and applicable is the second, third, fifth, sixth, seventh and eighth embodiments, and the pixel electrode is formed after the formation of the insulated gate transistor. It is not necessary to explain that only the change is necessary. However, in the second and third embodiments, when the source and the drain of the insulated gate transistor are short-circuited, the electrical inspection of the insulated gate transistors arranged in a line in the scanning line direction becomes impossible. Not.

When the auxiliary capacitance is introduced, it is clear that the intersection of the common line of the auxiliary capacitance and the temporary connection line is inevitably generated, and the probability of a short circuit occurring at the intersection is not 0. In the embodiments, an active matrix substrate having no auxiliary capacitance is described for easy understanding. However, since the temporary connection is finally removed, there is no fear of increasing defects and lowering the yield, and the effectiveness of the present invention is not impaired even in the case of the active matrix organization having the auxiliary capacity. However, it should be noted that an increase in the number of electrical inspection items cannot be avoided because a short circuit between the common line of the auxiliary capacitance and the scanning line, the signal line, or the temporary connection line forms an extra current path. The specific inspection contents are omitted in the present invention.

According to the gist of the present invention, there is no reason why the active matrix substrate is limited to the liquid crystal panel, and it is applicable to a device having a light emitting element such as EL or SiC as an optical element. The liquid crystal panel is not limited to the transmissive type described above, and is a very useful invention for a reflective type liquid crystal panel as long as the manufacturing process for forming the pixel electrodes can be slightly increased or decreased.

EFFECTS OF THE INVENTION As described above, according to the present invention, in manufacturing an active matrix substrate that constitutes a liquid crystal panel, a temporary insulating gate type transistor for driving, which is the main cause of point defects, can be electrically inspected. Connection lines, auxiliary insulated gate transistors, multiple insulated gate transistors or their provisional interconnection.
As a further improvement, a plurality of insulating gate type transistors for driving are formed, and the defective insulating gate type transistors are eliminated by electrical inspection, and then the pixel electrodes are formed in common. As a result, it is possible to estimate the occurrence of point defects before converting the active matrix substrate into a liquid crystal panel, avoiding the loss of wasteful use of expensive color filters, and its industrial value is immeasurable. There is no such thing. In addition, by combining it with the technique of using multiple insulated gate transistors, the degree of freedom in mitigating point defects is greatly enhanced, and in the most advanced form, it is possible to obtain an active matrix substrate that does not cause point defects in principle. It is evaluated as an extremely important technology from the viewpoint of improving the yield.

[Brief description of drawings]

1 to 8a are equivalent circuit diagrams of an active matrix substrate (liquid crystal panel) according to the present invention, respectively.
8b is a diagram showing an example of a pattern layout diagram in a unit picture element corresponding to FIGS. 1 to 8a, respectively, and FIG. 9 is a perspective view showing a mounting means on a liquid crystal panel, FIG. 10 is an equivalent circuit diagram of an active type liquid crystal panel, and FIGS. 11 and 12 are equivalent circuit diagrams of a disclosed example of a liquid crystal panel improved to alleviate point defects. 1 ... Liquid crystal panel, 2 ... Active matrix substrate,
3 ... Semiconductor chip, 4 ... Connection film, 5 ... Signal line electrode terminal, 6 ... Scan line electrode terminal, 9 ... Color filter, 10 ... Insulated gate type transistor, 11 ... Scan line, 12 …… Signal line, 13 …… Liquid crystal cell, 14 …… Pixel electrode, 15 …… Counter electrode, 16 …… Auxiliary capacitance, 18 …… Auxiliary insulated gate transistor, 20 …… Connecting line, 21 …… Opening, 22 …… Source wiring, 23 …… Drain wiring, 24,26,
27 …… Aperture, 25,30 …… Connection pattern, 28 …… Signal line branch, 29 …… Al multilayer wiring pattern.

Claims (14)

[Claims] 1. A method of manufacturing an active matrix substrate having a set of an insulated gate transistor and a pixel electrode at each intersection of a scanning line and a signal line, wherein a drain electrode of the insulated gate transistor ( mth) is
It is formed by being connected to the adjacent signal line (m + 1st),
A method for manufacturing an active matrix substrate capable of detecting point defects, characterized in that the connection is released after the electrical inspection of the insulated gate transistor is completed. 2. A method of manufacturing an active matrix substrate having two sets of insulated gate type transistors and pixel electrodes, wherein a circuit is provided by using a removable wiring material so that the electrical inspection of the insulated gate type transistors can be independently performed. Is formed, and the insulating wiring material is removed after the electrical inspection of the insulated gate transistor is completed, the method for manufacturing an active matrix substrate capable of detecting point defects. 3. A method of manufacturing an active matrix substrate having two sets of first and second insulated gate transistors and a pixel electrode, which have a gate electrode and a source electrode in common at each intersection of a scanning line and a signal line. First removable wiring material
Insulated gate transistor drain electrode (mth)
Is connected to the adjacent m + 1-th signal line, and the drain electrode of the second insulated gate transistor is also m + 2.
The method of manufacturing an active matrix substrate according to claim 2, wherein the active matrix substrate is connected to the second signal line and is disconnected after the electrical inspection of the insulated gate transistor is completed. 4. A source electrode is made common at each intersection of a scanning line and a signal line, and a gate electrode is connected to two adjacent scanning lines. A first and a second pair of insulated gate transistors and a pixel. In the method of manufacturing an active matrix substrate having an electrode, the pixel electrode is composed of a pair driven by the same scanning line, and the drain electrode (m-th) of the first insulated gate transistor is adjacent with a removable wiring material. Connected to the (m + 1) th signal line, and the drain electrode of the second insulated gate transistor is also formed to be connected to the (m + 2) th signal line. The connection is released after the electrical inspection of the insulated gate transistor is completed. The method for manufacturing an active matrix substrate according to claim 2, wherein the point defect can be detected. 5. In a method of manufacturing an active matrix substrate having one set or two sets of insulated gate type transistors and pixel electrodes at each intersection of a scanning line and a signal line, electrical inspection of the insulated gate type transistors is independent. A connection with an auxiliary insulated gate transistor is formed using a removable wiring material so that it can be carried out. A method for manufacturing an active matrix substrate capable of detecting and repairing point defects, which is characterized in that the electrodes are released. 6. A method of manufacturing an active matrix substrate having a set of a pair of insulated gate transistors for driving and a pixel electrode at each intersection of a scanning line (nth) and a signal line (mth), wherein a gate is an n + 1th gate. The drain electrode of the auxiliary insulated gate type transistor whose source is connected to the (m + 1) th signal line of the scanning line is connected to the drain electrode of the driving insulated gate type transistor with removable wiring material, and is formed as an insulated gate type 6. The point defect detection and repair according to claim 5, wherein the connection is released and the connection between the drive insulating gate type transistor having a defective characteristic and the pixel electrode is released after the electrical inspection of the transistor is completed. Manufacturing method of possible active matrix substrate. 7. An active matrix substrate having two sets of insulated gate transistors and a pixel electrode having a common gate electrode and source electrode at each intersection of a scanning line (nth) and a signal line (mth). In the manufacturing method, the gate is n + 1
The drain electrode of the auxiliary insulated gate transistor whose source is the (m + 1) th scanning line and whose source is the (m + 1) th signal line is the drain electrode of the first insulated gate transistor of the address (n, m) and the previous address (n, m). -1) The drain electrode of the second insulated gate transistor is formed by being connected with a removable wiring material, and after the electrical inspection of the insulated gate transistor is completed, the connection is released and the insulated gate transistor has a defective characteristic. The method for manufacturing an active matrix substrate capable of detecting and repairing point defects according to claim 5, wherein the connection with the pixel electrode is released. 8. An active matrix substrate having two sets of insulated gate transistors and a pixel electrode having a common gate electrode and source electrode at each intersection of a scanning line (nth) and a signal line (mth). In the manufacturing method, the gate is n + 1
The drain electrode of the auxiliary insulated gate transistor whose source is the (m + 1) th scanning line and whose source is the (m + 1) th signal line is the drain electrode of the first insulated gate transistor of the address (n, m) and the previous address (n−1). , m) is formed by being connected to the drain electrode of the second insulated gate transistor with a removable wiring material, and after the electrical inspection of the insulated gate transistor is completed, the connection is released and the insulated gate transistor is defective. The method for manufacturing an active matrix substrate capable of detecting and repairing point defects according to claim 5, wherein the connection with the pixel electrode is released. 9. In a method of manufacturing an active matrix substrate having four sets of insulated gate type transistors and pixel electrodes at each intersection of a scanning line and a signal line, an electrical inspection of the insulated gate type transistor can be independently performed. A connection between the insulated gate type transistors is formed by using removable wiring material, and after the electrical inspection of the insulated gate type transistor is completed, the connection is released and the connection between the insulated gate type transistor with defective characteristics and the pixel electrode is A method for manufacturing an active matrix substrate capable of detecting and repairing a point defect, which is characterized by being released. 10. A pair of first and second insulated gate transistors and a pixel electrode having a common gate electrode and source electrode at each intersection of a scanning line (nth) and a signal line (mth). And an n + 1th scanning line as a gate and an m + 1th signal line as a source, which are shared by two sets of third and fourth insulated gate transistors and a pixel electrode. ) The drain electrode of the first insulated gate transistor and the drain electrode of the third insulated gate transistor, and the drain electrode of the second insulated gate transistor and the fourth insulated gate of the next address (n + 1, m + 2) Type drain transistor is connected to the drain electrode by a removable wiring material, and after the electrical inspection of the insulated gate transistor is completed, the connection is released and the insulated gate transistor having defective characteristics and the pixel are formed. Detection and method for manufacturing an active matrix substrate capable of repairing a point defect according to claim 9, characterized in that the release of the connection between the pole is made. 11. A first and a second set of insulated gate transistors and a pixel electrode which have a common gate electrode and source electrode at each intersection of a scanning line (nth) and a signal line (mth). And an n + 1th scanning line as a gate and an m + 1th signal line as a source, which are shared by two sets of third and fourth insulated gate transistors and a pixel electrode. ) The drain electrode of the first insulated gate transistor and the drain electrode of the third insulated gate transistor, and the drain electrode of the second insulated gate transistor and the fourth insulated gate of the next address (n + 2, m + 1) Type drain transistor is connected to the drain electrode by a removable wiring material, and after the electrical inspection of the insulated gate transistor is completed, the connection is released and the insulated gate transistor having defective characteristics and the pixel are formed. Detection and method for manufacturing an active matrix substrate capable of repairing a point defect according to claim 9, characterized in that the release of the connection between the pole is made. 12. A method of manufacturing an active matrix substrate, wherein a plurality of insulated gate transistors are formed in a unit pixel so that they can be electrically inspected independently of each other. A method for manufacturing an active matrix substrate with repaired point defects, which is characterized in that a common pixel electrode is selectively formed except for. 13. A plurality of insulated gate transistors constituting a unit picture element and a plurality of insulated gate transistors together with a scanning line and a signal line so that they can be electrically inspected independently. An insulated gate that is formed by interconnecting elements and is disconnected after the electrical inspection of the insulated gate transistor is completed, and has a defective characteristic when one pixel electrode common to a plurality of insulated gate transistors is formed. 13. The point defect according to claim 12, wherein a part of the pixel electrode is formed so that the connection between the pixel transistor and the pixel electrode is selectively avoided based on the electrical inspection data. Of manufacturing a repaired active matrix substrate of. 14. A plurality of insulated gate type transistors constituting a unit picture element and a plurality of insulated gate type transistors and removable wiring materials together with scanning lines and signal lines so that they can be independently electrically inspected. The elements are interconnected and formed, and after the electrical inspection of the insulated gate transistor is completed, the interconnection is released, and the insulated gate transistor with defective characteristics is separated from the regular wiring by laser irradiation based on the electrical inspection data. 13. The method for manufacturing an active matrix substrate with repaired point defects according to claim 12, wherein one pixel electrode shared by a plurality of insulated gate transistors is selectively formed thereafter.