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JPH079750B2 - Wiring board - Google Patents
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JPH079750B2 - Wiring board - Google Patents

Wiring board

Info

Publication number
JPH079750B2
JPH079750B2 JP60016540A JP1654085A JPH079750B2 JP H079750 B2 JPH079750 B2 JP H079750B2 JP 60016540 A JP60016540 A JP 60016540A JP 1654085 A JP1654085 A JP 1654085A JP H079750 B2 JPH079750 B2 JP H079750B2
Authority
JP
Japan
Prior art keywords
wiring board
chip
memory device
connection
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60016540A
Other languages
Japanese (ja)
Other versions
JPS61177698A (en
Inventor
豊 秋庭
和夫 廣田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60016540A priority Critical patent/JPH079750B2/en
Priority to DE8686101084T priority patent/DE3685125D1/en
Priority to EP86101084A priority patent/EP0190642B1/en
Priority to US06/823,647 priority patent/US4694423A/en
Priority to DE8686101238T priority patent/DE3686728T2/en
Priority to EP86101238A priority patent/EP0189926B1/en
Publication of JPS61177698A publication Critical patent/JPS61177698A/en
Publication of JPH079750B2 publication Critical patent/JPH079750B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、磁気バブルメモリ装置等のチップを搭載した
配線基板の電気部品装置に係り、特に、上記磁気バブル
メモリ装置を小型化にして多端子に形成するのに好適な
配線基板に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric component device for a wiring board on which a chip such as a magnetic bubble memory device is mounted, and more particularly, the magnetic bubble memory device is miniaturized to have multiple terminals. The present invention relates to a wiring board suitable for forming.

〔発明の背景〕 従来の磁気バブルメモリ装置の配線基板は、例えば、特
開昭57−8981号に記載のように、同一基板面にバブルチ
ップを中央部に搭載し、外部接続端子の接続部を上記バ
ブルチップの周辺部に設けた構造となっていた。上記外
部接続端子の接続部を形成する面積は、上記配線基板の
面積のかなりの部分を占めるため、端子数を一定レベル
以上に増加する場合、上記接続部の面積が増加し、その
ため、上記配線基板が大きくなって上記磁気バブルメモ
リ装置全体が大型になるのが避けられない問題となり、
上記配線基板の高密度化に伴う多端子化と、上記磁気バ
ブルメモリ装置の小型化の要求に応じられない問題点と
なっていた。
BACKGROUND OF THE INVENTION A wiring board of a conventional magnetic bubble memory device has a bubble chip mounted on the same board surface in the center as described in, for example, Japanese Patent Application Laid-Open No. 57-8981. Was provided in the peripheral portion of the bubble chip. Since the area forming the connection part of the external connection terminal occupies a considerable part of the area of the wiring board, when the number of terminals is increased to a certain level or more, the area of the connection part increases, and therefore the wiring It becomes an unavoidable problem that the size of the magnetic bubble memory device becomes large because the substrate becomes large.
There has been a problem that it is not possible to meet the demand for higher terminal density of the wiring board and miniaturization of the magnetic bubble memory device.

〔発明の目的〕[Object of the Invention]

本発明は上記問題点を解決しようとするもので、その目
的は、外部接続端子を形成する接続部配線基板を、チッ
プの搭載部配線基板に対し折り返して層構造を形成さ
せ、上記外部接続端子を形成する接続部の配線基板の面
積を減少することなく、上記チップ搭載部配線基板の面
積を大にすることを可能にし、磁気バブルメモリ装置の
多端子化と、小型化を実現出来る磁気バブルメモリ装置
及びその配線基板構造を提供することにある。
The present invention is intended to solve the above-mentioned problems, and an object thereof is to fold back a connection wiring board forming an external connection terminal with respect to a mounting wiring board of a chip to form a layered structure. A magnetic bubble memory device capable of increasing the area of the wiring board of the chip mounting portion without reducing the area of the wiring board of the connecting portion forming the A memory device and a wiring board structure thereof are provided.

〔発明の概要〕[Outline of Invention]

本発明は、上記目的を達成するため、基板にチップを搭
載すると共に、外部接続端子の接続部を設けて成る配線
基板において、該配線基板の接続部を除いたチップ周辺
部をモールドで取り囲んた構造を支持体とし、該接続部
を該支持体の両側に折り返して配設し、該チップと3層
構造を形成したことを特徴とする磁気バブルメモリ装置
の上記配線基板構造をその手段とするものであって、上
記磁気バブルメモリ装置の高密度化、多端子化を可能に
して、かつ、小型化が実現出来るものである。
According to the present invention, in order to achieve the above object, a chip is mounted on a substrate, and in a wiring board provided with a connection portion of an external connection terminal, a peripheral portion of the chip excluding the connection portion of the wiring board is surrounded by a mold. The wiring board structure of the magnetic bubble memory device is characterized in that a structure is used as a support, and the connection portions are folded back on both sides of the support to form a three-layer structure with the chip. The magnetic bubble memory device can be made high in density, have a large number of terminals, and can be miniaturized.

〔発明の実施例〕Example of Invention

以下、本発明の一実施例を図面に基ずき説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の第1実施例を示す斜視図であり、磁気
バブルメモリ装置におけるチップを搭載した配線基板構
造を示す。
FIG. 1 is a perspective view showing a first embodiment of the present invention, showing a wiring board structure mounting a chip in a magnetic bubble memory device.

バブルチップ1(破線で示す)を搭載した配線基板2に
駆動コイル等の必要部品(図示せず)を組込んだ後、樹
脂モールド3を行い、角部4(4−1,4−2,4−3,4−
4)で配線基板2を取出し、外部接続端子(図示せず)
を形成する電極パターン23を有する接続部5(5−1,5
−2,5−3,5−4)を折り返して、ほぼ平行な2層の配線
基板構造としている。
After a necessary component (not shown) such as a drive coil is incorporated in the wiring board 2 on which the bubble chip 1 (shown by a broken line) is mounted, the resin mold 3 is performed and the corner portion 4 (4-1, 4-2, 4-3, 4-
4) Take out the wiring board 2 and external connection terminals (not shown)
Connection part 5 (5-1, 5 having electrode pattern 23 forming
-2,5-3,5-4) are folded back to form a substantially parallel two-layer wiring board structure.

第2図は第1図に示した接続部分を折り曲げる前の配線
基板の構造を示す。バブルチップ1を搭載した配線基板
2の搭載部6に、互に直行する駆動コイル7,8が巻線さ
れ、必要部品(図示せず)を組込んだ後樹脂モールド3
(1点鎖線で示す)を行った配線基板構造で1層状態を
示す。上記した接続部5とチップ搭載部6を有する配線
基板において第1図に示すように、接続部5を搭載部6
と重複した層構造になるように折り曲げることにより、
接続部5の面積を減少することなく搭載部6の面積を大
にすることが出来る。
FIG. 2 shows the structure of the wiring board before bending the connection portion shown in FIG. The drive coils 7 and 8 that are orthogonal to each other are wound around the mounting portion 6 of the wiring board 2 on which the bubble chip 1 is mounted, and after the necessary parts (not shown) are incorporated, the resin mold 3
The wiring board structure (shown by the one-dot chain line) shows a one-layer state. In the wiring board having the connecting portion 5 and the chip mounting portion 6 described above, as shown in FIG.
By bending it so that it has a layer structure that overlaps with
The area of the mounting portion 6 can be increased without reducing the area of the connecting portion 5.

第3図は第1図に示した接続部5の折り曲げる前の配線
基板の構造を示す他の実施例である。向い合う巻線の組
9−1,9−2と、10−1,10−2が各々互に平行になるよ
うに4ケ所に巻線が施された磁性材料からなる直方体コ
ア11および、このコアの作る空間内におかれたバブルチ
ップ1および、このチップを搭載した配線基板2の搭載
部6を、導体ケース12(2点鎖線で示す)で覆い、必要
部品(図示せず)を組込んだ後、樹脂モールド3(1点
鎖線で示す)を行った配線基板構造で、接続部5を導体
ケース12、樹脂モールド3の角部4(4−1,4−2,4−3,
4−4)から取り出した1層状態を示す。接続部を折り
曲げた後の固定を樹脂モールド3で行っているが、金属
ケース等の方法で行う場合もある。この場合には特に樹
脂モールド3で固定しなくともよい。また、配線基板2
を形成する基本構造として、(i)全体をフレキシブル
配線基板とする。(ii)接続部5または、搭載部6をセ
ラミックか、ガラスエポキシ基本等のリジット基板と
し、残りの部分をフレキシブル配線基板とする方法を用
いている。
FIG. 3 is another embodiment showing the structure of the wiring board before the connection portion 5 shown in FIG. 1 is bent. A rectangular parallelepiped core 11 made of a magnetic material having four windings so that the winding pairs 9-1 and 9-2 facing each other and 10-1 and 10-2 are parallel to each other. The bubble chip 1 placed in the space formed by the core and the mounting portion 6 of the wiring board 2 on which this chip is mounted are covered with a conductor case 12 (shown by a chain double-dashed line) to assemble the necessary parts (not shown). In the wiring board structure in which the resin mold 3 (indicated by a dashed-dotted line) is performed after the insertion, the connecting portion 5 is connected to the conductor case 12, and the corner portion 4 (4-1, 4-2, 4-3, 4-3,
4-4) shows a single-layer state taken out. Although the resin mold 3 is used to fix the connection portion after it is bent, it may be fixed by a method such as a metal case. In this case, the resin mold 3 need not be fixed. Also, the wiring board 2
As a basic structure for forming (i), the entire (i) is a flexible wiring board. (Ii) A method is used in which the connecting portion 5 or the mounting portion 6 is a rigid substrate made of ceramic or glass epoxy, and the remaining portion is a flexible wiring substrate.

第4図は本発明の第2実施例を示す斜視図である。バブ
ルチップ1を搭載した配線基板2に必要部品(図示せ
ず)を組込み、樹脂モールド3を行った後、2ケ所の側
面13(13−1,13−2)から接続部14(14−1,14−2)を
取り出し、折り曲げて形成した2層構造の配線基板2を
示す。
FIG. 4 is a perspective view showing a second embodiment of the present invention. After the necessary parts (not shown) are mounted on the wiring board 2 on which the bubble chip 1 is mounted and the resin mold 3 is performed, the side surface 13 (13-1, 13-2) at two places is connected to the connecting portion 14 (14-1). , 14-2) is taken out and bent to show a two-layer structure wiring board 2.

第5図は本発明の第3実施例を示す斜視図である。バブ
ルチップ1を搭載した配線基板2に必要部品(図示せ
ず)を組込み、樹脂モールド3を行った後、2ケ所の角
部15(15−1,15−2)から2軸方向に分れた接続部16
(16−1,16−2)を取出し、折り曲げて形成した2層構
造の配線基板2を示す。
FIG. 5 is a perspective view showing a third embodiment of the present invention. After incorporating the necessary parts (not shown) into the wiring board 2 with the bubble chip 1 mounted and then performing the resin molding 3, the two corners 15 (15-1, 15-2) are separated from each other in the biaxial direction. Connection 16
The wiring board 2 having a two-layer structure formed by taking out (16-1, 16-2) and bending it is shown.

第6図は本発明の第4実施例を示す斜視図である。チッ
プ1を搭載した配線基板2に樹脂モールド3を行った
後、2ケ所の側面17(17−1,17−2)全体から接続部18
(18−1,18−2)を取出し、折り曲げて形成した2層構
造の配線基板2を示す。
FIG. 6 is a perspective view showing a fourth embodiment of the present invention. After the resin molding 3 is performed on the wiring board 2 on which the chip 1 is mounted, the connecting portion 18 is formed from the entire two side surfaces 17 (17-1, 17-2).
The wiring board 2 having a two-layer structure formed by taking out (18-1, 18-2) and bending it is shown.

第7図は本発明の第5実施例を示す斜視図である。4ケ
のチップ1(1−1,1−2,1−3,1−4)を搭載した配線
基板2に樹脂モールド3を行った後、4ケ所の側面19
(19−1,19−2,21(21−1)のうち互に平行な面をもつ
組ごとに、接続部20(20−1,20−2),22(22−1)を
上下に折り曲げて、磁気バブルメモリ装置の上下両面に
外部接続端子(図示せず)を形成出来るようにした3層
構造の配線基板2を示す。
FIG. 7 is a perspective view showing a fifth embodiment of the present invention. After the resin mold 3 is applied to the wiring board 2 on which the four chips 1 (1-1, 1-2, 1-3, 1-4) are mounted, four side surfaces 19
(For each pair of 19-1, 19-2, 21 (21-1) that have mutually parallel planes, connect the connecting parts 20 (20-1, 20-2), 22 (22-1) up and down. A wiring board 2 having a three-layer structure, which is bent so that external connection terminals (not shown) can be formed on the upper and lower surfaces of the magnetic bubble memory device, is shown.

第1〜第5実施例に示す如く、本発明によれば、配線基
板における外部接続端子との接続部と、チップの搭載部
とを重複させることが出来るので、配線基板の接続部の
面積を減少させることが出来、また、上記チップの搭載
部の面積が上記接続部の面積よりも大きい場合、上記接
続部の面積を上記搭載部の面積まで大きく出来る効果が
ある。
As shown in the first to fifth embodiments, according to the present invention, the connection portion of the wiring board to the external connection terminal and the chip mounting portion can be overlapped, so that the area of the connection portion of the wiring board can be reduced. When the area of the mounting portion of the chip is larger than the area of the connecting portion, the area of the connecting portion can be increased to the area of the mounting portion.

〔発明の効果〕〔The invention's effect〕

チップを搭載した配線基板の構造において、外部接続端
子を形成する接続部配線基板と、上記チップの搭載部配
線基板に対して折り返して2〜3層の層構造を形成させ
た配線基板構造の磁気バブルメモリ装置は、該装置の小
型勝と同時に多端子化が実現出来る多大な効果がある。
In the structure of the wiring board on which the chip is mounted, the connection portion wiring board that forms the external connection terminal and the magnetic of the wiring board structure that is folded back to the mounting portion wiring board of the chip to form a layer structure of two to three layers The bubble memory device has a great effect that it is possible to realize a large number of terminals at the same time as the size of the device is reduced.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例を示す斜視図、第2図、第3
図は第1図における配線基板の接続基板の接続部を折り
曲げる前の構造を示す平面図、第4図、第5図、第6
図、第7図は本発明の第2〜5実施例を示す斜視図であ
る。 1……チップ、2……配線基板 3……樹脂モールド、5……接続部 6……搭載部
FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 and FIG.
The drawings are plan views, FIG. 4, FIG. 5, and FIG. 6 showing the structure before bending the connection portion of the connection board of the wiring board in FIG.
7 and 8 are perspective views showing second to fifth embodiments of the present invention. 1 ... Chip, 2 ... Wiring board 3 ... Resin mold, 5 ... Connection part 6 ... Mounting part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】基板にチップを搭載すると共に、外部接続
端子の接続部を設けて成る配線基板において、 該配線基板の接続部を除いたチップ周辺部をモールドで
取り囲んた構造を支持体とし、 該接続部を該支持体の両側に折り返して配設し、 該チップと3層構造を形成したことを特徴とする配線基
板。
1. A wiring board comprising a chip mounted on a board and a connection part for an external connection terminal, wherein a peripheral part of the chip excluding the connection part of the wiring board is surrounded by a mold as a support. A wiring board, characterized in that the connection part is folded back and disposed on both sides of the support to form a three-layer structure with the chip.
JP60016540A 1985-01-31 1985-02-01 Wiring board Expired - Lifetime JPH079750B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP60016540A JPH079750B2 (en) 1985-02-01 1985-02-01 Wiring board
DE8686101084T DE3685125D1 (en) 1985-01-31 1986-01-28 MAGNETIC BUBBLE MEMORY MODULE.
EP86101084A EP0190642B1 (en) 1985-01-31 1986-01-28 Magnetic bubble memory module
US06/823,647 US4694423A (en) 1985-01-31 1986-01-29 Magnetic bubble memory module
DE8686101238T DE3686728T2 (en) 1985-01-31 1986-01-30 MAGNETIC BUBBLE MEMORY MODULE.
EP86101238A EP0189926B1 (en) 1985-01-31 1986-01-30 Magnetic bubble memory module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60016540A JPH079750B2 (en) 1985-02-01 1985-02-01 Wiring board

Publications (2)

Publication Number Publication Date
JPS61177698A JPS61177698A (en) 1986-08-09
JPH079750B2 true JPH079750B2 (en) 1995-02-01

Family

ID=11919096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60016540A Expired - Lifetime JPH079750B2 (en) 1985-01-31 1985-02-01 Wiring board

Country Status (1)

Country Link
JP (1) JPH079750B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129668U (en) * 1982-02-24 1983-09-02 日本精機株式会社 Electrical connection structure of liquid crystal display device

Also Published As

Publication number Publication date
JPS61177698A (en) 1986-08-09

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