JPH0810125B2 - Semiconductor optical position detector - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor optical position detector that detects a spot-shaped optical position projected on a light receiving surface.

[Technical Background of the Invention and Problems Thereof] As a conventional semiconductor optical position detector, there is, for example, the one shown in FIG. 5 (JP-A-55-87007).

In the semiconductor optical position detector chip, a p-type layer 42 is formed on the main surface of a high-resistivity n-type Si substrate 41 to form a photo-detecting surface by a pn junction, and a back surface serves as a contact layer n ^+. The layer 43 is formed on the entire surface. The chip is formed in a rectangular shape in plan view.

When the p-type is the first conductivity type, the n-type, which is the opposite conductivity type, is the second conductivity type.

In the p-type layer 42, power sources 44 and 45 for taking out photocurrents I ₁ and I ₂ are formed at two positions separated by an interval length 1 along two opposite sides of the chip main surface.

The electrode 44 is grounded via a resistor 46 for current-voltage conversion,
A buffer amplifier 47a is connected to a connection point between the electrode 44 and the resistor 46a. The resistor 46a and the buffer amplifier 47a are both externally attached to the chip.

On the other electrode 45 side, similarly to the above, the external current-voltage converting resistor 46b and the buffer amplifier 47b are connected.

The photocurrents I ₁ and I ₂ are transmitted to the resistors 46a and 4 outside the chip as described above.
Signal processing of 6b and buffer amplifiers 47a, 47b is provided, converted into a voltage, amplified, and taken out.

On the other hand, an electrode 48 is attached to the entire surface or a part of the n ⁺ layer 43 on the back surface side, and the electrode 48 has a positive voltage + V via a resistor 49.
Connected to the power supply.

The pn junction on the light detection surface is reverse biased by the above positive voltage + V.

Now, assume that the pn junction is sufficiently reverse biased by the positive voltage + V, and the thickness of the p-type layer 42 is smaller than the diffusion length of minority carriers.

Then, as shown in FIG. 5, a spot is formed at a position of x = x ₀ on the x-coordinate on the light-receiving surface such that the positions of the electrodes 44 and 45 are x = −l / 2 and x = l / 2, respectively. If a circular-shaped light is projected, the photocurrents I ₁ and I ₂ extracted from the electrodes 44 and 45 are extracted.
Changes relative to the light projection position x ₀ and is expressed by the following equations.

I ₁ = I ₀ (1 / 2−x ₀ / l) (1) I ₂ = I ₀ (1 / 2−x ₀ / l) (2) where I ₀ is generated by the projected light and is taken out. Is the total photocurrent that is applied.

Projection of light by performing the calculation of x ₀ / l = (1/2) · (I ₂ −I ₁ ) / (I ₁ + I ₂ ) ... (3) from both equations (1) and (2) above. The position x = x ₀ is determined.

However, in the above-mentioned semiconductor optical position detector, since the photocurrents I ₁ and I ₂ having a minute value are guided to the external resistors 46a and 46b and the buffer amplifiers 47a and 47b through the connection lines. , Noise is apt to be introduced in the connecting wires and the portions such as the resistors 46a and 46b, while the loss of minute photocurrents I ₁ and I ₂ occurs in the portions such as the connecting portions of the electrodes 44 and 45, so that the S / N ratio is reduced. However, there is a problem in that the detection accuracy of the light position deteriorates.

Also, the resistors 46a and 46b and the buffer amplifiers 47a and 47b.
However, since it is provided outside the chip, there is a problem that the overall configuration of the detector including the signal processing section becomes relatively large.

[Object of the Invention] The present invention has been made based on the above circumstances, and an object of the present invention is to provide a semiconductor optical position detector capable of preventing a decrease in detection accuracy and achieving downsizing and compactification. .

[Summary of the Invention] In order to achieve the above object, the present invention is different in that a first conductivity type layer is formed on a portion of a second conductivity type epitaxial layer formed on a first conductivity type semiconductor substrate. The photodetection surface is formed by the junction of the conductivity type, and the light detection surface is relatively extracted according to the projection position of the light between the two positions taken out through the terminal portions provided at the two separated positions of the first conductivity type layer. A resistor for forming a sum current and a difference current of the varying photocurrents is formed in the epitaxial layer, and further connected to the device to convert the current output from the device into a voltage. By providing a layer and an amplifier which is formed in the epitaxial layer and amplifies the voltage converted by the resistance layer, the epitaxial layer has an island region for incorporating another element by selective diffusion of the isolation diffusion region. Since it can be easily formed, each element constituting the signal processing unit such as the resistor and the transistor can be easily incorporated on the chip together with the detector main body.

Embodiments of the Invention Embodiments of the present invention will be described below with reference to the drawings.

1 and 2 are views showing an embodiment of the present invention.

First, the structure will be described. In FIGS. 1 and 2, 1 is a p-type Si semiconductor substrate (substrate), and an n-type epitaxial layer 2 is formed on the semiconductor substrate 1.

At a required portion of the epitaxial layer 2, p-type impurities are selectively diffused to form p ⁺ isolation diffusion regions 3, and the epitaxial layer 2 is isolated by the p ⁺ isolation diffusion regions 3 to form an n-type island region. 2a, 2b and 2c (hereinafter referred to as islands) are formed.

4 is a n ⁺ buried layer, such as reduction of the collector resistance of the transistor can be achieved by the n ⁺ buried layer 4.

On the island 2a, first, p-type regions 5 and 6 are diffused and formed at two positions separated by a required distance, and a p-type layer 7 is formed between the two p-type regions 5 and 6 by ion implantation of boron (B).
Are formed. The n-type epitaxial layer 2 forming the island 2a and the p-type layer 7 form a pn junction to form a light detection surface.

An Al wiring layer 9 is in ohmic contact with each of the p-type regions 5 and 6 via a contact hole formed in the oxide film 8. The contact portions between the p-type regions 5 and 6 and the wiring layer 9 respectively form terminal portions 11 and 12 for taking out a photocurrent generated on the photodetection surface.

Thus, the photodetection surface made of a pn junction, and each terminal portion 11,
An optical position detection element 13 that serves as a detector main body is configured by 12 and the like.

In addition, in the land 2a, a resistor 1 for current-voltage conversion is formed by a p-type layer at a portion adjacent to both sides of the optical position detecting element 13.
4 and 15 are formed respectively. The p-type layers for forming the resistors 14 and 15 are simultaneously formed in the step of ion-implanting the p-type layer 7 forming the pn junction.

One end of the resistor 14 is directly connected to the p-type region 5 forming the terminal portion 11, and the other end is in ohmic contact with the wiring layer 9 via the p-type region 16.

Similarly to the above, the other resistor 15 has one end directly connected to the p-type region 6 forming the terminal portion 12 and the other end ohmic-contacted to the wiring layer 9 via the p-type region 17.

On the other hand, the other two islands 2b and 2c have np
n transistors 18 and 19 are formed. 20 and 20a are n ⁺ collector contact regions, and islands 2b and 2c are n.
Shaped collector area. Reference numerals 21 and 21a are p-type base diffusion regions, and 22 and 22a are n ⁺ emitter diffusion regions.

The transistor 18 constitutes an input-stage transistor of the differential amplifier 23, and the base region 21 which serves as an inverting input terminal thereof is directly connected to the terminal portion 11 of the optical position detecting element 13 via the wiring layer 9. Another transistor 19 is another differential amplifier.
The base region 21a, which constitutes 24 input stage transistors and serves as an inverting input terminal thereof, has another terminal portion 12 through the wiring layer 9.
Is directly connected to.

In FIG. 1, the overall configuration of the differential amplifiers 23 and 24 is shown as a block, but the transistors other than the transistors 18 and 19 constituting the differential amplifiers 23 and 24, resistors, etc. It is formed in another island portion (not shown) formed of the epitaxial layer 2.

The resistor 14 is connected via the wiring layer 9 between the inverting input terminal (−) of the differential amplifier 23 (the base region 21 of the transistor 18) and the output terminal, and the resistor 15 similarly connects the wiring layer 9 to the wiring layer 9. It is connected between the inverting input terminal (−) of the other differential amplifier 24 (the base region 21a of the transistor 19) and the output terminal thereof.

The reference voltage + Vr is applied to the non-inverting input terminals (+) of the differential amplifiers 23 and 24, respectively.

25 is an n ⁺ contact diffusion region for the island 2a,
The wiring layer 9 is in ohmic contact with the n ⁺ contact diffusion region 25. A positive power supply voltage + Vc is applied to the island 2a via the wiring layer 9 and the n ⁺ contact diffusion region 25.
c has been added.

Since a voltage of + Vr appears at each inverting input terminal (-) of the differential amplifiers 23 and 24 due to the principle of virtual short circuit, the pn junction of the optical position detecting element 13 is reverse biased with a voltage of Vcc-Vr.

An outline of an example of the manufacturing process will be described. An antimony (Sb) or arsenic (As) impurity is diffused into a required region of a p-type Si semiconductor substrate (substrate) 1 having a (111) plane as a main surface to be n ⁺ buried. Form layer 4.

Then, a phosphorus (P) -doped n-type epitaxial layer 2 is grown on the semiconductor substrate 1. After the oxide film 8 is formed, p-type impurities such as boron (B) are selectively diffused into the required portions of the epitaxial layer 2 to form the islands 2a, 2b and 2c.

A hole is formed in the diffusion film 8 at a required portion by photoetching, and boron (B) impurities and phosphorus (P) impurities are sequentially diffused to form p in each of the islands 2a, 2b, 2c.
Shaped regions 5, 6, 16, 17, p-type base diffusion regions 21, 21a,
And n ⁺ emitter diffusion regions 22, 22a and n ⁺ contact diffusion regions 20, 20a, 25 are formed.

The p-type layer 7 for forming the pn junction and the oxide film 8 at the portion where the resistors 14 and 15 for current-voltage conversion are formed are photo-etched, and boron (B) ions are implanted into this portion. After that, a thin oxide film having a thickness of about 1000 Å is formed on the ion-implanted portion.

Finally, a contact hole is formed in the oxide film by photoetching, an Al film is deposited and patterned to form the wiring layer 9.

 Next, the operation will be described.

The pn junction of the optical position detecting element 13 is reverse biased with a voltage of Vcc-Vr. When a spot-shaped light is projected at a certain position between the terminal parts 11 and 12, the value of the spotwise light is projected from the respective terminal parts 11 and 12 to the light projection position as shown in the equations (1) and (2). The photocurrents I ₁ and I _{2 that} are relatively changed in response to the photocurrents are extracted.

The extracted photocurrents I ₁ and I ₂ are respectively p-type regions 5 and
It flows into the resistors 14 and 15 for current-voltage conversion through only the portion 6 and is converted into a voltage, then amplified by the differential amplifiers 23 and 24 and taken out to the outside.

Since the photocurrents I ₁ and I ₂ having such a small value are converted into the voltage only through the p-type regions 5 and 6 in the same chip, an external resistor is connected via the conventional connecting line. In the process of conversion into voltage, photocurrent
No noise is added to the I ₁ and I ₂ signals, and there is almost no loss of minute photocurrent.

Further, even after being converted into a voltage, it is amplified to a required value by a differential amplifier incorporated in the same chip and then taken out to the outside.

Therefore, all the signal processing until it is amplified to the required value is performed in the same chip, so that a good S / N ratio can be obtained and the projection position can be accurately detected by the equation (3).

As described above, in this embodiment, the S / N ratios of the output currents I ₁ and I ₂ signals are good in terms of manufacturing.

Therefore, the required S / N ratio can be obtained even if the sheet resistance of the p-type layer 7 is lowered to some extent and the signal level is sacrificed to some extent, and the frequency characteristic can be improved. As a result, required frequency characteristics can be obtained even if the specific resistance of the n-type epitaxial layer 2 is lowered.

As a specific numerical example, when the distance between the two terminal portions 11 and 12 in the optical position detecting element 13 is 6 mm, the resistivity of the epitaxial layer 2 is 2 Ωcm, and the sheet resistance of the p-type layer 7 is 1 KΩ, A cutoff frequency of about 1MHz is obtained, and a sufficient response speed can be obtained as a sensor for mechanical displacement.

Here, in the present embodiment, the extracted photocurrent is simply voltage-converted and output. However, as shown in FIGS. 3 and 4, the signal processing circuit includes a sum current difference current generation circuit and a sum current difference current generation circuit. A configuration in which a peripheral circuit is configured by a light source drive circuit that controls a light source based on the output of a sum current difference current generation circuit and the like, and does not require a divider for performing the calculation of the above formula (3). You can also do it.

That is, reference numeral 26 in FIG. 3 denotes a sum current difference current generating circuit, and two terminal portions 11 and 12 of the optical position detecting element 13 are connected to the two input terminals 11a and 12a, respectively.

The sum current difference current generation circuit 26 inputs the _two photocurrents I ₁ and I ₂ extracted from the optical position detection element 13, outputs the sum current I ₁ + I ₂ from one output line 27, and outputs the other photocurrent I ₁ + I _2. Output line of
The differential current I ₂ −I ₁ is output from 28.

The details of the circuit configuration of the sum current difference current generation circuit 26 will be described later.

Reference numeral 29 denotes a light source which uses a laser, an LED, or the like, and may be one in which a light beam is guided from a generation source of the laser, the LED, or the like to a portion indicated by 29 in FIG. 3 with a glass fiber.

The sum current output line 27 in the sum current difference current generation circuit 26 is connected to the light source 29 via a light source drive circuit 30.

The light source driving circuit 30 controls the light intensity of the light source 29 so that the sum current I ₁ + I ₂ has a constant value.

31 is a resistor for current-voltage conversion, and resistor 31 is a differential amplifier
It is connected between the 32 inverting input terminals (-) and the output terminal.

The differential current I ₂ −I ₁ is converted to a voltage and then the differential amplifier 32
It is amplified and taken out. Incidentally, in FIG. 3, members which are the same as or equivalent to the members or parts in FIG.
The same reference numerals as those used above are used to omit redundant description.

Next, the details of the circuit configuration of the sum current difference current generation circuit 26 will be described.
This will be described with reference to FIG.

The sum current difference current generating circuit 26 is composed of five current mirror circuits 33 to 37. Of these, two current mirror circuits 35 and 36 are two secondary side transistors, respectively.
It has 35a, 35b, 36a, 36b.

Two secondary side transistors 35 of the current mirror circuit 35
A current I ₁ is generated in each of a and 35b, and a current I ₂ is generated in each of the two secondary side transistors 36a and 36b of the other current mirror circuit 36.

Then, of these currents, the sum of the currents I ₁ and I ₂ flowing in the transistors 35b and 36b is taken to generate the sum current I ₁ + I ₂ , and the current mirror circuit 37 also causes the transistors 36a and 3
The difference current I ₂ −I ₁ is generated by taking the difference between the currents I ₂ and I ₁ flowing in 5a.

As described above, since the sum current difference current generating circuit 26 is composed of a plurality of transistors, it is easy to build it on the semiconductor chip.

Therefore, the sum current difference current generation circuit in this embodiment
26, the light source drive circuit 30, the differential amplifier circuit 32, and the signal processing circuit such as the resistor 31 are also formed in the other island portion formed by the epitaxial layer 2 as in the case of the first embodiment.

Explaining the operation, negative feedback is applied to the light source 29 via the light source drive circuit 30, and the sum current I ₁ + I ₂ is controlled to have a constant value.

Therefore, the total photocurrent generated and extracted by the projected light
Since I ₀ has a relationship of I ₀ = I ₁ + I ₂ (4), the value of this total photocurrent I ₀ is controlled to a constant value.

By substituting the above equation (4) into the above equation (3), the following equation is obtained.

I ₂ −I ₁ = 2I ₀ (x ₀ / l) (5) From the above formula (5), the light projection position x = x ₀ is the difference current I ₂ −I ₁
It is calculated by multiplying the value of by l / (2I ₀ ).

Therefore, according to this embodiment, there is an advantage that the divider is unnecessary and the external peripheral circuit is simplified.

[Effects of the Invention] As described above, according to the present invention, the first conductivity type layer is formed in a portion of the second conductivity type epitaxial layer formed on the first conductivity type semiconductor substrate. A terminal for forming a photo-detecting surface by the junction of conductivity types and for extracting photocurrents that are relatively changed depending on the projection position of light between the two positions of the first conductivity type layer. Since the parts are provided, it is possible to easily form an island region for incorporating other elements in the epitaxial layer by selective diffusion of the isolation diffusion region, etc., and configure a signal processing unit such as a resistor for current / voltage conversion and a transistor. It becomes easy to form each element together with the detector body on one chip. Therefore, it is possible to easily prevent the deterioration of the S / N ratio of the output photocurrent, improve the detection accuracy, detect the light position with a simple circuit, and further reduce the size and size. There is an advantage that it becomes easy.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a semiconductor optical position detector according to the present invention, FIG. 2 is a plan view of the same embodiment as the above, and FIG. 3 is a main part of a development example of the same embodiment as above. 4 is a circuit diagram showing an example of the sum current difference current generating circuit in the same development example, and FIG. 5 is a sectional view showing a conventional semiconductor position detector. 1: semiconductor substrate, 2: epitaxial layer, 2a, 2b, 2c: island-shaped region, 7: p-type layer for photo-detecting surface configuration, 11, 12: terminal portion, 13: photo-position detecting element, 14, 15: Resistor for current / voltage conversion.

Claims (1)

[Claims] 1. An epitaxial layer of a second conductivity type is formed on a semiconductor substrate of a first conductivity type, and a first epitaxial layer is formed on the epitaxial layer.
A light detection surface is formed by forming a conductivity type layer and bonding different conductivity types, and light between the two positions is extracted through terminal portions provided at two positions separated from the first conductivity type layer. Means for outputting the sum current and the difference current of the respective photocurrents that relatively change depending on the projection position of the, are formed in the epitaxial layer, and are connected to the means to be formed in the epitaxial layer and output from the means. A semiconductor optical position detector, comprising: a resistance layer for converting the generated current into a voltage; and an amplifier formed in the epitaxial layer for amplifying the voltage converted by the resistance layer.