JPH0812871B2 - Field effect transistor - Google Patents
Field effect transistorInfo
- Publication number
- JPH0812871B2 JPH0812871B2 JP8406489A JP8406489A JPH0812871B2 JP H0812871 B2 JPH0812871 B2 JP H0812871B2 JP 8406489 A JP8406489 A JP 8406489A JP 8406489 A JP8406489 A JP 8406489A JP H0812871 B2 JPH0812871 B2 JP H0812871B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- active region
- gate electrode
- field effect
- effect transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005669 field effect Effects 0.000 title claims description 14
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 238000010894 electron beam technology Methods 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 3
- 239000004926 polymethyl methacrylate Substances 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
Landscapes
- Junction Field-Effect Transistors (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、断面Ｔ字形のゲート電極を有する電界効果
トランジスタに関するものである。Description: TECHNICAL FIELD The present invention relates to a field effect transistor having a gate electrode having a T-shaped cross section.
従来、電界効果トランジスタ電極は、下部寸法が上部
寸法より大きい台形あるいは三角形の形状であった。し
たがって、ゲート電極寸法が小さくなるにつれて、電極
の抵抗が大きくなり、低雑音トランジスタとしての特性
が劣化するという問題があった。Conventionally, field effect transistor electrodes have a trapezoidal or triangular shape with the lower dimension larger than the upper dimension. Therefore, there has been a problem that the resistance of the electrode increases as the size of the gate electrode decreases, and the characteristics of the low noise transistor deteriorate.
一方、近年ゲート電極の電極寸法が短くなっても、電
極抵抗が大きくならないように電極形状をＴ字形とし
た、特公昭63−119582号公報「半導体装置の製造方法」
に記載のものが知られている。前記公報記載の断面Ｔ字
形電極の構成を第３図に示す。すなわち、二酸化珪素
（SiO2）の絶縁膜２などでゲート電極５の下部寸法を決
め、さらに、この絶縁膜２が、電極５の上部張り出し部
を支えて、上部電極寸法が大きくなっても強度的な問題
が生じないように工夫が凝らされている。なお図中、１
はガリウム砒素基板、３はソース電極、４はドレイン電
極である。On the other hand, in recent years, the electrode shape is T-shaped so that the electrode resistance does not become large even if the electrode size of the gate electrode is shortened in recent years.
Those described in are known. FIG. 3 shows the structure of the T-shaped cross-section electrode described in the above publication. That is, the lower dimension of the gate electrode 5 is determined by the insulating film 2 of silicon dioxide (SiO 2 ), and the insulating film 2 supports the upper overhanging portion of the electrode 5 to increase the strength even if the upper electrode dimension increases. Has been devised so that there will be no problems. In the figure, 1
Is a gallium arsenide substrate, 3 is a source electrode, and 4 is a drain electrode.
〔発明が解決しようとする課題〕 以上述べた構造は、断面Ｔ字形の電極を保持する方法
として強度的な問題を改善しているものの、断面Ｔ字形
電極の上部張り出しが二酸化珪素（SiO2）等の絶縁膜を
介して半導体表面と接触しているため、ゲート電極５と
ソース電極３との間に寄生容量を持ち、電界効果トラン
ジスタの特性を劣化させるという欠点があった。[Problems to be Solved by the Invention] Although the structure described above solves the problem of strength as a method of holding an electrode having a T-shaped cross section, the upper protrusion of the T-shaped cross-sectional electrode has an overhang of silicon dioxide (SiO 2 ) Since it is in contact with the surface of the semiconductor through the insulating film such as the above, there is a drawback that it has a parasitic capacitance between the gate electrode 5 and the source electrode 3 and deteriorates the characteristics of the field effect transistor.
本発明の目的は、このような従来の欠点を除去せしめ
て、強度的な問題が生ぜず、特性を劣化させることがな
い、断面Ｔ字形電極を有する電界効果トランジスタを提
供することにある。It is an object of the present invention to provide a field effect transistor having a T-shaped cross-section electrode, which eliminates the above-mentioned conventional defects, does not cause a strength problem, and does not deteriorate the characteristics.
本発明の電界効果トランジスタは、ゲート電極が形成
される能動領域が分割されており、この能動領域上で
は、ゲート長は短く、能動領域以外のところでは、この
ゲート長が長いことを特徴とする。The field effect transistor of the present invention is characterized in that an active region in which a gate electrode is formed is divided, a gate length is short on this active region, and this gate length is long in a region other than the active region. .
本発明においては、ゲート電極を、能動領域上では、
下部電極寸法が上部電極寸法より小さい断面Ｔ字形電極
とすることができる。In the present invention, the gate electrode is
A T-shaped electrode having a lower electrode size smaller than the upper electrode size can be used.
本発明においては、断面Ｔ字形のゲート電極の形成さ
れる能動領域を分割して能動領域外に形成されるゲート
電極の下部寸法を大きくすることによって、強度的に弱
くなることを防いでいる。In the present invention, the active region in which the gate electrode having a T-shaped cross section is formed is divided to increase the lower dimension of the gate electrode formed outside the active region, thereby preventing weakening in strength.
また、能動領域上にある断面Ｔ字形ゲート電極の上部
張り出し部は、絶縁膜を介して半導体基板上に接してい
ないので寄生容量の増加は極めて小さい。Further, since the upper protruding portion of the T-shaped gate electrode in cross section on the active region is not in contact with the semiconductor substrate via the insulating film, the increase in parasitic capacitance is extremely small.
次に第１図および第２図を参照して本発明の一実施例
について説明する。Next, an embodiment of the present invention will be described with reference to FIGS.
本発明によって形成される、断面Ｔ字形のゲート電極
を有するGaAsMESFETは、第１図（ａ）と、そのＢ−Ｂ線
に沿う断面図である第１図（ｂ）と、Ｃ−Ｃ線に沿う断
面図である第１図（ｃ）とに示される。図中、11は能動
領域を構成するｎ形能動層、12はゲート電極、13はソー
ス電極、14はドレイン電極である。図示の例で、第１図
（ｂ）でのゲート電極12の形状は能動領域上の電極形成
を示し、第１図（ｃ）でのゲート電極12の形状は能動領
域外での電極形状を示す。A GaAs MESFET having a gate electrode with a T-shaped cross section formed according to the present invention is shown in FIG. 1 (a), FIG. 1 (b) which is a sectional view taken along the line BB, and CC line. It is shown in FIG. 1 (c) which is a sectional view taken along the line. In the figure, 11 is an n-type active layer forming an active region, 12 is a gate electrode, 13 is a source electrode, and 14 is a drain electrode. In the illustrated example, the shape of the gate electrode 12 in FIG. 1 (b) shows the electrode formation on the active area, and the shape of the gate electrode 12 in FIG. 1 (c) shows the electrode shape outside the active area. Show.
このMESFETの構造を、その製造方法を説明しつつ、さ
らに詳述する。第２図は、その製造工程を示す要部断面
図および平面図である。The structure of this MESFET will be described in more detail while explaining its manufacturing method. FIG. 2 is a cross-sectional view and a plan view of relevant parts showing the manufacturing process thereof.
まず第２図（ａ）に示すように、ｎ型の能動層11を有
するGaAs基板上にレジスト15を塗布形成し、電界効果ト
ランジスタの能動領域のパターニングを行って、ｎ型の
能動層11を露呈させ、次いで第２図（ｂ）に示すよう
に、露呈された能動層をエッチングにより取り除いた
後、レジスト15を除去する。この際、第２図（ｃ）に示
す上面図のように、１個の電界効果トランジスタを形成
する能動領域11は、いくつかの部分に分割されている。
図示の例では、例えば10μｍ幅の能動領域とこの能動領
域にはさまれた１μｍの非能動領域で構成されている。First, as shown in FIG. 2 (a), a resist 15 is formed by coating on a GaAs substrate having an n-type active layer 11, and the active region of the field effect transistor is patterned to form the n-type active layer 11. It is exposed, and then, as shown in FIG. 2B, the exposed active layer is removed by etching, and then the resist 15 is removed. At this time, as shown in the top view of FIG. 2 (c), the active region 11 forming one field effect transistor is divided into several parts.
In the example shown in the figure, for example, it is composed of an active region having a width of 10 μm and a non-active region having a width of 1 μm sandwiched between the active regions.
次いで第２図（ｄ）に示すように、電界効果トランジ
スタのソース電極13及びドレイン電極14となるオーミッ
ク金属を蒸着後、アロイを行って電極を形成する。Next, as shown in FIG. 2 (d), an ohmic metal to be the source electrode 13 and the drain electrode 14 of the field effect transistor is vapor-deposited and then alloyed to form electrodes.
次に第２図（ｅ）に示すように、低感度の第１のポジ
型レジスト（例えば、PMMA）16を1000Åから3000Åの厚
さで塗布形成した後、このレジストを覆うように、この
レジスト16より高感度の第２のポジ型レジスト（例え
ば、PMMA）17を6000Åから１μｍの厚さで塗布形成す
る。次いで、電子線18により露光し現像することによっ
て、第２のポジ型レジストのみを開口し、第１のレジス
ト16を露呈する。露光条件としては、例えば、加速電圧
25keV,露光量1.8nC/cmである。Next, as shown in FIG. 2 (e), a low-sensitivity first positive type resist (for example, PMMA) 16 is applied and formed to a thickness of 1000Å to 3000Å, and then this resist is covered so as to cover the resist. A second positive type resist (eg PMMA) 17 having a higher sensitivity than 16 is applied and formed in a thickness of 6000Å to 1 μm. Then, by exposing with electron beam 18 and developing, only the second positive type resist is opened to expose the first resist 16. The exposure conditions include, for example, acceleration voltage.
It is 25 keV and the exposure amount is 1.8 nC / cm.
次いで、第２図（ｆ）に示すように、電子線19により
露呈した第１のポジ型レジスト16を露光し、現像するこ
とにより、開口部が断面Ｔ字形のレジストパターンを形
成する。このとき、能動領域上の露光量は、例えば、加
速電圧25keVで、1nC/cm、非能動領域では、加速電圧25k
eVで、3nC/cmとすれば、能動領域上での開口幅は短く、
非能動領域での開口幅は長くなる。Then, as shown in FIG. 2F, the first positive resist 16 exposed by the electron beam 19 is exposed and developed to form a resist pattern having a T-shaped cross section. At this time, the exposure dose on the active region is, for example, 1 nC / cm at an acceleration voltage of 25 keV, and 25 kV at the non-active region.
If eV is 3 nC / cm, the aperture width on the active area is short,
The opening width in the non-active region becomes long.
次いで、第２図（ｇ）に示すように、ゲート電極12を
形成する金属20、例えば、チタン（Ti）／アルミニウム
（Al）を蒸着した後、酸素（O2）プラズマあるいは、有
機洗浄によって、レジスト上の不要の蒸着金属を除去す
る。こうすることによって、第１図に示すような構造の
MESFETが形成される。Then, as shown in FIG. 2 (g), after depositing a metal 20 for forming the gate electrode 12, for example, titanium (Ti) / aluminum (Al), by oxygen (O 2 ) plasma or organic cleaning, Unwanted evaporated metal on the resist is removed. By doing so, the structure shown in FIG.
A MESFET is formed.
すなわち、本実施例のMESFETでは、ゲート電極12の形
成される能動領域が分割されており、この能動領域上で
は、ゲート電極の長さは短く、能動領域以外のところで
は、このゲート電極の長さが長く、またこのゲート電極
は、能動領域上では、下部電極寸法が、上部電極寸法よ
り小さい断面Ｔ字形電極である。That is, in the MESFET of the present embodiment, the active region in which the gate electrode 12 is formed is divided, the length of the gate electrode is short on this active region, and the length of this gate electrode is other than the active region. Also, the gate electrode is a T-shaped electrode having a lower electrode dimension smaller than the upper electrode dimension on the active region.
以上の実施例はMESFETについて説明したが、HEMTなど
の電界効果トランジスタすべてに適用できる。また、電
子線露光用レジストとしてPMMAを例示したが、電子線に
対して感度をもち、相互に混じり合わないレジストなら
使用できる。さらに、ゲート電極の断面形状も、Ｔ字形
に限られるものではない。Although the above embodiments have been described with respect to MESFETs, they can be applied to all field effect transistors such as HEMTs. Although PMMA is exemplified as the resist for electron beam exposure, any resist that has sensitivity to electron beams and does not mix with each other can be used. Further, the sectional shape of the gate electrode is not limited to the T shape.
以上説明したように、電界効果トランジスタの能動領
域を分割し、能動領域上のゲート電極の下部寸法を小さ
く、非能動領域上のゲート電極の下部寸法を大きくする
ことによって、ゲート電極の物理的強度を増し、さらに
ゲート電極の張り出し部分が絶縁膜を介して基板と接し
ていないので寄生容量の増加が抑えられ素子特性の改善
がはかれる。As described above, by dividing the active region of the field effect transistor, reducing the lower dimension of the gate electrode on the active region and increasing the lower dimension of the gate electrode on the inactive region, the physical strength of the gate electrode is reduced. In addition, since the overhanging portion of the gate electrode is not in contact with the substrate via the insulating film, increase in parasitic capacitance can be suppressed and the device characteristics can be improved.
第１図は本発明の一実施例であるGaAsMESFETを示す図、 第２図は第１図の電界効果トランジスタの製造工程を説
明するための図、 第３図は従来例を示す図である。 １……ガリウム砒素基板 ２……絶縁膜 3,13……ソース電極 4,14……ドレイン電極 5,15……ゲート電極 11……ｎ型能動層 15……レジスト 16……低感度ポジ型レジスト 17……高感度ポジ型レジスト 18,19……電子線 20……ゲート蒸着金属FIG. 1 is a diagram showing a GaAs MESFET which is an embodiment of the present invention, FIG. 2 is a diagram for explaining a manufacturing process of the field effect transistor of FIG. 1, and FIG. 3 is a diagram showing a conventional example. 1 …… Gallium arsenide substrate 2 …… Insulating film 3,13 …… Source electrode 4,14 …… Drain electrode 5,15 …… Gate electrode 11 …… N-type active layer 15 …… Resist 16 …… Low sensitivity positive type Resist 17 …… High-sensitivity positive resist 18,19 …… Electron beam 20 …… Gate evaporated metal
Claims (2)
れており、この能動領域上では、ゲート長は短く、能動
領域以外のところでは、このゲート長が長いことを特徴
とする電界効果トランジスタ。1. A field effect transistor characterized in that an active region in which a gate electrode is formed is divided, and a gate length is short on this active region, and this gate length is long in a region other than the active region. .
寸法が上部電極寸法より小さい断面Ｔ字形電極であるこ
とを特徴とする請求項１記載の電界効果トランジスタ。2. The field effect transistor according to claim 1, wherein the gate electrode is a T-shaped electrode having a lower electrode dimension smaller than an upper electrode dimension in the active region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8406489A JPH0812871B2 (en) | 1989-04-04 | 1989-04-04 | Field effect transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8406489A JPH0812871B2 (en) | 1989-04-04 | 1989-04-04 | Field effect transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02263443A JPH02263443A (en) | 1990-10-26 |
| JPH0812871B2 true JPH0812871B2 (en) | 1996-02-07 |
Family
ID=13820066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8406489A Expired - Lifetime JPH0812871B2 (en) | 1989-04-04 | 1989-04-04 | Field effect transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0812871B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4917269B2 (en) * | 2005-04-18 | 2012-04-18 | サンケン電気株式会社 | Semiconductor device |
-
1989
- 1989-04-04 JP JP8406489A patent/JPH0812871B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02263443A (en) | 1990-10-26 |
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