JPH0812915B2 - Field effect transistor - Google Patents

Description

The present invention relates to a field effect transistor used in a high speed logic integrated circuit or the like.

[Conventional technology]

As field effect transistors (FETs) used as high-frequency amplifiers and elements for high-speed computers, GaAs MESFETs and high electron mobility transistors (HEMTs) using GaAs, which has a lower electric field mobility than Si, as a substrate have been actively developed. Is coming.

As the performance of the basic element of an integrated circuit for high speed computers, it is important to realize a high current driving capability in order to improve the degree of integration and the processing speed. In order to realize high current drive capability, it is easy to think from the simplest model that the current flowing through the channel is proportional to the product of carrier density and carrier traveling speed. It is necessary to raise.
In addition, it is necessary to thin the channel in order to suppress the short channel effect that accompanies the shortening of the gate length.

Therefore, conventionally, for example, in the case of GaAs MESFET, molecular beam epitaxy (MBE) that can form a thin film with the best controllability.
We have been trying to make the channel with high concentration and thin layer by the thin film growth technology by the MBE method, but the practical limit of doping with good controllability is 2 × 10 ¹⁸ cm ^-3 by the MBE method.

[Problems to be Solved by the Invention]

As mentioned in the prior art, increasing the channel concentration is due to FET
Although GaAs is important for high performance, it has a high electron mobility and is advantageous as a high-speed device material, but its doping density is limited because of its low density of states. On the other hand, Si
Although has a lower electron mobility than GaAs, it has a high density of states and can achieve a high concentration of 10 ²⁰ cm ^-3 or more. In this way, there is an inverse correlation between the density of states of carriers and the mobility determined by the band structure peculiar to the material, and in principle both the density of states of carriers and the mobility cannot be increased. is there.

An object of the present invention is to further enhance the degree of integration by effectively utilizing both the merit of a material having a low carrier density of states and high carrier mobility and the merit of a material having a low mobility but high carrier density of states. To realize a high-performance FET.

[Means for solving the problem]

A field effect transistor according to a first invention is a field effect transistor which is formed of a low electron density semiconductor on a substrate.
Semiconductor layer, a second semiconductor layer formed on the first semiconductor layer and made of a high electronic state density semiconductor containing an n-type impurity element, and a low electronic state formed on the second semiconductor layer. And a third semiconductor layer formed of a density semiconductor.

The field effect transistor according to the second invention is the first hole-density semiconductor formed on the substrate.
Semiconductor layer, a second semiconductor layer formed of a high hole state density semiconductor containing a p-type impurity element, formed on the first semiconductor layer, and a low positive layer formed on the second semiconductor layer. And a third semiconductor layer made of a hole-state density semiconductor.

[Action]

The principle of the present invention is to solve the problem peculiar to the material that the carrier mobility and the density of states are in inverse proportion to each other by using a semiconductor layer having a low mobility but a high state density as a carrier supply layer and a wave as a carrier traveling layer. The function exudation is positively applied to allow carriers to travel in the semiconductor layer having the highest mobility. For example, in the case of GaAs, the low electric field mobility is large, but the electronic state density is 4.7 × 10
^It is 2 digits lower than ¹⁷ cm ^-3 and 2.8 × 10 ¹⁹ cm ^{-3 of} Si. actually,
Although the degenerate effect can be doped at a high concentration up to about 5 × 10 ¹⁸ cm ^-3 or more state density in a molecular beam epitaxy method, 10 ²⁰
Cannot be more than cm ^-3 . Therefore, there is a limit in promoting high-concentration thinning of the channel for high performance.
Therefore, by using a Ge ultra-thin layer having a large electron density of states of 1 × 10 ¹⁹ cm ^-3 as an electron supply layer to enable n-type high-concentration doping and to apply the effect of spreading the wave function, It is possible to improve the performance by suppressing the decrease in the average traveling speed of the vehicle to some extent.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a sectional view of an embodiment of a field effect transistor according to the first invention.

In the FET of the embodiment shown in FIG. 1, a non-doped GaAs layer 2 and As are sequentially formed on a semi-insulating GaAs substrate 1 by the MBE method.
A 1.2 × 10 ¹⁹ cm ⁻³ doped Ge layer 3 and a non-doped GaAs layer 4 are grown to a thickness of 600 nm, 10 nm, and 20 nm, respectively. A gate electrode 7 made of WSi _X , for example, is formed thereon by deposition by sputtering and processing by reactive dry etching. Further, using the gate electrode 7 and the photoresist as a mask, Si is selectively implanted under the conditions of an acceleration energy of 70 keV and a dose of 1 × 10 ¹³ cm ^-2 , followed by activation heat treatment at 800 ° C., and an n-type low resistance region 8 To form. Further, AuGe.Ni is selectively vapor-deposited and an alloying heat treatment is performed to form a source electrode 5 and a drain electrode 6 which are in ohmic contact.

Fig. 2 is a diagram schematically showing the state of the energy band in the thermal equilibrium state just below the gate electrode 7 of the fabricated FET. The electron Fermi level 9 and the conduction band minimum point 1
0, the maximum point 11 of the valence band is shown. In FIG. 2, the electron wave function 12 spreads to the non-doped GaAs layers 2 and 4 on both sides of the n-type Ge layer 3, and the effect causes the non-doped G
The average traveling speed of electrons in the aAs layers 2 and 4 is higher than that in the Ge layer, and the density of states of the electron supply layer is 1 × 10 ¹⁹ cm ^-3.
Since Ge is used, 2 × 10 is stable for stability even when considering degeneracy.
Higher doping is possible than GaAs, which is difficult to be doped with ¹⁸ cm ^-3 or more.

FIG. 3 is a diagram showing a cross-sectional view of an embodiment of the field effect transistor according to the second invention.

The FET of the embodiment shown in FIG. 3 has M-type on the n-type Si substrate 21.
The BE method, n-type Si layer 22 of the sequential thickness 600 nm, undoped Ge having a thickness of 30nm as a carrier transit layer _0.5 Si _0.5 layers 23, 1 × a Ga thickness 5nm serve as carrier supply layer 10 ¹⁹ cm ^{- 3-} doped p-type Si layer 24, 10-nm-thick non-doped Ge _0.5 Si _0.5 layer 25 serving as a carrier transit layer, 20-nm-thick low-concentration n-type Si layer 26,
A 10 nm thick SiO ₂ layer 27 formed by oxidizing the surface is grown. A gate electrode 7 made of, for example, WSi _x is formed thereon by deposition by sputtering and processing by reactive dry etching. Further, by using the gate electrode 7 and the photoresist as a mask, B is selectively accelerated with an acceleration energy of 80 keV,
After implanting under the condition of a dose of 1.4 × 10 ¹³ cm ^-2 , activation heat treatment is performed at 900 ° C. to form a p-type low resistance region 28. Further, the SiO ₂ layer 27 is selectively removed, AlSi is vapor-deposited, and an alloying heat treatment is performed to form a source electrode 5 and a drain electrode 6 having ohmic contact.

Fig. 4 is a diagram schematically showing the state of the energy band in the depletion layer modulation mode operation state in which a positive potential is applied to the gate just below the gate electrode 7 of the fabricated FET. The Fermi level 9 and the minimum point of the conduction band are shown. 10, the maximum point 11 of the valence band is shown. In FIG. 4, the wave function 18 of holes is the undoped Ge _0.5 Si _0.5 layer 23,2 on both sides of the p-type Si layer 24.
The average traveling speed of holes is Si
It is faster than the layer, and since the Si layer having a high density of states is used as the carrier supply layer, it can be more highly doped.

〔The invention's effect〕

As described above, according to the present invention, as a carrier supply layer, a semiconductor layer having a low mobility but a high state density is used, and a wave function exudation is positively applied as a carrier traveling layer, This is based on using a semiconductor layer having a mobility as high as possible. Therefore, even in the case of a semiconductor layer such as GaAs in which the doping concentration is limited by the density of electronic states, a Ge layer having a large density of electronic states is used as an electron supply layer and the effect of spreading the wave function is applied. High-concentration doping is possible by suppressing the decrease in the average traveling speed of electrons to some extent, and a high-performance FET suitable for high integration can be realized.

[Brief description of drawings]

1 is a cross-sectional view showing an embodiment of the FET according to the first invention, FIG. 2 is a schematic view of a band just below the gate of the FET of FIG. 1, and FIG. 3 is an embodiment of the FET according to the second invention. FIG. 4 is a schematic view of a band just below the gate of the FET of FIG. 3 showing an example. 1 ... Semi-insulating GaAs substrate 2,4 ... Non-doped GaAs layer 3 ... n-type Ge layer 5 ... Source electrode 6 ... Drain electrode 7 ... Gate electrode 8 ... N-type low resistance region 9 ... Fermi Level 10 ... minimum point of conduction band 11 ... maximum point of valence band 12 ... wave function of electron 18 ... wave function of hole 21 ... n-type Si substrate 22, 26 ... n-type Si substrate Layer 23,25 …… Non-doped Ge _0.5 Si _0.5 layer 24 …… p type Si layer 27 …… SiO ₂ layer 28 …… p type low resistance region

Claims (2)

[Claims] 1. A first semiconductor layer made of a low electron state density semiconductor formed on a substrate, and a high electron state density semiconductor containing an n-type impurity element formed on the first semiconductor layer. A field effect transistor comprising: a second semiconductor layer; and a third semiconductor layer made of a low electron state density semiconductor formed on the second semiconductor layer. 2. A first semiconductor layer made of a low hole state density semiconductor formed on a substrate, and a high hole state density semiconductor containing a p-type impurity element formed on the first semiconductor layer. And a third semiconductor layer made of a low hole state density semiconductor formed on the second semiconductor layer.