JPH0821071B2 - Board hole inspection method - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting whether a substrate has a predetermined number of holes.

Conventional technology In the process of making a hole for mounting components on a board, chips may be clogged in the hole, but if this is sent to the automatic component mounter in the next process as it is, the parts will be broken. May occur. For this reason, visual inspection has been performed on each of the substrates, but recently, due to high-density mounting and miniaturization of components, the hole diameter has become small, and it is becoming difficult to detect defective holes by visual inspection. To solve this,
It is conceivable to adopt optoelectronic technology instead of human eyes, which will be described below.

In FIG. 7, reference numeral 10 denotes a transfer device, which is composed of belt conveyors 11 and 12 horizontally spaced apart from each other and a drive motor (not shown) thereof, and is supplied onto the conveyor 11 from the left side. 1 is running to the right at approximately constant speed. A contact type one-dimensional image sensor 20 is arranged between the two conveyors 11 and 12, and the light source 21 and the rod lens are arranged so as to face each other across the substrate 1 in the width direction.
22 and CCD sensor 23, each pixel of the CCD sensor 23 is scanned at a predetermined cycle to take out the output change generated in the pixel at the position facing the hole of the substrate 1, and the high level is generated in the next binarization circuit 30. The signal is converted into a hole size signal (facing the hole) and low level (not facing the hole). Figure 8 (a) (b)
Shows the relationship between the scanning of the CCD sensor 23 and the hole size signal. When the holes 2 of the substrate 1 are scanned from A to E, the high level is set at each position facing the hole 2. Binary signals a to e corresponding to the respective A to E are formed.
Therefore, in order to detect the holes on the substrate 1 without omission,
The traveling speed of the substrate may be set so that at least one scan is performed while the hole having the smallest diameter on the substrate faces the CCD sensor 23. However, in that case, the scanning circuit differs depending on the hole diameter, and even if the high level number of the hole size signal is simply counted, it does not match the number of holes (in the example of FIG. 3 times high level will be detected). A counter circuit 41 having a hole number discriminating function was conceived there, which will be described with reference to FIG.
A first counter 41 for counting the hole size signal from the digitizing circuit 30.
3, delay the hole size signal by one line of CCD sensor 23 1
Line delay circuit 411, its delay hole size signal and binarization circuit 3
AND circuit 412 with hole dimension signal from 0, AND circuit
A second counter 414 for counting the output of 412, the first and second thereof
And a subtractor 415 that calculates and accumulates the difference between the count values of the counters 413 and 414. In this case, the first counter 413 counts the hole size signal for each scan (“3” in the example of FIG. 8), and the second counter 414 calculates the AND of the hole size signal in the preceding and following scans. The output is counted (“2” in the example of FIG. 8), and the difference between the two count values is obtained in the subtractor 415, and the hole is formed for each hole regardless of the scanning circuit on the hole. The subtraction result "1" corresponding to the number is obtained. This is then accumulated for each hole. Therefore, the number of holes is obtained from the output of the subtractor 415 in the counting circuit 41 while the front end to the rear end of the substrate 1 passes through the position of the image sensor 20, and the number of holes is compared with the number of holes of the normal substrate to be inspected. The pass / fail of the substrate will be determined.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention When examining the state of hole clogging of a substrate, not only are the holes completely clogged, but also the holes are clogged only partially. In such a case, the non-clogging portion may be detected as a hole when light is transmitted. For example, as shown in FIG. 8, if the chips 3 are clogged in the middle part of the hole 2 and there are non-clogging parts on both sides, the scans B ′, C ′, D ′ by the one-dimensional image sensor are the chips 3. When it is performed on the upstream side, on the chips 3, and on the downstream side, the corresponding binarized signals b ', c', d'have high levels as shown in (b), low levels. 1 and those having a high level occur in this order, and as a result, the counting circuit 41 counts this as the number of holes "2". Therefore, in this case, if there are other clogged holes, the number of detected holes in the entire substrate coincides with the normal value, resulting in an erroneous judgment.

As an attempt to solve this, it can be considered that the counting is not performed when the high-level time width of the hole size signal is smaller than the set value. In other words, if you set this setting value slightly smaller than the diameter of the hole with the smallest diameter, if a part near the center of the hole is blocked, it will not be counted as a hole. Become. However, in a hole having a diameter sufficiently larger than the set value, the chord length of other parts is larger than the set value even if the vicinity of the center is clogged as shown in FIG. Is not resolved.

In order to solve the above-mentioned problems, the present invention allows a substrate to be inspected to travel at a substantially constant speed, and a substrate to be inspected by a one-dimensional image sensor arranged in a direction orthogonal to the traveling direction. In a method of inspecting the number of holes of a board, which generates a hole size signal in the width direction and calculates the number of holes of the board to be inspected based on the hole size signal, a plurality of appropriately set different hole size divisions in which the hole size signal is preset. The number of holes in the substrate to be inspected for each set hole size category is calculated at the same time. In this case, however, as shown in FIG. 9 (a), there is a hole with a clogging in the middle, and it is determined that there are two holes, and a hole with a small diameter corresponding to the chord length is a hole. Even if it is clogged and the number of small holes in the whole matches the normal value,
The number of holes in the set hole size section of the above-mentioned clogging holes, which is determined to be two, is not detected, and it is clear from this result that there are clogging holes.

Example In FIG. 1 showing an example of an apparatus for implementing the method of the present invention,
A conveying device 10 including belt conveyors 11 and 12 having the same numbers as in FIG. 7, a light source 21, a rod lens 22, a one-dimensional image sensor 20 including a CCD sensor 23, and outputs of the image sensor 20 are high and low. The binarization circuit 30 which binarizes the level and forms a hole size signal which becomes a high level during the scanning time of the pixel facing the hole is the same as that in FIG. 7 and operates similarly. However, in the present invention, since the holes are classified according to the hole size itself, the upper limit value V of the traveling speed of the substrate 1 is determined as follows so that the hole is also scanned at its diameter portion. That is, considering two scans across the diameter portion of the hole 2 having the radius r as shown in FIG. 2, after the scan A is performed, the substrate travels the distance Δy by the next scan B. To do. Therefore, the traveling speed V of the substrate 1 is V = Δy / t, where t is the scanning time for one line.
Is represented as At this time, in the scans A and B, the hole size is detected with an error of Δx with respect to the diameter, and the above Δy is restricted by the allowable error Δx as follows.

Δy = 2rsin [cos ⁻¹ {(r−Δx / 2) / r}] In this embodiment, the length of one pixel of the image sensor 20 is 62.5 μm, which is defined as the allowable error Δx, and one line Based on the scanning time of 2 msec, from the above relational expression, the upper limit value V of the traveling speed is about 4 m / mi when the hole diameter r = 0.2 mm.
It becomes about 10 / min when n and r = 1 mm.

Next, reference numeral 50 is a classification circuit group consisting of three classification circuits 51 to 53 having the same structure. Hereinafter, one classification circuit group 51 will be described. As shown in FIG.
AND circuit 511 in which the scanning clock pulse from the image sensor 20 is introduced with the hole size signal from the image sensor 20, the counter 512 for counting the conduction clock pulse, and the counted value is compared with the set hole size division value set in the setter 514. In the former case, the comparator 513 that outputs the output to the flip-flop circuit 515 for a long time, and the control unit that initializes the counter 512 and the flip-flop 515 when the hole size signal changes from the high level to the low level (not shown). No). In this, while the hole size signal is at a high level, the scanning clock pulse is counted and converted into a count value corresponding to the hole size, and when it coincides with the hole setting division value, the flip-flop 515 is started up. Then, while the hole size signal changes from high to low level, the output of the flip-flop circuit 515 is kept at high level, and then the initial state of low level is restored. Then, it is sent to the counting circuit 41 shown in FIG. Similarly, the other classification circuits 52 and 53 also correspond to the output of the flip-flop circuit that becomes high level while the hole size signal exceeds each hole size classification value only by the difference in the hole size classification value set in the setter. To the counting circuits 42 and 43 of the counting circuit group 40.

FIG. 5 shows the above relationship in a waveform, in which the set hole dimension division values of the classification circuits 51 to 53 are S _{1 to} S ₃ ,
On the other hand, the hole size signal from the binarization circuit 30 is, as shown in the figure, the first is larger than the segment value S _{2 and} smaller than S ₃ , and the second,
If the third value is larger than the segment value S _{1 and} smaller than S ₂ , and the fourth value is larger than S ₃ , then in the classification circuit 51, the count value of the counter 512 exceeds S ₁ at any high level part. As a result, an output is generated, and similarly, in the classification circuits 52 and 53, signals are generated at the first, fourth and fourth high level portions of the hole size signals, respectively. Note that the segment value S ₁ is selected to be an appropriate value smaller than the minimum detection hole diameter, and S ₂ and S ₃ are smaller than that according to the other detection hole diameters and larger than the lower detection hole diameters. Is set.

As described above, the sorting circuits 51 to 53 perform sorting according to the high-level width of the hole size signal, and the output is sent to the counting circuits 41 to 43 of the corresponding counting circuit group 40. Each of the counting circuits 41 to 43 is exactly the same as that described based on FIG. 4, and hereinafter, the counting circuit 41 to which the output of the classification circuit 51 is introduced will be described as a model.

Now, as shown in FIG. 6 (a), three holes are formed on the substrate 1.
2,2 ', 2 "(the position of 2'is downstream with respect to 2,2") is scanned at positions A "to F",
When outputs "a" to "f" are formed from the classification circuit 51 corresponding to each scan as shown in (b), first, the count value 413 of the first counter 413 is "2" when b "is input. , Second counter 41
The count value of 4 is "0", and the count value of the subtractor 415 is "2".
Becomes Then, when c ″ is input, the respective count values become “3” and “2”, and the count value of the subtractor 415 is “3” obtained by adding the subtraction result “2” to the difference “1” between the two values. It will be. Next, when d ″ is input, each count value is “3”, “3”, and the count value of the subtractor remains “3” of the previous time, and the subsequent e ″
Even when inputting, the count value is "1", "1", the count value of the subtractor is still "3", which is two times before, and the count value when inputting f "is" 0 "," 0 ". The subtraction result is held as "3", which reveals that the number of holes having the size exceeding the set size division value of the classification circuit 51 is three.

Hereinafter, in each counting circuit 42, 43, the number of holes exceeding the set hole size division value of each corresponding classification circuit 52, 53 is counted, and this is compared with the number of holes in each corresponding division of the normal board. By doing so, it can be determined whether it is normal or defective.

That is, when there are holes d ₁ , d ₂ , and d ₃ on the substrate, n ₁ , n ₂ , and n ₃ , respectively, the set values of the setters of the classification circuits 51 to 53 are set to be slightly smaller than the respective hole diameters. If the count value N ₁ of the counting circuit 41 is larger or smaller than n ₁ + n ₂ + n ₃ , it means that there is a defective hole, and N ₁ is n ₁ + n ₂ +.
Even if it matches the normal value of n ₃ , the count value N ₂ of the counting circuit 42
If n ₂ + n ₃ is different, there is a defective hole, and even if N ₁ and N ₂ match the normal value, if the count value N ₃ of the counting circuit 43 is different from the normal value n ₃ , then there is a defective hole. Shown, counting circuit 41 ~
If any two of the count values of 43 are normal, it is also specified which hole of which diameter is defective.

Although the above description illustrates the case where the hole size signals are distributed in three stages, a plurality of holes may be appropriately provided according to the number of hole diameters of the substrate.

As described above, according to the present invention, since the hole size signal is distributed to a plurality of different set hole size divisions and the number of holes for each of them is inspected, a defect such as partial clogging of the hole is accurate. Can be detected.

[Brief description of drawings]

FIG. 1 is a structural diagram including a partial block diagram showing an example of an apparatus for carrying out the present invention, FIG. 2 is a geometrical relational diagram showing the relation between substrate traveling speed and hole size error, and FIG. Classification circuit,
FIG. 4 is a block diagram of the counting circuit, FIG. 5 is a classification circuit, FIG. 6 is a waveform diagram for explaining each operation of the counting circuit, and FIG. 7 is a partial block diagram showing a conventional device. 8 and 9 are waveform diagrams showing hole scanning and hole size signals.

Claims (1)

[Claims] 1. A substrate to be inspected is run at a substantially constant speed, a hole dimension signal in the width direction of the substrate to be inspected is generated by a one-dimensional image sensor arranged in a direction orthogonal to the running direction, and based on the hole dimension signal. In the method of inspecting the number of holes of the board to be inspected, the hole size signal is compared with a plurality of different preset hole size divisions, which are distributed, and the inspection is performed for each of the set hole dimension divisions. A method for inspecting the number of holes in a board, wherein the number of holes in the board is simultaneously calculated.