JPH0828622B2 - High frequency amplifier circuit - Google Patents
High frequency amplifier circuitInfo
- Publication number
- JPH0828622B2 JPH0828622B2 JP63042108A JP4210888A JPH0828622B2 JP H0828622 B2 JPH0828622 B2 JP H0828622B2 JP 63042108 A JP63042108 A JP 63042108A JP 4210888 A JP4210888 A JP 4210888A JP H0828622 B2 JPH0828622 B2 JP H0828622B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- tuning
- high frequency
- coil
- amplifier circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000035945 sensitivity Effects 0.000 claims description 12
- 230000005669 field effect Effects 0.000 claims description 8
- 230000008878 coupling Effects 0.000 claims description 7
- 238000010168 coupling process Methods 0.000 claims description 7
- 238000005859 coupling reaction Methods 0.000 claims description 7
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本願は、チューナにおける高周波増幅回路に関する。TECHNICAL FIELD The present application relates to a high frequency amplifier circuit in a tuner.
従来の技術 一般にAM用のチューナにおいて、選択特性を良好にし
てイメージレシオを上げるために、同調回路を多段にす
ること及び同調回路の増加に伴う入力信号の減衰を補う
ために、同調回路間に結合増幅回路を接続することは良
く知られている。2. Description of the Related Art Generally, in a tuner for AM, in order to improve a selection characteristic and raise an image ratio, a tuning circuit is provided in multiple stages and an attenuation of an input signal due to an increase in the tuning circuit is compensated between tuning circuits. Connecting coupling amplifier circuits is well known.
発明が解決しようとする課題 しかしながら、結合増幅回路を用いて同調回路を多段
にするときは、特に受信周波数の帯域幅の広いAM用チュ
ーナにおいて、感度差が大きくなり、却ってチューナの
性能の低下をきたす惧れがあり、従って同調回路の増加
段数には自ら限界があった。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, when a tuning circuit is made to have multiple stages by using a coupling amplifier circuit, the sensitivity difference becomes large particularly in an AM tuner having a wide reception frequency bandwidth, and the performance of the tuner is rather deteriorated. Therefore, there was a fear that it would occur, so there was a limit to the number of stages in which the tuning circuit could be increased.
課題を解決するための手段 そこで本願は、イメージレシオを向上するために、可
及的感度差を低減して、同調回路の段数を増加できるよ
うに複数の同調回路を有し、その前後段の同調回路間
に、電界効果トランジスタのソースにその動作内部抵抗
を大きく設定する抵抗器と、周波数の高い方で感度を抑
制するコイルとの直列回路を接続した増幅結合回路を接
続したことを特徴とするものである。Means for Solving the Problems Therefore, in order to improve the image ratio, the present application has a plurality of tuning circuits so as to reduce the difference in sensitivity as much as possible and increase the number of stages of the tuning circuit. Between the tuning circuits, the source of the field effect transistor is connected to an amplifier coupling circuit in which a resistor that sets the operating internal resistance to a large value and a series circuit of a coil that suppresses sensitivity at the higher frequency are connected. To do.
実施例 以下図面にもとづいて詳述すると、第3図は、広帯域
増幅回路Aと、選択回路Bとから成る従来構成のAM用チ
ューナにおける高周波増幅回路を示しており、図におい
て、(1)はアンテナ端子、(2)はAGC入力端子、
(3)はベースにAGC端子(2)を、エミッタに電界効
果トランジスタ(4)のドレンを夫々接続したバイポー
ラトランジスタで、そのコレクタが第1高周波トランス
(5)に接続してある。(6)は広帯域AGC回路への出
力端子、(7)は後述の第1同調回路の選択特性に影響
を及ぼさないように、前記第1高周波トランス(5)の
1次コイルに直列接続した小抵抗の抵抗器で、これによ
り、広帯域AGC回路の感度特性が決定される。(8)は
前記第1高周波トランス(5)の2次コイルと可変容量
ダイオードとから成る第1同調回路、(9)は第2高周
波トランスで、その1次コイルにMIX回路への出力端子
(10)が接続してある。(11)は前記第2高周波トラン
ス(9)の2次コイルと可変容量ダイオードとから成る
第2同調回路である。Embodiments Detailed description will be given below with reference to the drawings. FIG. 3 shows a high-frequency amplifier circuit in an AM tuner having a conventional configuration including a wide-band amplifier circuit A and a selection circuit B. In FIG. Antenna terminal, (2) is AGC input terminal,
(3) is a bipolar transistor in which the base is connected to the AGC terminal (2) and the emitter is connected to the drain of the field effect transistor (4), and its collector is connected to the first high frequency transformer (5). (6) is an output terminal to the wide band AGC circuit, and (7) is a small-scale connected in series with the primary coil of the first high frequency transformer (5) so as not to affect the selection characteristics of the first tuning circuit described later. A resistor of resistance, which determines the sensitivity characteristics of the broadband AGC circuit. (8) is a first tuning circuit composed of a secondary coil of the first high frequency transformer (5) and a variable capacitance diode, and (9) is a second high frequency transformer, the primary coil of which has an output terminal to a MIX circuit ( 10) is connected. (11) is a second tuning circuit composed of the secondary coil of the second high frequency transformer (9) and a variable capacitance diode.
しかしてアンテナ回路よりアンテナ端子(1)に入力
した信号は広帯域増幅回路Aに入力し、この入力信号
は、ベースにAGC電圧を入力したバイポーラトランジス
タ(3)により制御され、その制御された信号は、出力
端子(6)から広帯域AGC回路に導かれる。Then, the signal input from the antenna circuit to the antenna terminal (1) is input to the wideband amplifier circuit A, and this input signal is controlled by the bipolar transistor (3) whose AGC voltage is input to the base, and the controlled signal is , From the output terminal (6) to the broadband AGC circuit.
一方選局電圧Vtにより第1同調回路(8)で選択され
た同調信号は、その同調コイルのタップから第2同調回
路(11)の同調コイル即ち第2高周波トランス(9)の
2次コイルに入力し、この第2同調回路(11)よりさら
に選択された同調信号は、第2高周波トランス(9)の
1次コイルから出力端子(10)を介してMIX回路に入力
する。On the other hand, the tuning signal selected by the first tuning circuit (8) by the tuning voltage Vt is fed from the tap of the tuning coil to the tuning coil of the second tuning circuit (11), that is, the secondary coil of the second high frequency transformer (9). The tuning signal inputted and further selected by the second tuning circuit (11) is inputted from the primary coil of the second high frequency transformer (9) to the MIX circuit via the output terminal (10).
この高周波増幅回路において、出願人が実験したとこ
ろによれば、そのイメージレシオは1400KHzで48dbであ
った。According to the experiment conducted by the applicant in this high frequency amplification circuit, the image ratio was 48db at 1400KHz.
本願は上記した構成の高周波増幅回路において、前後
段同調回路間の動作内部抵抗を大きく設定し、かつ、周
波数の高い方で感度を抑制する増幅結合回路を接続した
もので、その第1実施例を第1図に示している。即ち第
1図は、前記した第1同調回路(8)と第2同調回路
(11)との間に、増幅結合回路Cを接続した場合を示し
ており、具体的には、第1同調回路(8)の同調コイル
のタップをゲートに接続した電界効果トランジスタ(1
5)のソースに、該トランジスタ(15)の動作内部抵抗
を大きくする抵抗器(16)と周波数の高い方で感度を抑
制するコイル(17)とを直列に接続し、この直列回路
を、第2高周波トランス(9)の2次コイル即ち第2同
調回路(11)の同調コイルのタップに接続して成るもの
である。The present application relates to a high-frequency amplifier circuit having the above-described configuration, in which an operating internal resistance between the front and rear tuning circuits is set to a large value, and an amplification coupling circuit that suppresses sensitivity at the higher frequency side is connected. Is shown in FIG. That is, FIG. 1 shows a case where the amplification coupling circuit C is connected between the first tuning circuit (8) and the second tuning circuit (11) described above. The field effect transistor (1) in which the tuning coil tap of (8) is connected to the gate
A resistor (16) for increasing the operating internal resistance of the transistor (15) and a coil (17) for suppressing sensitivity at the higher frequency side are connected in series to the source of 5), and this series circuit is The second high frequency transformer (9) is connected to the tap of the secondary coil, that is, the tuning coil of the second tuning circuit (11).
なお第3図と同一符号は同一部材を示している。 The same reference numerals as those in FIG. 3 denote the same members.
しかして本願によれば、抵抗器(16)及びコイル(1
7)の接続により、同調コイル側から見た電界効果トラ
ンジスタ(15)の動作内部抵抗は大きくなり、同調回路
のQの低下を抑えるので、同調回路の周波数変化に対す
る感度差を低減することができ、このことは、例えば抵
抗器(16)を省略した場合に、第2同調回路(11)の同
調コイルの一部が短絡した状態となってQが低下し、同
調回路の周波数変化に対する感度差が拡大することにな
ることからも容易に理解される。Therefore, according to the present application, the resistor (16) and the coil (1
By the connection of 7), the operating internal resistance of the field effect transistor (15) seen from the tuning coil side becomes large and the deterioration of Q of the tuning circuit is suppressed, so that the sensitivity difference with respect to the frequency change of the tuning circuit can be reduced. This means that, for example, when the resistor (16) is omitted, a part of the tuning coil of the second tuning circuit (11) is short-circuited, and Q is lowered, and the sensitivity difference with respect to the frequency change of the tuning circuit. Can be easily understood from the fact that it will be expanded.
従って、増幅回路を増加しても、受信周波数の感度差
を少なくして、イメージレシオを向上することができ
る。Therefore, even if the number of amplifier circuits is increased, it is possible to reduce the sensitivity difference between the reception frequencies and improve the image ratio.
なお出願人の実験によれば、第1図に示す回路におい
て、イメージレシオが1400KHzで61dbであった。According to an experiment conducted by the applicant, the image ratio in the circuit shown in FIG. 1 was 61db at 1400KHz.
また第2図は、本願の他の実施例を示すもので、具体
的には、第1図に示す構成において、電界効果トランジ
スタ(15)の動作内部抵抗を大きくする抵抗器(16)
と、周波数の高い感度を抑制するコイル(17)との直列
回路をアースし、かつ、電界効果トランジスタ(15)の
ドレンに、第3高周波トランス(18)の1次コイルを接
続すると共に、前記第3高周波トランス(18)の2次コ
イルと可変容量ダイオードとにより、第3同調回路(1
9)を構成して、その同調コイルのタップを第2高周波
トランス(9)即ち第2同調回路(11)の同調コイルに
接続して成るものである。FIG. 2 shows another embodiment of the present application. Specifically, in the configuration shown in FIG. 1, a resistor (16) for increasing the operating internal resistance of the field effect transistor (15).
And a coil (17) for suppressing high frequency sensitivity are grounded, and the drain of the field effect transistor (15) is connected to the primary coil of the third high frequency transformer (18). By the secondary coil of the third high frequency transformer (18) and the variable capacitance diode, the third tuning circuit (1
9), and the tap of the tuning coil is connected to the tuning coil of the second high frequency transformer (9), that is, the second tuning circuit (11).
しかしてこの構成によれば、上記した第1実施例の場
合に比し、同調回路を1段増加しているので、イメージ
レシオをさらに向上することができる。With this configuration, however, the tuning circuit is increased by one stage as compared with the case of the first embodiment described above, so that the image ratio can be further improved.
なお出願人の実験によれば、第2図に示す回路におけ
るイメージレシオは、1400KHzで78dbであった。According to an experiment by the applicant, the image ratio in the circuit shown in Fig. 2 was 78db at 1400KHz.
発明の効果 以上のように本願によれば、受信周波数の変化を伴う
感度差を低減して、イメージレシオの向上をはかること
ができて、高性能のチューナを提供することができる。EFFECTS OF THE INVENTION As described above, according to the present application, it is possible to provide a high-performance tuner that can reduce the difference in sensitivity that accompanies a change in the reception frequency to improve the image ratio.
第1,2図は本願の実施例を示す回路図、第3図は従来構
成の回路図である。 図中、Aは広帯域増幅回路、Bは選択回路、Cは増幅結
合回路、(5)は第1高周波トランス、(7),(16)
は抵抗器、(8)は第1同調回路、(9)は第2高周波
トランス、(11)は第2同調回路、(15)は電界効果ト
ランジスタ、(18)は第3高周波トランス、(19)は第
3同調回路である。1 and 2 are circuit diagrams showing an embodiment of the present application, and FIG. 3 is a circuit diagram of a conventional configuration. In the figure, A is a broadband amplifier circuit, B is a selection circuit, C is an amplification coupling circuit, (5) is a first high frequency transformer, (7), (16).
Is a resistor, (8) is a first tuning circuit, (9) is a second high frequency transformer, (11) is a second tuning circuit, (15) is a field effect transistor, (18) is a third high frequency transformer, and (19). ) Is a third tuning circuit.
Claims (1)
回路間に、電界効果トランジスタのソースにその動作内
部抵抗を大きく設定する抵抗器と、周波数の高い方で感
度を抑制するコイルとの直列回路を接続した増幅結合回
路を接続したことを特徴とする高周波増幅回路。1. A resistor having a plurality of tuning circuits, a resistor for setting a large operating internal resistance of a source of a field effect transistor between the tuning circuits in the preceding and following stages, and a coil for suppressing sensitivity at a higher frequency. A high-frequency amplifier circuit characterized by being connected with an amplification coupling circuit in which a series circuit of is connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63042108A JPH0828622B2 (en) | 1988-02-26 | 1988-02-26 | High frequency amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63042108A JPH0828622B2 (en) | 1988-02-26 | 1988-02-26 | High frequency amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01218202A JPH01218202A (en) | 1989-08-31 |
| JPH0828622B2 true JPH0828622B2 (en) | 1996-03-21 |
Family
ID=12626765
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63042108A Expired - Lifetime JPH0828622B2 (en) | 1988-02-26 | 1988-02-26 | High frequency amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0828622B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6093594B2 (en) * | 2013-02-27 | 2017-03-08 | パナソニック株式会社 | Variable matching circuit and amplifier |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS562416Y2 (en) * | 1974-12-20 | 1981-01-20 | ||
| JPS567321A (en) * | 1979-06-30 | 1981-01-26 | Matsushita Electric Works Ltd | Relay |
-
1988
- 1988-02-26 JP JP63042108A patent/JPH0828622B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01218202A (en) | 1989-08-31 |
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