JPH0831599B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device having an insulated gate transistor. In particular, it relates to the structure of the contact with the substrate.

[Outline of Invention]

The present invention is a method for manufacturing a semiconductor device having an insulated gate transistor, wherein a contact hole is formed between a first gate electrode and a second gate electrode, and a conductive film is connected to the contact hole, By forming the first insulating film on the gate electrode and the second gate electrode and forming the second insulating film on the first insulating film, the misalignment between the contact hole and the gate electrode in the mask alignment process can be prevented. Even if it occurs, it is possible to prevent a short circuit between the conductive film connected to the contact hole and the gate electrode. In addition, a contact hole is formed on the lower conductive film so as to leave the two insulating films, and the upper conductive film is extended through the two insulating films extending on the lower conductive film. Even if overetching is performed to make contact between the substrate and the upper conductive film, there is no concern about leakage between the upper conductive film and the lower conductive film, and high reliability can be obtained.

[Conventional technology]

A conventional method of manufacturing a semiconductor device will be described with reference to FIG. In FIG. 2 (a), an insulating film 3 is formed on a semiconductor substrate of the first conductivity type, and then a polycrystalline silicon layer is formed by chemical vapor deposition, which is unnecessary by photolithography. By removing the part, the gate electrodes made of polycrystalline silicon 1,2
To form. Next, by using this gate electrode as a mask, impurities of the second conductivity type are ion-implanted and then annealed to form the impurity layer 4 of the second conductivity type. Next, a first silicon oxide film 7 is formed as shown in FIG. 2B, and then a contact hole 8 is formed by photolithography as shown in FIG. 2C. After that, the metal electrode 9 is formed.

[Problems and objects to be solved by the invention]

However, in the above-mentioned conventional technique, when a mask shift between the mask for forming the gate electrodes 1 and 2 and the mask for forming the contact hole 7 occurs, the gate electrode 1 or the gate electrode 2
Since the metal electrode 9 is short-circuited with each other, it is necessary to provide a sufficient margin between the gate electrode 1 and the contact hole 8 and between the contact hole 8 and the gate electrode 2, and there is a problem that miniaturization is difficult. Therefore, the present invention solves such a problem, and an object thereof is to provide the gate electrode 1
It is an object of the present invention to provide a semiconductor device in which the gate electrode 1 or the gate electrode 2 and the metal electrode 9 are not short-circuited even if a sufficient margin is not provided between the contact hole 8 and the contact hole 8, and between the contact hole 8 and the gate electrode 2.

[Means for solving problems]

The semiconductor device of the present invention includes: a first insulating film provided on a semiconductor substrate; a first conductive film and a second conductive film provided on the first insulating film and spaced apart from each other; An impurity diffusion layer provided in the semiconductor substrate sandwiched between the second conductive film, a second insulating film having the same width as the first conductive film and the second conductive film, on the first insulating film, and At least the third insulating film provided over the entire surface of the second insulating film, the third conductive film extending over the third insulating film, the third conductive film and the impurity diffusion layer are electrically connected to each other. It has a contact provided in the third insulating film on the impurity diffusion layer for connection.

〔Example〕

1 (a) to 1 (c) are views showing an embodiment of the present invention.

The details will be described below with reference to the drawings. Fig. 1 (a)
First, a first insulating film 3 is formed on the surface of a first conductivity type semiconductor substrate 5, and then a first conductive film, for example, a polycrystalline silicon film is formed, and then a second insulating film, for example, silicon. Form an oxide film. Next, the unnecessary silicon oxide film and the polycrystalline silicon film are removed by photolithography,
A gate electrode composed of the silicon oxide film 6 and polycrystalline silicon 1 and 2 is formed. At this time, the second insulating film may be etched using the photoresist as a mask, and then the photoresist may be removed and then the first conductive film may be etched using the second insulating film as the mask. Next, impurities of the second conductivity type are ion-implanted using this gate electrode as a mask, and then annealing is performed to form the impurity layer 4 of the second conductivity type. Next, as shown in FIG. 1B, after forming the third insulating film, for example, the silicon oxide film 7, the silicon oxide film 7 is left at least on the surface on the silicon oxide film 6.
A part of the silicon oxide film 7 and the first insulating film 3 is removed by photolithography to form a contact hole 8.
In this case, the side wall 10 of the silicon oxide film 7 is formed on the side surface of the gate electrode 1 or the gate electrode 2.
Next, a second conductive film such as a metal electrode 9 is formed.

〔The invention's effect〕

As described above, according to the present invention, even if the gate electrode 1 and the contact hole 8 approach each other due to the misalignment of the mask, the silicon oxide films 6 and 7 keep the insulation on the gate electrode, and Insulation is maintained on the side surface by the silicon oxide film 10 that remains as a sidewall, and the short circuit between the gate electrode 1 and the metal electrode 9 is eliminated. Therefore, the margins between the gate electrode 1 and the contact hole 8 and between the contact hole 8 and the gate electrode 2 can be reduced, and the size can be reduced.

[Brief description of drawings]

1 (a) to 1 (c) are main cross-sectional views showing an embodiment of a method for manufacturing a semiconductor device of the present invention. 2A to 2D are main sectional views showing a conventional method for manufacturing a semiconductor device. In the figure, 1,2 ... Polycrystalline silicon gate 3 ... Insulating film 4 ... Second conductivity type impurity layer 5 ... First conductivity type semiconductor substrate 6,7 ... Silicon oxide film 8 ... Contact Hole 9 ... Metal electrode 10 ... Sidewall.

Claims (1)

[Claims] 1. A first insulating film provided on a semiconductor substrate, a first conductive film and a second conductive film provided on the first insulating film and spaced apart from each other, the first conductive film and the second conductive film. An impurity diffusion layer provided in the semiconductor substrate sandwiched between a conductive film,
A second insulating film having the same width as that of the first conductive film and the second conductive film, a third insulating film provided over the entire surface of the first insulating film, and at least immediately above the second insulating film, the third insulating film. A third conductive film extending on the insulating film, a contact provided on the third insulating film on the impurity diffusion layer for electrically connecting the third conductive film and the impurity diffusion layer to each other. A semiconductor device having: