JP2500656B2 - Method for manufacturing semiconductor integrated circuit package - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor integrated circuit package on which a semiconductor element is mounted, and more particularly to a method of manufacturing a semiconductor integrated circuit package capable of improving high frequency characteristics.

[0002]

2. Description of the Related Art A conventional semiconductor integrated circuit package is manufactured by a process as shown in FIG.

That is, as shown in FIG. 6A, a fixing material 19 such as AuSi or AuSn is arranged on the element mounting portion 21 in the frame 16, and the melting point of the fixing material is changed by using a heating jig such as a hot plate. Heat to about + 30 ° C.

Next, as shown in FIG. 6B, a holding jig 2 for holding the semiconductor element 14 such as tweezers or air tweezers.
While being held by 2, the element mounting portion 21 scrubs, and the fixing material 19 permeates between the semiconductor element 14 and the element mounting portion 21. Then, the temperature of the heating jig is lowered below the freezing point of the fixing material, and the semiconductor element 14 is fixed. Next, as shown in FIG. 6C, the electrode of the semiconductor element 14 and the metal wiring 18 formed in the stitch 15 in the frame 16 are connected by a bonding wire 20. After that, as shown in FIG. 6D, the frame 16 and the frame cover 13 are tightly fixed to each other by electric welding, a solder material or the like to keep the inside airtight.

[0005]

The conventional method for manufacturing a semiconductor integrated circuit package has the following problems.

The semiconductor element is mounted on the element mounting portion by AuSi, Au.
In the case of fixing with an Sn fixing agent, scrubbing must be performed in order to break the oxide film on the surface of the fixing agent. In the conventional package structure and manufacturing method, the semiconductor element must be held and scrubbed on the element mounting portion.
When scrubbing a semiconductor element with scissors with tweezers, as shown in Fig. 6 (b), a work surface with a space of 0.8 mm or more from the end surface to be scissors with tweezers and 0.4 mm or more from the other end surface is required. Becomes Therefore, as shown in FIG. 5, the bonding wire connecting the semiconductor element and the metal wiring formed on the stitch has a length of 1 mm or more.

In a package handling a high frequency of 1 GHz or more, a metal strip portion serving as a signal transmission path uses a microstrip line or a coplanar line to suppress the transmission loss so as to suppress the signal loss as much as possible, thereby suppressing the transmission loss. Also uses a circuit format that matches the impedance of the transmission line in order to suppress signal loss.

The problem here is the bonding wire for connecting the semiconductor element and the transmission line. For example, 0.
Consider a bonding wire stretched in a 4 mm gap. Assuming that the electrode pad of the semiconductor element is 50 μm inside from the end face of the element, bonding is performed from 50 μm inside from the stitch end, and the wire draws an arc, the wire length of this part is 1 = 0.5 mm × π≈1 When the wire diameter: a is φ20 μm, the height of the semiconductor element: h is 350 μm, and the material is Au, the wire inductance: L is expressed by equation (1).

[0009]

Μo: Vacuum permeability μr: Relative permeability of Au The impedance at this time is as shown in Table 1.

[0011]

[Table 1]

The impedance of the bonding wire causes a mismatch at the end of the transmission line, resulting in signal reflection and loss. Also, the signal input to the semiconductor element is attenuated by the ratio between the impedance of the bonding wire and the impedance of the input portion of the semiconductor element.
For example, considering the impedance as a simple resistance, if the input impedance of the semiconductor element and the impedance of the transmission line are 50Ω, only about 50% of the input signal is input to the semiconductor element at 5 GHz. . The impedance increases as the frequency becomes higher, as indicated by 2πfL, and deteriorates the characteristics.

In order to prevent such deterioration of high frequency characteristics,
Although it is essential to reduce the inductance of the bonding wire, the conventional manufacturing method requires a work surface for scrubbing, and thus the reduction of the inductance by shortening the bonding wire cannot be expected.

[0014]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional drawbacks and to provide a method of manufacturing a semiconductor integrated circuit package capable of shortening the bonding wire.

A method of manufacturing a semiconductor integrated circuit package according to the present invention includes a frame having a semiconductor element, a base having an element mounting portion for mounting the semiconductor element, an element mounting hole into which the semiconductor element is fitted, and a metal wiring. A bonding wire for electrically connecting the semiconductor element and the metal wiring, and a frame cover in a method of manufacturing a semiconductor integrated circuit package, a step of combining the base and the frame, and a fixing material for the element mounting portion. Arranging, the step of arranging the semiconductor element in the element mounting hole with the fixing material sandwiched therebetween, the semiconductor element is held and the element mounting portion is moved, and the semiconductor element is disposed between the semiconductor element and the element mounting portion. A step of infiltrating a fixing material; a step of fixing the semiconductor element to the element mounting portion; and a step of fixing the base and the frame to each other. A step of a step of connecting the metal wire and the semiconductor element by the bonding wire, and a step of fixing the frame cover and the frame.

Further, in the manufacturing method of the present invention, the semiconductor element mounting portion has a cylindrical shape, and the frame has a fitting hole into which the semiconductor element mounting portion is fitted. The step of fitting the fitting hole to combine the base and the frame, the step of disposing a fixing material on the element mounting portion, and the step of disposing the semiconductor element in the element mounting hole with the fixing material sandwiched therebetween. And a step of holding the semiconductor element and rotating the element mounting portion with the element mounting portion inserted into the fitting hole to allow the semiconductor element to penetrate the fixing material between the element and the element mounting portion. There is.

[0017]

The present invention will be described in detail with reference to the drawings.

FIG. 1 is a process diagram for explaining a method for manufacturing a semiconductor integrated circuit package of the present invention, FIG. 2 is an exploded view of a semiconductor integrated circuit package assembled by the manufacturing method of the present invention, and FIG. 3 is a manufacturing method of the present invention. 3 is a cross-sectional view of the semiconductor integrated circuit package assembled in FIG.

With reference to FIGS. 1 to 3, the base 7 is a metal which is entirely plated with gold, and the central element mounting portion has a cylindrical projection structure. The frame 4 is made of a multi-layer ceramic, and the upper part that contacts the frame cover 1 and the lower part that contacts the base 7 are made of metal and are plated with gold. A metal wiring 8 is formed on the stitch 10 inside the frame 4 and is electrically connected to the outside through a lead. The stitch 10 is provided with an element mounting hole 11 (FIG. 2) which is a rectangular hole slightly larger than the semiconductor element 3. A guide hole 9 (FIG. 2) into which the element mounting portion 6 of the base 7 is fitted is provided in the lower portion, and the surface contacting the element mounting portion 6 is plated with gold.

For the fixing material 12, a non-flux eutectic solder such as AuSi or AuSn is used.

The manufacturing process is as follows.

First, as shown in FIG. 1A, the base 7
The fixing material 12 is arranged on the upper surface of the element mounting portion 6. Thereafter, as shown in FIG. 1B, the element mounting portion 6 of the base 7 is formed.
And the guide hole 9 of the frame 4 are fitted and combined. Next, the upper surface of the semiconductor element 3 is suctioned and held using air tweezers, and the semiconductor element 3 is placed in the semiconductor mounting hole 11. After that, the base 7 is heated and the melting point of the fixing material 12 +
The fixing material 12 is melted by heating to about 30 ° C.

At the time of melting, as shown in FIG. 1C, the base 7 is rotated and scrubbed while the frame 4 and the semiconductor element 3 are held, so that the back surface of the semiconductor element 3 and the element mounting portion 6 are separated from each other. Then, it is permeated between the element mounting portion 6 and the guide hole 9. At this time, some pressure is applied from above so that the semiconductor element 3 does not float.

Next, the base 7 is cooled to lower the temperature below the freezing point of the fixing material 12, and the base 7, the frame 4 and the semiconductor element 3 are fixed. Remove the air tweezers when the temperature drops below the freezing point. After that, as shown in FIG. 1D, the metal wiring 8 in the stitch 10 portion and the semiconductor element 3 are connected by a bonding wire 2, and further, FIG.
As shown in, the frame 4 and the base 7, and the frame 4 and the frame cover 1 are tightly fixed by electric welding to hermetically seal the inside.

According to the manufacturing method of the present invention, as shown in FIG. 4, the feeling of the metal wiring on the stitch and the pad of the semiconductor element can be reduced to about 100 μm. At this time,
Even if the wire draws an arc, the wire length is 0.31m
m, and the ink inductance is 0.26 nH. The impedance at this time is as shown in Table 2 when compared with the conventional one.

[0026]

[Table 2]

As is clear from Table 2, the impedance can be reduced to about 20% of the conventional value in the present invention.

Further, by inserting and fixing the semiconductor element into the element mounting hole which is a rectangular hole slightly larger than the semiconductor element, the position of the element is fixed more uniformly than in the conventional manufacturing method, so that it is also suitable for automation. ing.

[0029]

As described above, according to the method of manufacturing the semiconductor integrated circuit package of the present invention, the semiconductor element is inserted into the element mounting hole of the frame, the element mounting portion is moved, and the scrubbing is performed, whereby the stitch and the semiconductor The effect is that the gap between the end faces of the element can be reduced, the bonding wire can be shortened, and good high frequency characteristics can be obtained.

[Brief description of drawings]

FIG. 1A to FIG. 1E are process diagrams of a semiconductor integrated circuit package manufacturing method of the present invention.

FIG. 2 is an exploded view of a semiconductor integrated circuit package assembled by the manufacturing method of the present invention.

FIG. 3 is a cross-sectional view of a semiconductor integrated circuit package assembled by the manufacturing method of the present invention.

FIG. 4 is an enlarged view of a bonding wire of a semiconductor integrated circuit package assembled by the manufacturing method of the present invention.

FIG. 5 is an enlarged view of a bonding wire of a semiconductor integrated circuit package assembled by a conventional manufacturing method.

6A to 6D are process diagrams of a conventional method for manufacturing a semiconductor integrated circuit package.

[Explanation of symbols]

 1 frame cover 2 bonding wire 3 semiconductor element 4 frame 5 lead 6 element mounting portion 7 base 8 metal wiring 9 element mounting portion 10 stitch 11 element mounting hole 12 fixing material 13 frame cover 14 semiconductor element 15 stitch 16 frame 17 lead 18 metal wiring 19 fixing material 20 bonding wire 21 element mounting portion 22 holding jig

Claims (2)

(57) [Claims] 1. A semiconductor element, a base having an element mounting portion for mounting the semiconductor element, a frame having an element mounting hole for fitting the semiconductor element and metal wiring, and the semiconductor element and the metal wiring. In a method of manufacturing a semiconductor integrated circuit package including a bonding wire electrically connected and a frame cover, a first step of combining the base and the frame, and a second step of arranging a fixing material on the element mounting portion. And a third step of disposing the semiconductor element in the element mounting hole with the fixing material sandwiched between the semiconductor element and the element mounting portion by moving the element mounting portion while holding the semiconductor element. A fourth step of infiltrating a material, a fifth step of fixing the semiconductor element to the element mounting portion, and a sixth step of fixing the base and the frame. A step of connecting the semiconductor element and the metal wiring with the bonding wire, and an eighth step of fixing the frame and the frame cover.
And a method of manufacturing a semiconductor integrated circuit package. 2. A semiconductor integrated circuit package according to claim 1, wherein the semiconductor element mounting portion has a cylindrical shape, and the frame has a fitting hole into which the semiconductor element mounting portion is fitted. Item 1. In the manufacturing method according to Item 1, the first
Is a step of fitting the semiconductor element mounting part and the fitting hole to combine the base and the frame, and the fourth step is to hold the semiconductor element and fit the element mounting part to the fitting part. A method of manufacturing a semiconductor integrated circuit package, comprising the step of rotating the semiconductor integrated circuit package inserted in the hole and allowing the fixing material to penetrate between the semiconductor element and the element mounting portion.