JP2836364B2 - High frequency semiconductor device - Google Patents
High frequency semiconductor deviceInfo
- Publication number
- JP2836364B2 JP2836364B2 JP4105593A JP10559392A JP2836364B2 JP 2836364 B2 JP2836364 B2 JP 2836364B2 JP 4105593 A JP4105593 A JP 4105593A JP 10559392 A JP10559392 A JP 10559392A JP 2836364 B2 JP2836364 B2 JP 2836364B2
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- frequency semiconductor
- output electrodes
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5368—Shapes of wire connectors the bond wires having helical loops
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、高周波半導体装置に係
り、とくに、高周波で使用する半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency semiconductor device, and more particularly to a semiconductor device used at a high frequency.
【０００２】[0002]
【従来の技術】図４に従来例を示す。この図４におい
て、符号５１は、絶縁部材からなるケース５０上に装着
された高周波半導体を示す。ケース５０には、一方の入
出力端子５０Ａ，５０Ｂと他方の入出力端子であるガラ
ス端子５０Ｃが装備されている。そして、このガラス端
子５０Ｃは、図示の如く配線し易いようにケース５０上
に突出されている。符号６０は、ガラス端子５０Ｃと前
述した高周波半導体５１の入出力電極５１Ｂとの間を接
続するボンディングワイヤを示す。2. Description of the Related Art FIG. 4 shows a conventional example. In FIG. 4, reference numeral 51 denotes a high-frequency semiconductor mounted on a case 50 made of an insulating member . The case 50 is provided with one input / output terminal 50A, 50B and a glass terminal 50C as the other input / output terminal. The glass terminal 50C protrudes above the case 50 so as to facilitate wiring as shown in the figure. Reference numeral 60 denotes a bonding wire that connects between the glass terminal 50C and the input / output electrode 51B of the high-frequency semiconductor 51 described above.
【０００３】[0003]
【発明が解決しようとする課題】この従来の半導体装置
では、半導体の入出力電極からガラス端子までの間を接
続するワイヤ・ボンディングの持つインダクタ成分によ
って、高周波信号の損失を起こすという問題点があっ
た。In this conventional semiconductor device, there is a problem that a high-frequency signal is lost due to an inductor component of a wire bonding connecting between a semiconductor input / output electrode and a glass terminal. Was.
【０００４】[0004]
【発明の目的】本発明は、かかる従来例の有する不都合
を改善し、とくに、入出力端子部分における高周波損失
を有効に抑制し、これによって信号の損失を少なくした
高周波半導体装置を提供することを、その目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a high-frequency semiconductor device in which the disadvantages of the prior art are improved, and in particular, high-frequency loss at input / output terminals is effectively suppressed, thereby reducing signal loss. And its purpose.
【０００５】[0005]
【課題を解決するための手段】本発明では、高周波信号
用の複数の入出力電極を備えた高周波半導体と、この高
周波半導体を支持するケース部と、このケース部に装備
された複数の入出力端子とを備えた高周波半導体装置に
おいて、各入出力電極を同一面上に装備すると共に、こ
れらの各入出力電極を、ケース部に対向する面の中央部
に設けられ入力電極として機能する入出力電極と、その
左右両端部の同一面上に設けられ出力電極として機能す
る入出力電極とにより構成する。更に、ケース部の各入
出力端子とこれに対応する高周波半導体の各入出力電極
とを、バンプ部材を介して導通接続する。そして、前述
した高周波半導体の中央部に装備されたバンプ部材の周
囲を、前述したケース部材で囲む構造とする、という構
成を採っている。これによって前述した目的を達成しよ
うとするものである。In the present invention SUMMARY OF THE INVENTION comprises a high-frequency semiconductor having a plurality of input and output electrodes of the high-frequency signal <br/>, a case portion for supporting the high-frequency semiconductor is installed in the case portion in the high-frequency semiconductor device that includes a plurality of input and output terminals, the rewritable equipped with respective input and output electrodes on the same plane, this
Each of these input / output electrodes is provided at a central portion of a surface facing the case portion, and functions as an input electrode.
Provided on the same plane at both left and right ends and functions as output electrodes
And input / output electrodes . Furthermore, each input / output terminal of the case part and each input / output electrode of the corresponding high-frequency semiconductor
Preparative to conductively connected via the bumps member. Then, the periphery of the bump member provided at the center of the high frequency semiconductor described above.
A configuration is adopted in which the surrounding is configured to be surrounded by the case member described above . By Re This is intended to achieve the objectives described above.
【０００６】[0006]
【実施例】以下、本発明の一実施例を図１ないし図２に
基づいて説明する。まず最初に、本実施例における基本
的な構成を説明する。この図１に示す実施例の基本形
は、高周波用の複数の入出力電極１０Ａ，１０Ｂ，１０
Ｃを備えた高周波半導体１０と、この高周波半導体１０
を支持するケース部１１と、このケース部１１に装備さ
れた複数の入出力端子１１Ａ，１１Ｂ，１１Ｃとを備え
ている。高周波半導体１０の複数の入出力電極１０Ａ〜
１０Ｃは、ケース部１１に対向する面に設けられてい
る。ここで、各入出力電極１０Ａ〜１０Ｃは、前述した
ケース部１１に対向する面の中央部に設けられ入力電極
として機能する入出力電極１０Ｂと、その左右両端部の
同一面上に設けられ出力電極として機能する入出力電極
１０Ａ，１０Ｃとにより構成されている。また、これら
入出力電極１０Ａ〜１０Ｃに対向する位置に、前述した
ケース部１１の入出力端子１１Ｂ及び配線端子１５，１
６が配設されている。そして、このケース部１１の複数
の入出力端子１１Ｂ及び配線端子１５，１６と，これに
対応する高周波半導体１０の複数の入出力用電極１０Ａ
〜１０Ｃとは、それぞれバンプ部材１２を介して導通接
続されている。BRIEF DESCRIPTION OF THE DRAWINGS FIG.2To
It will be described based on the following.First, the basics in this embodiment
A typical configuration will be described.This figureIn oneExample shownBasic form of
Are a plurality of input / output electrodes 10A, 10B, 10
C with high frequency semiconductor 10
And a case 11 for supporting the
Provided with a plurality of input / output terminals 11A, 11B, 11C
ing. A plurality of input / output electrodes 10A- of the high-frequency semiconductor 10
10C is provided on a surface facing the case portion 11.
You.Here, the input / output electrodes 10A to 10C are as described above.
An input electrode provided at the center of the surface facing the case portion 11;
Input / output electrode 10B functioning as
Input / output electrodes provided on the same surface and functioning as output electrodes
10A and 10C.Also thisLa
Input / output electrodes 10A-10CAt the position opposite to
Input / output terminal 11B and wiring terminals 15, 1 of case 11
6 are provided.AndA plurality of this case part 11
Input / output terminal 11B and wiring terminals 15, 16 and
A plurality of input / output electrodes 10A of the corresponding high-frequency semiconductor 10
To 10C are connected through the bump member 12, respectively.
Has been continued.
【０００７】これを更に詳述すると、半導体１０の電極
１０Ａ，１０Ｂ，１０Ｃ上に、バンプ１２を形成する。
半導体１０を収容するケース部１１には第１の入出力端
子１１Ｂが設けられ、信号線部に接合面１１ａが形成さ
れている。この接合面１１ａは、ケース部１１の表面と
ほぼ同一面としている。半導体１０をフェイス・ダウン
にし、電極１０Ａ〜１０Ｃをバンプ１２を介して同軸形
の第１の入出力端子１１Ａの接合面１１ａと接合させ、
これによって、本実施例の基本構造が構成されている。 More specifically, a bump 12 is formed on the electrodes 10A, 10B, and 10C of the semiconductor 10.
A first input / output terminal 11B is provided on the case portion 11 for housing the semiconductor 10, and a bonding surface 11a is formed on the signal line portion. Joining surface 11a of this is in substantially flush with the surface of the case portion 11. The semiconductor 10 is face-down, and the electrodes 10A to 10C are joined to the joint surfaces 11a of the coaxial first input / output terminals 11A via the bumps 12 ,
This constitutes the basic structure of the present embodiment.
【０００８】図２に、本実施例の具体例を示す。この図
２では、ケース部１１の表面よりやや突出して中心線部
が接地部側１１Ａ，１１Ｃより短い第２の入出力端子１
１Ｂが設けられている。この第２の入出力端子１１Ｂ部
分には、バンプ１２を落とし込む凹部が設けられてい
る。この凹部は、図示のようにケース部１１の周囲が競
り上がってバンプ１２を取り囲むように構成されてい
る。 そして、これによりバンプ１２の変形を制御でき
る。また、不整合部分を短かくできるので、更に特性が
改善する。 [0008] FIG. 2 shows a specific example of the present embodiment. In FIG. 2, the second input / output terminal 1 slightly protruding from the surface of the case portion 11 and having a center line portion shorter than the ground portion side 11A, 11C.
1B is provided. The second input-output terminal 11B section
Min, the have is provided recess Translate the bumps 12
You . As shown in the drawing, the periphery of the case 11
And is configured to surround the bump 12
You. Thus, the deformation of the bump 12 can be controlled. In addition, since the mismatched portion can be shortened, the characteristics are further improved.
【０００９】図３に、本発明の変形例を示す。この図３
に示す変形例は、高周波半導体１０内の信号線路をコプ
レナで設計されており、入出力電極１０Ｂの両側に接地
電極１０Ａ，１０Ｃが設けられている。入出力電極１０
Ｂ、接地電極１０Ａ，１０Ｃは、それぞれ、入出力端子
１１Ｂの芯線と周囲の接地導体１１Ａ，１１Ｃ（円筒の
部分）と接合されており、更に特性の改善が図られてい
る。 [0009] Figure 3, shows the variation of the present invention. This figure 3
In the modification shown in FIG. 5, the signal line in the high-frequency semiconductor 10 is designed by coplanar, and ground electrodes 10A and 10C are provided on both sides of the input / output electrode 10B. Input / output electrode 10
B, the ground electrodes 10A and 10C are joined to the core wire of the input / output terminal 11B and the surrounding ground conductors 11A and 11C (cylindrical portion), respectively, to further improve the characteristics.
【００１０】[0010]
【発明の効果】以上説明したように、本発明によると、
半導体の入出力電極をバンプを介して同軸形の入出力端
子と垂直に接続しているので、接続部分での損失を減少
させることができ、更に中央部の入出力端子部分のバン
プの周囲を取り囲む構造としたので、バンプの変形を制
御することができ、又不整合部分を短かくできるので、
特性を更に改善することができる。 As described above , according to the present invention,
Since the semiconductor input / output electrodes are vertically connected to the coaxial input / output terminals via bumps, the loss at the connection part can be reduced, and the bumps at the central input / output terminals are further reduced.
The structure surrounding the bump prevents deformation of the bump.
Can be controlled and the mismatched part can be shortened,
Properties can be further improved.
【図１】本発明の一実施例の基本形を示す説明図であ
る。FIG. 1 is an explanatory diagram showing a basic form of an embodiment of the present invention.
【図２】本発明の一実施例を示す断面図である。FIG. 2 is a sectional view showing one embodiment of the present invention .
【図３】本発明の変形例を示す断面図である。FIG. 3 is a sectional view showing a modification of the present invention .
【図４】従来例を示す断面図である。FIG. 4 is a sectional view showing a conventional example.
１０ 高周波半導体 １０Ａ，１０Ｂ，１０Ｃ 入出力電極 １１ ケース部 １１Ａ，１１Ｃ 接地側入出力端子 １１Ｂ 信号入出力端子 １１ａ 接合面 １２ バンプ部材 １５，１６ 配線端子 DESCRIPTION OF SYMBOLS 10 High frequency semiconductor 10A, 10B, 10C Input / output electrode 11 Case part 11A, 11C Ground side input / output terminal 11B Signal input / output terminal 11a Joining surface 12 Bump member 15, 16 Wiring terminal
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平２−308554（ＪＰ，Ａ) 特開 平３−48436（ＪＰ，Ａ) 特開 平３−263333（ＪＰ，Ａ) 特開 平２−122640（ＪＰ，Ａ) 特開 昭49−87281（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/12────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-308554 (JP, A) JP-A-3-48436 (JP, A) JP-A-3-263333 (JP, A) JP-A-2- 122640 (JP, A) JP-A-49-87281 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 23/12
Claims (1)
た高周波半導体と、この高周波半導体を支持するケース
部と、このケース部に装備された複数の入出力端子とを
備えた高周波半導体装置において、前記各 入出力電極を同一面上に装備すると共に、これら
の各入出力電極を、前記ケース部に対向する面の中央部
に設けられ入力電極として機能する入出力電極と、その
左右両端部の同一面上に設けられ出力電極として機能す
る入出力電極とにより構成し、 前記 ケース部の各入出力端子とこれに対応する前記高周
波半導体の各入出力電極とを、バンプ部材を介して導通
接続すると共に、 前記高周波半導体の中央部に装備されたバンプ部材の周
囲を、前記ケース部材で囲む構造と したことを特徴とす
る高周波半導体装置。1. A and a high-frequency semiconductor having a plurality of input and output electrodes of the high-frequency signal, and a case portion for supporting the high-frequency semiconductor, high-frequency semiconductor that includes a plurality of input and output jacks on the case portion in the apparatus, the rewritable equipped with the respective input and output electrodes on the same surface, these
Each input / output electrode is provided at a central portion of a surface facing the case portion, and functions as an input electrode.
Provided on the same plane at both left and right ends and functions as output electrodes
That is constituted by the input and output electrodes, said high peripheral corresponding thereto and each output terminal of the case portion
The input / output electrodes of the high-frequency semiconductor are electrically connected to each other via bump members, and the periphery of the bump member provided at the center of the high-frequency semiconductor is connected.
A high-frequency semiconductor device , wherein the enclosure is surrounded by the case member .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4105593A JP2836364B2 (en) | 1992-03-31 | 1992-03-31 | High frequency semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4105593A JP2836364B2 (en) | 1992-03-31 | 1992-03-31 | High frequency semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05283552A JPH05283552A (en) | 1993-10-29 |
| JP2836364B2 true JP2836364B2 (en) | 1998-12-14 |
Family
ID=14411803
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4105593A Expired - Lifetime JP2836364B2 (en) | 1992-03-31 | 1992-03-31 | High frequency semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2836364B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001024100A (en) * | 1999-07-12 | 2001-01-26 | Mitsubishi Electric Corp | Microwave package |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2574510B2 (en) * | 1989-04-17 | 1997-01-22 | 松下電器産業株式会社 | High frequency semiconductor device |
| JPH02308554A (en) * | 1989-05-24 | 1990-12-21 | Hitachi Ltd | Semiconductor equipment for ultra-high frequencies |
| JPH03263333A (en) * | 1990-03-13 | 1991-11-22 | Mitsubishi Electric Corp | Semiconductor device |
-
1992
- 1992-03-31 JP JP4105593A patent/JP2836364B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05283552A (en) | 1993-10-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19980908 |