JP2988674B2 - Color signal control device - Google Patents

Description

The present invention relates to a color signal control device used in a color television receiver, a video tape recorder (VTR) and the like, and particularly to a color signal control device. It is an improved killer circuit.

(Prior Art) A color killer circuit is provided in a color television signal processing circuit. FIG. 3 shows a conventional color signal control device, in which a chroma signal is supplied to an input terminal 31 and introduced into a chroma amplifier 32. The output of the chroma amplifier 32 is input to the burst amplifier 33 and also to the second chroma amplifier 41.

The burst amplifier 33 extracts a burst signal and supplies it to an automatic color control (ACC) detector 34. ACC detector 34
Detects the amplitude of the burst signal and controls the gain of the chroma amplifier 32 based on the output of the burst signal. This allows the chroma amplifier
The burst signal output from 32 is always maintained at a constant level.

Further, the output of the burst amplifier 33 is connected to the killer detector 40.
And an automatic phase control (APC) detector 35. APC detector
35 compares the phase of the APC carrier (APC-CW) with the burst signal, and compares the error voltage with the voltage controlled oscillator (VCO) 3
Supply to 6 control terminals. The output of VCO36 is 90 ° phase shifter 37
Are input to the APC / KI carrier amplifier 39 via the amplifier 38. The APC / killer amplifier 39 creates an APC carrier APC-CW and a killer carrier KI-CW.

The APC loop consists of the APC detector 35, VCO 36, 90 ° phase shifter 37,
An amplifier 38 and an APC / KI carrier amplifier 39 are formed. As a result, the oscillation output of the VCO 36 is phase-synchronized with the burst signal.

APC / KI carrier amplifier 39 is a carrier for killer detection.
We have also created KI-CW, a carrier KI for this killer detection.
-CW is input to the killer detector 40. Killer detector 40
Performs the multiplication of the carrier KI-CW and the burst signal, puts the system in the color signal processing mode when a burst signal is present, and the color killer when there is no or very low level (weak electric field). Mode. Although not shown, the output (mode signal) of the killer detector 40 is supplied to a demodulator 42, a chroma amplifier 41, and the like.

The output of the chroma amplifier 41 is supplied to a demodulator 42. The carrier (RY) CW for demodulating the (RY) signal and the carrier (BY) CW for demodulating the (BY) signal are supplied from the carrier amplifier 43 to the demodulator 42. . The carrier amplifier 43 also uses the output of the VCO 36 to generate a carrier (RY) CW
And the carrier (BY) CWC.

FIG. 4 shows a specific circuit of the killer detector 40.

When a burst gate signal indicating a burst period is supplied to the base of the transistor Q13, the transistor Q13 is turned off, and the entire detector is in an operable state. The transistors Q14 and Q15 form a constant current source. A burst signal is supplied between the bases of the transistors Q9 and Q10 forming a differential pair. Further, a carrier KI-CW for killer detection is supplied between a common base of the transistors Q6 and Q7 and a common base of the transistors Q5 and Q8. Transistor Q5
Q10 form a double-balanced differential amplifier, a detection output (current) is taken out from a common collector of the transistors Q5 and Q7, and charged to the filter via the terminal P1.

The transistors Q1 to Q4 are current mirror circuit units for converting the differential output into a voltage and a current. Transistors Q11-Q14
Is a circuit for flowing an offset current during the burst gate period.

The killer operation level of the killer detector is determined by the ratio between the collector current of the transistor Q15, which is the operating current I0 of the detector, and the offset current Ioff (collector current of the transistor Q12).

When the detection output is high, a mode signal indicating the color reception state is obtained from the killer determination circuit 401, and when the detection output is low, a mode signal indicating the monochrome reception state is obtained from the killer determination circuit 401.

It is assumed that black and white reception is performed. At this time, the detection output is small (zero), and the mode signal indicating the black and white reception state is obtained from the killer determination circuit 401. However, this circuit has a carrier KI-CW for killer detection,
When the carrier easily leaks into the burst signal input line and the phase of the leaked carrier coincides with the phase axis of the detection carrier, a detection voltage appears on the filter. In response, the killer determination circuit 401 outputs a mode signal indicating the color reception state despite the monochrome reception state. That is, a malfunction occurs.

To reduce such malfunctions, the transistor Q12
This can be dealt with by increasing the killer offset current I off by inserting a high resistance between the collector and the filter. That is, by increasing the offset current I off, the filter is set so that it is difficult for the filter to be charged with the current by the detection output even if the leaked carrier exists. However, this method has a problem that normal operation cannot be obtained when the detection output is small during reception of a weak electric field. Also, in a color receiving state, it is very difficult to select a high resistance value for obtaining a normal detection output. This is because, when the electric field becomes weak, the detection output also becomes small, and depending on the selection of the resistance value, the mode signal indicating the color reception state may not be maintained in some cases.

FIG. 5 is a circuit designed to solve the above-described problem of the color signal control device.

3 are given the same reference numerals as in FIG. The difference is that the output of the ACC circuit 34 is further input to the killer discriminating circuit 401, and that the killer discriminating circuit 401 and the killer detector 40 are associated with each other.

FIG. 6 shows a specific circuit example of the killer detector 41 and the killer discriminating circuit 45.

The burst signal is differentially input between the bases of the transistors Q31 and Q32. Transistor Q30 forms a constant current source. Killer detection carrier KI-CW is supplied between the common base of transistors Q35 and Q36 and the common base of transistors Q34 and Q37. Transistors Q30-Q37 form a double balanced differential amplifier, and transistors Q36, Q
The common collector output of 37 is current converted by a current mirror circuit including transistors Q38 to Q40. The common collector output of the transistors Q34 and Q35 is current-converted by a current mirror circuit including the transistors Q41 to Q43. This conversion current is further applied to transistors Q44 to Q46.
Is supplied to the filter through a current mirror circuit consisting of The resistance RL is a load resistance.

During the burst gate period, the detection current is the load resistance RL,
The capacitor is smoothed by the filter capacitor, the charge is accumulated in the capacitor, and the charge of the capacitor is discharged spontaneously through the switch circuit by the transistors Q45 and Q46 and the gate circuit by the transistors Q47 and Q48 except for the gate period, but there is almost no voltage drop .

It is assumed that the state is the color reception state, and the state is changed from the state to the monochrome reception state. Then, since the burst signal disappears, if the detection output has no DC offset of the transistors Q45 and Q46, the filter output becomes the emitter potential of the transistor Q52. Transistors Q51, Q5
2. Q53 is a bias circuit.

The detector is associated with the output of the ACC detector 34 via a killer determination circuit 401. That is, the output of the ACC detector 34 is supplied between the bases of the transistors Q61 and Q62. Power supply current is supplied to the common emitter of the transistors Q61 and Q62 through the transistor Q63. The transistors Q64 and Q65 form a current mirror circuit. The collector output of transistor Q62 is
Supplied to 66 bases. This base has a transistor Q5
A current path is formed from one emitter via a resistor RB.

The transistors Q66, Q67, Q68, Q69, and Q70 form a comparison circuit between the filter output and the collector output of the transistor Q62, and a mode signal indicating a color reception state via a current mirror circuit including the transistors Q71 and Q72. This is a circuit for obtaining a mode signal indicating a reception state.

Now, it is assumed that the ACC detection is at the maximum sensitivity (ACC open loop). This state is obtained when the reception level is very low even in the monochrome reception state or the color reception state. At this time, the output of the ACC detector 34 has a higher potential on the base side of the transistor Q61.

Then, when the base potential of the transistor Q61 is high, the transistor Q62 operates, and the base potential of the transistor Q66 rises due to the voltage drop of the resistor RB. On the other hand, the filter output is at a low level. This allows the transistor Q6
The difference between the base potential of 7 (the filter output) and the base potential of the transistor Q66 increases (large DC offset). This means that the output of transistor Q68 is the base potential of transistor Q69 (base potential of transistor Q67).
Means that the collector output of the transistor Q68 cannot be stopped unless it becomes considerably large. That is, when the ACC open loop is formed, it means that the base potential of the transistor Q66 has increased and the DC offset has increased with respect to the filter output.

Thus, even if a carrier leaks into the berth signal input unit and a killer detection output is generated, a malfunction can be prevented by monitoring the ACC detection output.

Next, in the color reception state, the output potential of the transistor Q62 is high and the output potential of the transistor Q61 is low among the outputs of the ACC detector 34. For this reason, the transistor Q61 operates to lower the base potential of the transistor Q66 through the current mirror circuit of the transistors Q64 and Q65.

As a result, the base potential of the transistor Q66 decreases due to the voltage drop of the resistor RB, and the difference from the filter output is reduced (small DC offset). Therefore, at this time,
Even if the base potential of the transistor Q67 greatly changes, a color killer output is not immediately obtained (the transistor Q69 remains on), and the color mode signal can be maintained over a strong electric field and a weak electric field. Therefore, color fading at the time of a weak electric field can be prevented.

 However, the circuit of FIG. 6 has the following problem.

(A) DC offset is applied to killer discrimination circuit 401 by ACC detection output, and it is difficult to select current input and output from ACC detector (especially, collector current of transistor Q65, base current of transistor Q66, and resistor RB) Is accompanied.

(B) Although the load of the killer detector is given by the resistor RL, the influence of the DC offset, offset current, and input signal offset always appears on the load. It is very difficult to design such that the killer performance can be sufficiently improved.

(C) Further, it is difficult to obtain desired performance because the sensitivity and offset of the killer detector simultaneously appear.

(Problems to be Solved by the Invention) As described above, conventionally, there is no switching of the sensitivity of the killer detector with respect to the electric field intensity. May be incorrectly determined. In order to improve this, it has been considered to connect a high resistance to the filter. However, for this reason, it is immediately determined to be black and white at the time of a weak electric field in the color receiving state, and there is a problem that the performance is deteriorated.

When the ACC detection output is current-converted according to the strong electric field and the weak electric field as in the circuit of FIG. 6 to switch the killer detection sensitivity (increase the DC offset), the killer detector itself becomes Because of the presence of the offset and the offset of the ACC detection output, it is difficult to design to obtain the desired killer characteristics.

Therefore, in switching the sensitivity of the killer detector with respect to the electric field strength, the present invention changes the ratio of the killer operation current and the killer offset current by the ACC detection current, thereby making it difficult to cause a killer malfunction during black and white reception in a strong electric field. It is another object of the present invention to provide a color signal processing device which can make it difficult to cause a killer malfunction (color erasure) during color reception with a weak electric field.

The present invention is directed to a chroma signal amplifier to which a chroma signal including a burst signal is input, separating the burst signal from an output of the chroma signal amplifier, An automatic color control detector for detecting the amplitude of the chrominance signal amplifier and generating an automatic color control detection output for controlling the gain of the chroma signal amplifier; and an automatic phase generator for generating a reference carrier signal synchronized with the burst signal and including a voltage controlled oscillator. A control circuit, means for generating a second carrier signal for color killer control using the carrier signal from the automatic phase control circuit, and a phase comparison between the separated burst signal and the second carrier signal. A killer detector for generating a detection output for a color killer, and correcting the sensitivity of the killer detector in response to the automatic color control detection output signal. A sensitivity correction circuit, wherein the killer detector has a differential transistor to which the burst signal and the second carrier signal are input, and outputs different levels of detection outputs according to the presence or absence of the burst signal. A phase detection circuit to be generated; an operating current source which forms a current source of the differential transistor and determines a current amount of the phase detection circuit; and an offset current flows between a detection output terminal of the phase detection circuit and a reference potential point. The sensitivity correction circuit 412, in response to the automatic color control detection output, corrects at least one of the current of the phase detection circuit and the offset current, and adjusts the current ratio thereof to the automatic color The current detection circuit comprises a current correction circuit that increases the control detection output signal when it indicates a color reception state and decreases it when it indicates a black and white reception state. That.

(Operation) By the above means, the correction current from the killer detection sensitivity correction circuit is directly added to or subtracted from the detection current or the offset current of the killer detector, so that the mode signal output characteristic has a hysteresis characteristic. Therefore, no erroneous determination of the color mode is obtained in the black and white reception state,
Color fading does not occur during a weak electric field in the color receiving state.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. Since the entire system block is almost the same as the configuration shown in FIG. 6, the same parts as those in FIG. 6 are denoted by the same reference numerals. The difference from the circuit in FIG. 6 is that a killer detector 411 and a killer detection sensitivity correction circuit 412 are provided. The ACC detection output from the ACC detector 34 is input to the killer detection sensitivity correction circuit 412.

The ACC detection output is information indicating whether the mode is the black-and-white receiving mode or the color receiving mode, and can be used as information indicating the strong electric field state or the weak electric field state.

If the ACC detection output is, for example, equal to or higher than a predetermined level, it can be determined that the device is in the black-and-white receiving state, or that the signal is a weak electric field and a minute input signal even in the color receiving state.

If the ACC detection output is smaller than, for example, a predetermined level, it can be determined that the color reception state is set.

The killer detection sensitivity correction circuit 412 can determine the information from the ACC detector 34 as described above and correct the detection sensitivity of the killer detector 411.

Here, in the black-and-white receiving state, it is necessary to prevent erroneous determination (color mode determination) from leaking into the burst input section and being performed. For this purpose, the killer detection sensitivity correction circuit 412 needs to suppress the color killer output output from the killer detector 411 from easily changing, and makes the detection sensitivity of the killer detector 411 dull.

Next, in the color reception state, AC
When the C detection output is obtained and the electric field gradually becomes weaker from this state, if the erroneous determination is immediately made that the mode is the monochrome reception mode, the color disappears. Therefore, in such a case,
That is, it is preferable that the killer detection output does not immediately change from the color signal reception state (color mode) to the content indicating the black and white reception state (B / W mode) as long as the ACC detection output is obtained at a predetermined level or more. Therefore, the killer detection sensitivity correction circuit 412 reduces the sensitivity of the killer detector 411.

In other words, the killer detection sensitivity correction circuit 412 has a hysteresis characteristic with respect to the mode determination output of the killer detection 411.

FIG. 2 shows a specific configuration example of the killer detector 411 and the killer detection sensitivity correction circuit 412.

In FIG. 2, a burst signal is supplied between the bases of transistors Q81 and Q82. This transistor Q81 and Q
82 common emitters are transistors that form a constant current source
It is connected to the collector of Q91 and to the collector of a transistor Q112, which is the output of a current mirror circuit described later.

Transistor Q81 has transistors Q83 and Q84
And the collector of the transistor Q82 is connected to the common emitter of the transistors Q85 and Q86. Transistor Q84 and Q85 common base and transistor
Between the common base of Q83 and Q86, there is a carrier for killer detection
KI-CW is supplied. The common collector of the transistors Q83 and Q85 is supplied to the killer discrimination circuit 413, and is also connected to the collector of the transistor Q87, the collector of the transistor Q95, and the filter F for smoothing the detection output.

The emitter of transistor Q87 is
Connected to the common base of Q90 and the collector of transistor Q89. The transistors Q87 to Q90 form a current mirror circuit for extracting the output of the detector including the transistors Q81 to Q88 forming a double balanced differential amplifier.

Transistor Q95 can provide a DC offset to the output of filter F. The base of the transistor Q95 is connected to the + B power supply together with the base of the transistor Q94, and the common emitter of the transistors Q94 and Q95 is connected to the collector of the transistor Q92 constituting a constant current source.

The transistor Q93 is a switch transistor that turns on or off between the power supply line Vc and the ground potential.

The killer detector 411 obtains a detection output of the burst signal and the carrier KI-CW for killer detection, and this output is smoothed by a filter F and is output to a killer discrimination circuit 413.
Supplied to When a burst signal is present, a detection current is obtained and the output potential of the filter F is increased. When there is no burst signal in the black and white reception state, no detection output is obtained and the output potential of the filter F is reduced.

On the other hand, in the killer detection sensitivity correction circuit 412, an ACC detection output is supplied between the bases of the transistors Q103 and Q104. The ACC detection output is a result of amplitude detection of the burst signal. When the burst signal is at a sufficient level (in a color receiving state), the base potential of the transistor Q103 is low and the base potential of the transistor Q104 is high. The output is obtained, and when the burst signal is in a minute level (weak electric field) and in the black and white reception state, an output is obtained in which the base potential of the transistor Q103 is high and the base potential of the transistor Q104 is low.

The common emitter of the transistors Q103 and Q104 is connected to the collector of the transistor Q102 forming a constant current source. The transistor Q101 is a switch transistor connected between the power supply and the ground, and turns on during a burst signal period.

The collector output of transistor Q103 is
It is connected to the filter F via a current mirror circuit composed of the transistors 05 and Q106 and further via a current mirror circuit composed of the transistors Q109 and Q110.

The collector output of the transistor Q104 is supplied to a common emitter of the transistors Q81 and Q82 through a current mirror circuit formed by the transistors Q107 and Q108 and further through a current mirror circuit formed by the transistors Q111 and Q112. .

Therefore, the detection output of the ACC detector 34 is related to the killer detector 411 through the killer detection sensitivity correction circuit 412.

In this case, the transistors Q104, Q107, Q108, Q111, Q1
The twelve paths are associated with the operating current I0 of the killer detector 411, and the paths of the transistors Q103, Q105, Q106, Q109, Q110 are associated with the offset current Ioff of the killer detector 411. Here, the operation level of the killer detector 411 is
It is determined by the ratio between the operating current I0 and the offset current Ioff. The killer determination circuit 413 includes transistors Q112 to Q11.
7, a differential amplifier is composed of a pair of transistors Q113 and Q115 and a pair of transistors Q112 and Q114. ing. The output of this differential amplifier is taken out via transistors Q116 and Q117 of the current mirror and used as a mode discrimination signal. The transistors Q118 and Q119 form a VBE clamp circuit.
8, Q119 is connected in series between the power supply voltage Vc and the reference potential point, both bases are connected to + B power supply, and both emitters are connected to the filter F.

Now, if the detection output of the ACC detector 34 indicates the monochrome reception state, the base potential of the transistor Q103 is high and the base potential of the transistor Q104 is low. Then, the collector output of the transistor Q103 is connected to the current mirror circuit (Q1
05 to Q110) to the terminal of the filter F. That is, the offset current I off is increased. The increase in the offset current I off is due to the operating current of the killer detector 411.
That is, the difference from I0 is reduced, and the terminal potential of the filter F is reduced.

As a result, in the black-and-white receiving state, the output of the filter F has a lower potential, but the offset current is further increased by the ACC detection output, so that the determination output in the black-and-white (B / W) mode is more strongly maintained. In other words, even if a small amount of detection output appears due to leakage of the carrier into the burst input section in the black-and-white receiving state, the mode is not erroneously switched to the color mode determination output.

Next, in the color receiving state, the transistor Q103
, The base potential of the transistor Q104 increases. Then, the transistor Q104 operates, and the collector output is supplied to the emitters of the transistors Q81 and Q82 of the killer detector 411 through the current mirror circuit (Q107 to Q122). As a result, the operating current I of the killer detector 411
0 increases. This means that the detection current increases, and the ratio to the offset current is increased to forcibly increase the terminal voltage of the fill F (obtain the color mode determination).
That is, it has shifted in the direction. Therefore, even in the weak electric field receiving state, the color killer does not work immediately, the color does not disappear or arrives, and the killer detection performance can be improved.

In a weak electric field, the terminal voltage of the filter F is increased,
When working in the direction to maintain the color mode, it is considered that the color mode is maintained even in the black-and-white receiving state.However, in this case, the burst signal does not exist and the detection efficiency of the killer detector decreases, so the filter The F terminal voltage is
There is no need to worry because the color killer output (B / W mode) can be obtained sufficiently.

The correction current given to the offset current and the operating current has been described as a 1: 1 ratio, but the ratio may be changed.

According to the above-described embodiment, since the configuration is such that the operating current or the offset current ratio of the killer detector is controlled, an interface between the ACC detector and the killer detector can be easily obtained. In the case of the conventional circuit, the ACC detection output is associated with the killer detector in the form of bias control. According to this embodiment, coupling to the killer detector can be facilitated by selecting the current ratio of the transistors Q103 and Q104 and the number of transistors to be added.

Furthermore, according to the killer signal generation method, when the killer discriminating circuit 413 switches from the B / W mode to the color mode and from the color mode to the B / W mode, the mode switching is performed reliably and quickly.

Time to switch from B / W mode to color mode Transistor Q
83 requires a potential difference VBE at which the collector potential becomes the color mode. The charging voltage per gate at this time is ΔV1,
If the discharge voltage is ΔV2 ΔI: Killer correction current 0.1 mA, I0: Killer operating current
0.24mA, I off… Offset current 0.028mA, C… Filter capacitor 0.018μA, t1… Gate width 3.5m, VB
E… 0.7V, t… 63.5μ From the above two values, the time to reach the potential difference ΔV (= VBE) from B / W mode to color mode is Therefore, about 0.7 msec is the time from the B / W mode to the color mode.

Next, the time from the color mode to the B / W mode is the time until the collector potential difference of the transistor Q83 becomes VBE, and the discharge time per gate ΔV2 is Therefore, the potential difference ΔV from the color mode to the B / W mode
(= VBE) Therefore, the color erasing time from the color mode to the B / W mode state is 1.8 msec.

Summarizing the above points, in the case of B / W mode, the killer detector has good sensitivity because there is no burst signal at the time of strong electric field,
B / W mode judgment output is obtained. At the time of a weak electric field, noise is included, and by detecting the noise, coloring tends to occur. However, since there is no burst signal and the detection efficiency decreases at the time of a weak electric field, a B / W mode determination output is obtained.

In addition, when there is carrier leakage, the offset current I off increases in a strong electric field, and the sensitivity of the killer detector is reduced, so that a B / W mode determination output is obtained. When the electric field is weak, noise is included in addition to the carrier leakage, and the operating current Io of the killer detector increases.However, the sensitivity of the killer detector equivalently decreases due to the ratio of the carrier leakage to the noise, and B / W
A mode determination output is obtained.

On the other hand, in the case of the color mode, the determination output of the color mode is reliably obtained during the strong electric field. At the time of a weak electric field, noise is included in addition to the signal. However, it acts so as to increase the operating current Io of the killer detector 411, lowers the detection sensitivity, obtains a color mode determination output, and eliminates color fading.

[Effects of the Invention] As described above, according to the present invention, when switching the sensitivity of the killer detector with respect to the electric field strength, the ratio of the killer operating current and the killer offset current is changed by the ACC detection current, and the black and white is changed by the strong electric field. It is possible to make it difficult to cause a killer malfunction at the time of reception, and conversely, to make it difficult to cause a killer malfunction (color erasure) at the time of color reception with a weak electric field.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a main part of the present invention, FIG. 3 is a block diagram showing a conventional color signal control device, and FIG. FIG. 5 is a circuit diagram showing a part of the block in detail, FIG. 5 is a block diagram showing a conventional color signal control device, and FIG. 6 is a circuit diagram showing a part of the block in FIG. 32 Chroma amplifier, 33 Burst amplifier, 34 AC
C detector, 35… APC detector, 36… VCO, 37… 90 ° phase shifter, 38, 39, 41, 43… Amplifier, 42… Demodulator, 411
…… Killer detector, 412 …… Killer detection sensitivity correction circuit, 4
13 ... Killer discrimination circuit.

Continuation of the front page (56) References JP-A-54-48435 (JP, A) JP-A-60-125092 (JP, A) JP-A-62-137992 (JP, A) (58) Fields investigated (Int .Cl. ⁶ , DB name) H04N 9/70

Claims (1)

(57) [Claims] 1. A chroma signal amplifier to which a chroma signal including a burst signal is input; and a burst signal separated from an output of the chroma signal amplifier; an amplitude of the burst signal is detected to adjust a gain of the chroma signal amplifier. An automatic color control detector for generating an automatic color control detection output for controlling; an automatic phase control circuit including a voltage controlled oscillator for generating a reference carrier signal synchronized in phase with the burst signal; and a carrier signal from the automatic phase control circuit. Means for generating a second carrier signal for color killer control using: a killer detector for comparing the phases of the separated burst signal and the second carrier signal to generate a detection output for color killer; A sensitivity correction circuit for correcting the sensitivity of the killer detector in response to the automatic color control detection output signal; A phase detection circuit that has a differential transistor to which the burst signal and the second carrier signal are input, and generates detection outputs of different levels according to the presence or absence of the burst signal; An operating current source that forms a current source and determines a current amount of the phase detection circuit; and an offset current source that supplies an offset current between a detection output terminal of the phase detection circuit and a reference potential point; Responds to the automatic color control detection output, corrects at least one of the current of the phase detection circuit and the offset current, and determines the current ratio between them, when the automatic color control detection output signal indicates a color reception state. A color signal control circuit comprising a current correction circuit for increasing the current value and decreasing the value when the signal indicates a black and white reception state.