JP3068905B2 - Superconducting transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconducting transistor using an oxide superconducting material.

[0002]

2. Description of the Related Art FIG. 4 is a schematic view showing the structure of a quasiparticle injection type superconducting transistor. A collector region 1 made of a semiconductor and a base region 2 made of an oxide superconductor formed on the collector region 1 are shown. And an emitter region 4 made of a superconductor or a metal provided on the base region 2 with an insulating layer 3 interposed therebetween.

In this quasiparticle injection type superconductor transistor, quasiparticles injected from an emitter region 4 pass through a base region 2 made of a superconductor, reach a collector region 1 and flow out to an external electrode.

In this superconductor transistor, a semiconductor-superconductor contact having a low barrier is used as a base-collector junction for trapping quasiparticles with high efficiency. Considering the operation of this device as a transistor, the base region 2 made of a superconductor comes into contact with the collector region 1 made of a semiconductor, and a barrier having a height h measured from the Fermi level is formed at the contact portion. Suppose you have A positive potential V with respect to the base region 2 in the collector region 1
give. Considering a process in which electrons in a quasiparticle state in a superconductor are incident on the semiconductor side, the electrons are at an energy level higher by E than the Fermi energy of the superconductor. Here, E is the excitation energy of the quasiparticle, and E> △
Therefore, electrons can freely move to the semiconductor side over the barrier. On the other hand, an electric field exists in the semiconductor in a direction in which the electrons are extracted from the junction. Therefore, the collector region 1
The electrons in the quasi-particle state incident on are collected by the collector region 1 and flow out.

[0005]

However, in a conventional quasiparticle injection type superconducting transistor using an oxide superconducting material, in order to form a base region made of an oxide superconductor directly on a semiconductor to be a collector region, The semiconductor layer at the collector-base interface is oxidized, and an insulating layer is formed at the interface. Due to this insulating layer, the barrier between the collector and the base is increased, the transmittance of quasiparticles is reduced, and when an oxide superconducting material is used, there is a problem that it is difficult to create a device that operates as a transistor.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a superconducting transistor in which a semiconductor-oxide superconductor contact with a low barrier at a base-collector junction can be obtained. Is the subject.

[0007]

The superconducting transistor of the present invention comprises a collector region made of an In _x Ga _{1 -x} As semiconductor, a base region made of an oxide superconductor provided on the collector region, and a base region made of an oxide superconductor. an emitter region formed of a superconductor or a metal provided through an insulating layer on a region, a superconducting transistor consisting from the bonding interface of the base region and the collector region, toward the collector region direction, the in _x It is characterized in that In is provided with graded so that the composition amount of In of Ga _1-x As is increased.

[0008]

In In _x Ga _{1 -x} As, the dielectric constant and effective mass change due to a change in the composition ratio of In (Ga).
In the case of GaAs, the dielectric constant is small, that is, the image force is large, and in the case of InAs, the effective mass is small.

Therefore, in the vicinity of the interface between the base and the collector, the G of x to 0 is set in order to increase the reduction of the barrier due to the image force.
By using aAs and using InAs (x to 1) having a small effective mass at a position away from the interface, the penetration of quasiparticles is improved and the collection rate of the collector is increased.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic view showing the structure of a quasiparticle injection type superconducting transistor according to the present invention.

As shown in FIG. 1, this quasiparticle injection type superconducting transistor has a collector region 1 made of an n-like In _x Ga _{1 -x} As semiconductor and a Ba ₁ -pK _p BiO ₃ (here, 0.4 <p <0.6), Bi ₂ Sr ₂ CaCu
_A base region 2 made of an oxide superconductor such as ₂ O _x , YBa ₂ Cu ₃ O _x , and MgO, SiO ₂ ,
An emitter region 4 made of a metal or a superconductor provided via an insulating layer ₃ such as BaO, SrTiO ₃ , Al ₂ Os, or ZrO ₃ .

A feature of the present invention is that, in the above-described superconducting transistor, at the interface between the collector region 1 and the base region 2, n-like In _x Ga _{1− This is based on} the composition change of the dielectric constant and effective mass in xAs.

In n-In _x Ga _{1 -x} As, the dielectric constant and the effective mass change according to the composition ratio of In as shown in the following equation.

The dielectric constant ε is ε / ε ₀ = 12.19 + 1.65x, where ε ₀ is the vacuum permittivity.

Further, the effective mass m * is m * / m = 0.067-0.043x where m is the mass of the electrons.

The variation φ of the height of the barrier between the base and the collector and the width D of the barrier shown in FIG. 2 are φ∝1 / √ε and D∝√ε.

Therefore, near the base-collector interface,
GaAs of x to 0 is used to increase the reduction of the barrier due to the image force. That is, at the interface, ε is small,
A GaAs composition of x to 0 having a large m * is used.

At a position away from the interface, In _x Ga is formed so that InAs (x to 1) having a small effective mass forms a collector region that increases the collector collection rate of quasiparticles.
_{This is a} composition in which the In composition of _1-x As is continuously changed from 0 to ₁ .

Table 1 shows the height of the barrier between the In _0.53 Ga _0.97 As semiconductor and the interface between the metal and the superconducting layer, and the reduction of the barrier when In to 0.

[0021]

[Table 1]

As shown in FIG. 2, there is a decrease in the barrier of φ from the height of the barrier indicated by the chain line to the height of the barrier indicated by the solid line. In this way, a base-collector contact with a low barrier height is obtained.

The above-mentioned collector region 1 and base region 2
The insulating layer 3 can be formed by an MBE (Molecular Beam Epitaxy) method or an ion beam sputtering method, and the insulating layer 3 can be formed by an EB method. Also,
When a superconductor is used as the emitter region 4, it may be formed by the MBE method or the ion beam sputtering method similarly to the collector region 1 and the like.

Next, an example of manufacturing a superconducting transistor according to the present invention will be described.

FIG. 3 is a schematic diagram of an MBE apparatus suitable for use in the present invention. The MBE device will be described with reference to FIG.

Reference numeral 50 denotes a bell jar, which is set to a predetermined degree of vacuum by a vacuum pump (not shown).

Reference numeral 52 denotes a substrate holder which has a substrate heating heater for heating the substrate 10 therein, and is rotated by the substrate holder 52 motor.

Numerals 53 to 56 denote EB guns.
3 as Ga source, EB gun 54 as A source
s, In is supplied to the EB gun 55 as a source, and impurities are supplied to the EB gun 56.

In 58, a shutter 59 is a main shutter and controls the state of irradiation of the surface of the substrate 10 with the molecular beams emitted from the EB guns 53 to 56.

An example of manufacturing a superconducting transistor according to the present invention using the MBE apparatus will be described. Substrate 10
A collector region 1 made of In _x Ga _1-x As semiconductor
To form This collector region is formed from InAs to GaAs.
The composition of In _x Ga _1-x As is controlled so as to be s.
The composition control is performed by the power control of the EB gun or the shutter 58. At this time, the substrate temperature was 400 ° C., and the film formation rate was 0.1 mm.
It is 1 to 10 ° / sec.

When collector region 1 having a predetermined thickness is formed, base region 2 made of an oxide superconductor is provided on collector region 1.

For example, Ba _1-p K _p BiO ₃ (where,
A base region 2 made of a superconductor having a composition of 0.4 <p <0.6) is formed. Here, a typical value of p is 0.5.

Thereafter, an insulating layer 3 of MgO or the like is formed on the base region 2 by EB vapor deposition at a deposition rate of 0.1 ° / sec.
An emitter region 4 made of a superconductor having a composition of Ba _{1 -p} Kp BiO ₃ (here, 0.4 <p <0.6) is formed on the insulating layer 3 by an MBE apparatus. To form a superconducting transistor according to the present invention.

In addition, Au, Ag, Al, etc. are used for the electrodes of each layer, and BKBO itself may be used as the electrodes.

[0035]

As described above, according to the present invention, the height of the barrier between the base and the collector can be reduced, so that the transmittance of the quasi-particles to the collector can be increased.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a superconducting transistor according to the present invention.

FIG. 2 is a schematic diagram showing an energy state of a superconducting transistor according to the present invention.

FIG. 3 is a schematic diagram of an MBE apparatus suitable for use in the present invention.

FIG. 4 is a schematic sectional view showing a conventional superconducting transistor.

[Description of Signs] 1 Collector region 2 Base region 3 Insulating layer 4 Emitter region

──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Junnobu Yoshizato 2-18 Keihanhondori, Moriguchi City Sanyo Electric Co., Ltd. (56) References JP-A-61-272983 (JP, A) JP-A-64 -90575 (JP, A) JP-A-2-94677 (JP, A) JP-A-2-194669 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 39/00 H01L 39/22-39/24 H01L 29/68

Claims (1)

(57) [Claims] And 1. A In _x Ga _1-x As of semiconductor collector region, a base region formed of an oxide film superconductor provided on the collector region, provided via an insulating layer on the base region A superconducting transistor comprising: a superconductor or an emitter region made of a metal, wherein a composition amount of In in the In _x Ga _1-x As from a junction interface between the base region and the collector region toward a collector region. A superconducting transistor, characterized in that In is provided with graded so as to increase.