JP3149451B2 - Driving method of liquid crystal electro-optical element - Google Patents
Driving method of liquid crystal electro-optical elementInfo
- Publication number
- JP3149451B2 JP3149451B2 JP07923991A JP7923991A JP3149451B2 JP 3149451 B2 JP3149451 B2 JP 3149451B2 JP 07923991 A JP07923991 A JP 07923991A JP 7923991 A JP7923991 A JP 7923991A JP 3149451 B2 JP3149451 B2 JP 3149451B2
- Authority
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- Prior art keywords
- liquid crystal
- voltage
- crystal layer
- phase
- absolute value
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Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 57
- 238000000034 method Methods 0.000 title claims description 24
- 230000007704 transition Effects 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 7
- 238000002834 transmittance Methods 0.000 description 20
- 238000010586 diagram Methods 0.000 description 8
- 230000003287 optical effect Effects 0.000 description 6
- 230000010287 polarization Effects 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 238000012423 maintenance Methods 0.000 description 4
- 239000004990 Smectic liquid crystal Substances 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- AYYWUKWHSHVSLJ-UHFFFAOYSA-N (4-octan-2-yloxycarbonylphenyl) 4-(4-octoxyphenyl)benzoate Chemical compound C1=CC(OCCCCCCCC)=CC=C1C1=CC=C(C(=O)OC=2C=CC(=CC=2)C(=O)OC(C)CCCCCC)C=C1 AYYWUKWHSHVSLJ-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000002269 spontaneous effect Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000005262 ferroelectric liquid crystals (FLCs) Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、表示体、ライトバルブ
等の駆動方法に関し、詳しくは液晶物質を用いた表示体
の駆動方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a display, a light valve and the like, and more particularly, to a method for driving a display using a liquid crystal material.
【0002】[0002]
【従来の技術】反強誘電性液晶の反強誘電相における安
定状態と電場誘起強誘電相の二つの配向状態との間の、
いわゆる三安定スイッチングは、従来の表面安定化強誘
電性液晶素子(SSFLC) に見られる幾つかの本質的な問題
点を解決する方法の一つとして期待され、活発に研究が
進められている(A.D.L.Chandani et al.:Jpn.J.Appl.
Phys.,27, L729(1988), A.D.L.Chandani et al.:J
pn. J. Appl. Phys.,28,L1265(1988) 等参照)三安定ス
イッチングの主な特徴は次の4点である。BACKGROUND OF THE INVENTION Between a stable state in an antiferroelectric phase of an antiferroelectric liquid crystal and two orientation states of an electric field induced ferroelectric phase,
So-called tristable switching is expected as one of the methods to solve some essential problems found in the conventional surface-stabilized ferroelectric liquid crystal device (SSFLC), and is being actively studied ( ADLChandani et al .: Jpn.J.Appl.
Phys., 27, L729 (1988), A. D. L. Chandani et al .: J
pn. J. Appl. Phys., 28, L1265 (1988), etc.) The main features of tristable switching are the following four points.
【0003】(1) 電圧印加による反強誘電−強誘電相転
移には、直流電圧に対する急峻なしきい値特性がある
(図7)。(1) The antiferroelectric-ferroelectric phase transition caused by the application of a voltage has a sharp threshold characteristic with respect to a DC voltage (FIG. 7).
【0004】(2) その相転移に幅の広い光学的ヒステリ
シスを持つため、反強誘電相あるいは強誘電相を選択し
た後に維持電圧VH を印加しておけば、その状態を維持
することができる。(2) Since the phase transition has a wide optical hysteresis, the state can be maintained if a maintenance voltage VH is applied after selecting an antiferroelectric phase or a ferroelectric phase. .
【0005】(3) 強誘電相における二つの配向状態を光
学的に等価にすることができる。(3) Two orientation states in the ferroelectric phase can be made optically equivalent.
【0006】(4) 液晶層内の電荷の偏りを防ぐことがで
きるため、SSFLCに見られるような電気光学特性の
経時変化がない。(4) Since the bias of the charges in the liquid crystal layer can be prevented, there is no change with time in the electro-optical characteristics as seen in SSFLC.
【0007】これらの特徴を用いれば、単純マトリクス
駆動による高精細液晶表示体を作成することができる。
なお、本出願では電場誘起強誘電相における二つの配向
状態を区別するため、それらを強誘電相(+)、強誘電相
(-)と呼ぶことにする。By using these features, a high-definition liquid crystal display can be manufactured by simple matrix driving.
In the present application, in order to distinguish two orientation states in an electric field induced ferroelectric phase, they are referred to as a ferroelectric phase (+) and a ferroelectric phase.
I will call it (-).
【0008】これまでに知られている駆動方法の例とし
ては、図8に示した方法が特開平2-173724に開示されて
いる。図8(a)のVt とVdは、それぞれ走査電極と信号
電極に印加する電圧波形、図8(b)はそれらの合成波形
であり、この合成電圧波形が液晶層へ印加される。1フ
レームは〔S〕と〔NS〕で示した選択期間と非選択期
間から成り、選択期間〔S〕は、〔R〕と〔W〕で示し
たリセット期間と書き込み期間から成っている。As an example of a known driving method, a method shown in FIG. 8 is disclosed in Japanese Patent Application Laid-Open No. 2-137724. Vt and Vd in FIG. 8A are voltage waveforms applied to the scanning electrode and the signal electrode, respectively, and FIG. 8B is a composite waveform thereof, and this composite voltage waveform is applied to the liquid crystal layer. One frame includes a selection period and a non-selection period indicated by [S] and [NS], and the selection period [S] includes a reset period and a writing period indicated by [R] and [W].
【0009】この駆動方法では、リセット期間には液晶
層へ0ボルトを印加することによってOFF状態へリセ
ットする。そして、ON状態を選択する場合は、書き込
み期間の後半にV(A-F)sよりも大きい電圧を印加してO
N状態へスイッチした後、単極性の維持電圧波形(V0
−V2〜V0+V2)を印加して、ON状態(強誘電相)
を維持する。また、OFF状態を選択する場合には、書
き込み期間の後半にV(A-F)t以下の電圧を印加した後、
単極性の維持電圧波形を印加して、OFF状態(反強誘
電相)を維持する。In this driving method, the liquid crystal layer is reset to the OFF state by applying 0 volt to the liquid crystal layer during the reset period. When selecting the ON state, a voltage larger than V (AF) s is applied in the latter half of the writing period to
After switching to the N state, the unipolar sustain voltage waveform (V0
−V2 to V0 + V2) to apply the ON state (ferroelectric phase)
To maintain. When the OFF state is selected, after applying a voltage equal to or lower than V (AF) t in the latter half of the writing period,
An OFF state (antiferroelectric phase) is maintained by applying a unipolar sustain voltage waveform.
【0010】この駆動方法による表示原理を、図6を用
いて説明する。反強誘電相での光軸OAはスメクチック
層34と直交している。この液晶層を図6(b)のように
液晶配向膜310と透明電極37が設けられた二枚のガ
ラス基板38で挟み、さらに、偏光軸39が光軸OAと平行
又は垂直にセットされた偏光板35と、その偏光板と直交
している検光板36とで挟めば、光透過率は0(OFF
状態)となる。ここで、V(A-F)t以下の電圧を印加して
も光透過率の変化はわずかであり、OFF状態を維持す
ることができる。一方、絶対値がV(A-F)s以上の正極性
電圧を印加すれば、反強誘電相から強誘電相(+)へ相転
移する。この時の液晶分子配向方向(光軸)をOF(+)、自
発分極をPs(+)とする。また、絶対値がV(A-F)s以上の
負極性電圧を印加すれば、光軸がOF(-)で自発分極がP
s(-)であるもう一方の強誘電相(-)へ相転移する。OF
(+)、OF(-)と偏光軸のなす角度をそれぞれθ(+)、θ(-)
とすれば、それらは0ではないため光が透過し、ON状
態となる。そして、維持電圧VHを印加している限りそ
の状態を維持することができる。さらに、θ(+)とθ(-)
は互いに等しく、二つの強誘電相(+)と(-)の光透過率は
互いに等しいため、両者は光学的には等価である。した
がって、ON状態を選択するためには、光軸がOF(+)ま
たはOF(-)のいずれか一方の強誘電相を選択すればよ
い。[0010] The display principle according to the driving method will be described with reference to FIG. The optical axis OA in the antiferroelectric phase is orthogonal to the smectic layer 34. Sandwiching the liquid crystal layer in the two glass substrates 38 in which the liquid crystal alignment layer 310 and the transparent electrode 37 is provided as shown in FIG. 6 (b), the further polarization axis 39 is set parallel or perpendicular to the optical axis OA If the polarizing plate 35 is interposed between the polarizing plate 35 and the analyzing plate 36 orthogonal to the polarizing plate, the light transmittance is 0 (OFF).
State). Here, even if a voltage equal to or lower than V (AF) t is applied, the change in light transmittance is slight, and the OFF state can be maintained. On the other hand, when a positive polarity voltage having an absolute value of V (AF) s or more is applied, a phase transition from an antiferroelectric phase to a ferroelectric phase (+) occurs. At this time, the liquid crystal molecule alignment direction (optical axis) is OF (+), and the spontaneous polarization is Ps (+). If a negative voltage having an absolute value of V (AF) s or more is applied, the optical axis is OF (-) and the spontaneous polarization is P
Phase transition to the other ferroelectric phase (-), which is s (-). OF
(+), The angle between OF (-) and the polarization axis is θ (+), θ (-), respectively.
Then, since they are not 0, light is transmitted, and they are turned on. Then, the state can be maintained as long as the sustain voltage VH is applied. Furthermore, θ (+) and θ (-)
Are equal to each other, and since the two ferroelectric phases (+) and (-) have the same light transmittance, they are optically equivalent. Therefore, in order to select the ON state, the ferroelectric phase whose optical axis is OF (+) or OF (-) may be selected.
【0011】ところが、強誘電相を維持するためには、
維持電圧を印加し続けなければならない。もし、一方極
性の電圧を印加し続けると、液晶層内の不純物イオンが
液晶層と配向膜との界面に掃き寄せられて、液晶の電気
光学特性に悪影響を及ぼす。したがって、外部印加電圧
の極性の偏りによる電気光学特性の経時変化を防ぐため
には、単位時間内の電圧の時間平均値を0にしなければ
ならない。そこで、この駆動方法では、データ電圧波形
を交流として、さらに、1フレーム内においては交流で
はない書き込み電圧波形と維持電圧波形の極性を、1フ
レーム毎に反転することによって、単位時間内での電圧
の時間平均値が零となるようにしている。However, in order to maintain the ferroelectric phase,
The sustain voltage must be continuously applied. If a voltage of one polarity is continuously applied, impurity ions in the liquid crystal layer are swept to the interface between the liquid crystal layer and the alignment film, which adversely affects the electro-optical characteristics of the liquid crystal. Therefore, in order to prevent the electro-optical characteristics from changing over time due to the bias of the polarity of the externally applied voltage, the time average value of the voltage within a unit time must be set to zero. Therefore, in this driving method, the data voltage waveform is set to AC, and the polarity of the write voltage waveform and the sustain voltage waveform which are not AC in one frame is inverted for each frame, so that the voltage in a unit time is changed. Is set to zero.
【0012】[0012]
【発明が解決しようとする課題】しかし、従来の駆動方
法は以下に述べるような二つの課題を持っている。However, the conventional driving method has the following two problems.
【0013】図8(b) 第2フレームの電圧波形は、OF
F状態を選択する場合に液晶層へ印加される電圧波形で
ある。既に説明したように、絶対値がしきい値以下の電
圧VNS=−(V0+V1)+V2 を書き込み期間の最後に印
加し、その直後にVNSよりも小さい維持電圧を印加す
る。このような駆動方法で高いコントラスト比を得るこ
とは困難である。その理由を、図3を用いて説明する。FIG. 8 (b) shows the voltage waveform of the second frame as OF
It is a voltage waveform applied to a liquid crystal layer when F state is selected. As described above, a voltage VNS =-(V0 + V1) + V2 having an absolute value equal to or less than the threshold value is applied at the end of the writing period, and immediately thereafter, a sustain voltage smaller than VNS is applied. It is difficult to obtain a high contrast ratio by such a driving method. The reason will be described with reference to FIG.
【0014】簡単のために維持電圧を一定値VHとし、
VNS を印加した時の光透過率をINSで表し、その直後
にVHを印加したときの光透過率をIHで表すことにす
る。図3の破線で描かれたループCは、印加電圧の最大
値をVNSとしたときのヒステリシス特性を示している。
この図からわかるように、電圧をしきい値よりも低いV
NSから下げて行くときにも、光透過率は矢印のように変
化して、ヒステリシス特性を示す。したがって、電圧V
NSを印加した直後に維持電圧VH を印加したときの光透
過率IH は図示したようになる。コントラスト比はIH
に反比例するため、IH を十分小さくすることができな
い従来の駆動方法では、高いコントラスト比を得ること
は困難である。For the sake of simplicity, the maintenance voltage is set to a constant value VH,
The light transmittance when VNS is applied is represented by INS, and the light transmittance when VH is applied immediately thereafter is represented by IH. A loop C drawn by a broken line in FIG. 3 shows a hysteresis characteristic when the maximum value of the applied voltage is VNS.
As can be seen from this figure, the voltage is set to V lower than the threshold.
Even when going down from NS, the light transmittance changes as shown by the arrow and shows hysteresis characteristics. Therefore, the voltage V
The light transmittance IH when the maintenance voltage VH is applied immediately after the application of NS is as shown in the figure. Contrast ratio is IH
Therefore, it is difficult to obtain a high contrast ratio by the conventional driving method in which IH cannot be sufficiently reduced.
【0015】二つめの課題は、一般的に、強誘電相から
反強誘電相への相転移の緩和速度が逆方向の相転移の緩
和速度と比較して遅いため、リセット期間を長くしなけ
ればならず、画面走査に時間がかかる、ということであ
る。The second problem is that the reset period must be lengthened because the relaxation speed of the phase transition from the ferroelectric phase to the antiferroelectric phase is generally slower than the relaxation speed of the phase transition in the opposite direction. That is, it takes time to scan the screen.
【0016】本発明は上記課題を解決するためのもので
あり、その目的とするところは、三安定スイッチングの
特長を十分に生かして、高いコントラスト比と高い光透
過率を得ることができ、さらに電荷の偏りを防ぐことが
できるマルチプレックス駆動方法を提供するところにあ
る。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to obtain a high contrast ratio and a high light transmittance by fully utilizing the features of tristable switching. It is an object of the present invention to provide a multiplex drive method capable of preventing charge bias.
【0017】[0017]
【課題を解決するための手段】本発明の液晶電気光学素
子の駆動方法は、走査電極を有する基板と信号電極を有
する基板との間に液晶層が挟持されてなり、前記液晶層
は反強誘電相の配向状態と強誘電相の配向状態を有して
なる液晶電気光学素子の駆動方法において、選択期間内
に前記液晶層のいずれかの配向状態を選択するための電
圧を前記液晶層に印加する工程と、非選択期間に前記選
択した配向状態を維持するための電圧を前記液晶層に印
加する工程と、を有し、 前記選択期間内に前記液晶層を
前記反強誘電相の配向状態に選択する際に前記液晶層に
印加される電圧は、その極性が互いに異なる2レベルの
電圧を含み、各電圧レベルの絶対値が前記反強誘電相か
ら強誘電相へ相転移させるときのしきい値電圧の絶対値
以下に設定されていることを特徴とする。The driving method of the liquid crystal electro-optical device of the present invention According to an aspect of the liquid crystal layer is sandwiched between the substrate having a substrate and a signal electrode having a scan electrode, the liquid crystal layer <br / > Is a method for driving a liquid crystal electro-optical element having an orientation state of an antiferroelectric phase and an orientation state of a ferroelectric phase, wherein a voltage for selecting one of the orientation states of the liquid crystal layer within a selection period. Applying the voltage to the liquid crystal layer, and applying a voltage for maintaining the selected alignment state to the liquid crystal layer during a non-selection period, the liquid crystal layer within the selection period
When selecting the orientation state of the antiferroelectric phase, the liquid crystal layer
The applied voltage has two levels whose polarities are different from each other.
Voltage, and the absolute value of each voltage level is the antiferroelectric phase.
Absolute value of threshold voltage for phase transition from ferroelectric phase to ferroelectric phase
It is characterized in that it is set as follows .
【0018】このように、選択期間内に液晶層を反強誘
電相の配向状態に選択する際に、液晶層に印加される電
圧は、その極性が互いに異なる2レベルの電圧を含むこ
とで、反強誘電相の配向状態での液晶層の光透過率は例
えば図2の実線の通りとなり、図2の破線に示す従来駆
動と比べて改善される。 As described above, the liquid crystal layer is strongly induced during the selection period.
When selecting the orientation state of the electric phase, the voltage applied to the liquid crystal layer
The voltage must include two levels of voltage with different polarities.
The light transmittance of the liquid crystal layer in the antiferroelectric phase alignment state is
For example, as shown by the solid line in FIG.
It is improved as compared to motion.
【0019】本発明ではさらに、前記選択期間内に前記
液晶層を前記強誘電相の配向状態に選択する際に前記液
晶層に印加される電圧は、その極性が互いに異なる2レ
ベルの電圧を含み、先に前記液晶層に印加される電圧は
前記反強誘電相から強誘電相へ相転移させるときの飽和
値電圧の絶対値以上に設定され、後に前記液晶層に印加
される電圧は前記強誘電相から反強誘電相へ相転移させ
るときのしきい値電圧の絶対値以上に設定されることが
好ましい。 [0019] In the present invention, further, in the selection period,
When selecting the liquid crystal layer in the orientation state of the ferroelectric phase, the liquid
The voltage applied to the crystal layer is two voltages whose polarities are different from each other.
And the voltage applied to the liquid crystal layer first is
Saturation during phase transition from antiferroelectric phase to ferroelectric phase
Value is set to be equal to or greater than the absolute value of the voltage, and later applied to the liquid crystal layer.
The applied voltage causes a phase transition from the ferroelectric phase to the antiferroelectric phase.
May be set higher than the absolute value of the threshold voltage when
preferable.
【0020】[0020]
【実施例】(実施例1) 図6(b)に示したように、ガラス基板上に透明電極(I
TO)を形成し、さらにその上に液晶配向膜(ポリイミ
ド)を形成する。上下基板に形成した透明電極は、それ
ぞれ走査電極と信号電極に相当する。そして、液晶配向
膜をラビング処理する。このような2枚の基板間に液晶
材料 4-(1-methylheptyloxycarbonyl)phenyl-4'-octylo
xybiphenyl-4-carboxylate(MHPOBC)を封入し、
環境温度を反強誘電性カイラルスメクティックC相の温
度範囲に保持したものを試料として用いた。液晶層厚は
1.7μmである。この試料を2枚の直交する偏光板で挟
み、一方の偏光板の偏光軸をスメクチック層面と直交さ
せた。70℃における光透過率のヒステリシス特性を図7
に示す。V(A-F)t=14〔v〕、V(A-F)s=20
〔v〕、V(F-A)t=6〔v〕である。EXAMPLES (Example 1) As shown in FIG. 6 (b), a transparent electrode on a glass substrate (I
TO), and a liquid crystal alignment film (polyimide) is further formed thereon. The transparent electrodes formed on the upper and lower substrates correspond to a scanning electrode and a signal electrode, respectively. Then, a rubbing treatment is performed on the liquid crystal alignment film. The liquid crystal material 4- (1-methylheptyloxycarbonyl) phenyl-4'-octylo
xybiphenyl-4-carboxylate (MHPOBC)
A sample whose ambient temperature was kept within the temperature range of the antiferroelectric chiral smectic C phase was used as a sample. The liquid crystal layer thickness is
1.7 μm. This sample was sandwiched between two orthogonal polarizing plates, and the polarization axis of one polarizing plate was orthogonal to the smectic layer surface. Fig. 7 shows the hysteresis characteristics of the light transmittance at 70 ° C.
Shown in V (AF) t = 14 [v], V (AF) s = 20
[V], V (FA) t = 6 [v].
【0021】本発明による駆動電圧波形を図1に示す。
図1(a)は走査電圧波形、図1(b)のVd(OFF)、Vd(ON)
はそれぞれ反強誘電相(OFF状態)と強誘電相(ON
状態)を選択するためのデータ電圧波形である。図2の
上段は液晶層へ印加される電圧波形であり、走査電圧波
形とデータ電圧波形の合成波形である。そして、図2の
下段はそれに対する液晶の電気光学応答である。リセッ
ト電圧はVSE=0〔v〕、データ電圧は|VD1|=|V
D2|=3〔v〕とし、選択期間の最後から二番目の書き
込み電圧パルスの波高値はVS1=17〔v〕、最後の書き
込み電圧パルスの波高値はVS2=−4〔v〕とした。維
持電圧波形としては、負極性から始まる±9〔v〕の交
流電圧パルスとした。また、補償電圧波形としては、パ
ルス幅と波高値がそれぞれPW2とVC=−(VS1+VS2+
VSE)=−13〔v〕の電圧パルスを、リセット期間の最
初に印加することにした。駆動デューティ比とパルス幅
PW1、PW2はそれぞれ1/1000と480μsec、8
0μsecであり、維持電圧波形の周波数は1/(1.991×10
-3) Hzである。FIG. 1 shows a drive voltage waveform according to the present invention.
FIG. 1A shows a scanning voltage waveform, and Vd (OFF) and Vd (ON) in FIG. 1B.
Are the antiferroelectric phase (OFF state) and the ferroelectric phase (ON
9 is a data voltage waveform for selecting (state). The upper part of FIG. 2 shows a voltage waveform applied to the liquid crystal layer, which is a composite waveform of the scanning voltage waveform and the data voltage waveform. The lower part of FIG. 2 shows the electro-optical response of the liquid crystal to that. The reset voltage is VSE = 0 [v], and the data voltage is | VD1 | = | V
= 2 [v], the peak value of the penultimate write voltage pulse in the selection period is VS1 = 17 [v], and the peak value of the last write voltage pulse is VS2 = -4 [v]. The sustain voltage waveform was an AC voltage pulse of ± 9 [v] starting from negative polarity. As the compensation voltage waveform, the pulse width and the peak value are PW2 and VC = − (VS1 + VS2 +
A voltage pulse of (VSE) =-13 [v] is applied at the beginning of the reset period. The drive duty ratio and pulse widths PW1 and PW2 are 1/1000 and 480 μsec, respectively.
0 μsec, and the frequency of the sustain voltage waveform is 1 / (1.991 × 10
-3) Hz.
【0022】信号電極にONデータ電圧波形Vd(ON)を
印加した場合、選択期間の最後から二番目に液晶層へ印
加される電圧はVS1−VD1=20[v]となり、その絶
対値が反強誘電相から強誘電相へ相転移させる時の飽和
値V(A-F)Sの絶対値以上となるため、反強誘電相から強
誘電相(+)への相転移が起こる。それに続く最後の電
圧は−7[v]である。このようにパルス電圧の波高値
が+20[v]から−7[v]へ直接変化した場合、7
[v]は|V(F-A)t|以上であるため、反強誘電相を通
り越してもう一方の強誘電相(−)へスイッチする。そ
の後、非選択期間には−6〜−12[v]と6〜12
[v]という維持電圧パルスが交互に印加されて、交互
に強誘電相(−)と強誘電相(+)の状態になるため、
ON状態が維持される。The case of applying the ON data voltage waveform Vd (ON) to the signal electrode, the voltage applied from the end of the selection period in the second to the liquid crystal layer is VS1-VD1 = 20 [v] and Do Ri, the absolute
Saturation when the pair transitions from an antiferroelectric phase to a ferroelectric phase
The value V (AF) absolute value than the Do because of S, phase transition to the ferroelectric phase from the anti-ferroelectric phase (+) occurs. The last voltage that follows is -7 [v]. As described above, when the peak value of the pulse voltage directly changes from +20 [v] to −7 [v], 7
Since [v] is equal to or greater than | V (FA) t |, it switches over to the other ferroelectric phase (−) through the antiferroelectric phase. Thereafter, during the non-selection period, -6 to -12 [v] and 6 to 12
Since the sustain voltage pulse [v] is alternately applied to alternately enter the ferroelectric phase (-) and the ferroelectric phase (+),
The ON state is maintained.
【0023】次に、信号電極にOFFデータ電圧波形V
d(OFF)を印加した場合、選択期間の最後から二番目に
液晶層へ印加される電圧は14〔v〕となる。この値は|
V(A-F)t|以下であるため、反強誘電相から強誘電相
(+) への相転移は起こらない。この時の光透過率は図3
に示したようにINSである。それに続く最後の電圧は、
−1〔v〕である。この電圧は、最後から二番目の電圧
とは逆極性のため、この期間に光透過率はほぼ0に近い
値まで低下する。その後、非選択期間には−6〜−12
〔v〕と6〜12〔v〕という維持電圧パルスが交互に印
加される。この場合、光透過率は図3に示したループB
にほぼ従うように変化する。ただし、この図では正極性
側のみ示してある。Next, the OFF data voltage waveform V is applied to the signal electrode.
When d (OFF) is applied, the voltage applied to the liquid crystal layer from the end of the selection period is 14 [v]. This value is |
V (AF) t |
No phase transition to (+) occurs. The light transmittance at this time is shown in FIG.
As shown in FIG. The last voltage that follows is
-1 [v]. Since this voltage has the opposite polarity to the penultimate voltage, the light transmittance falls to a value close to zero during this period. Thereafter, during the non-selection period, -6 to -12
Sustain voltage pulses of [v] and 6 to 12 [v] are applied alternately. In this case, the light transmittance is the loop B shown in FIG.
To almost follow. However, in this figure, only the positive side is shown.
【0024】このような駆動方法による実際の光透過率
の時間変化を図2に実線で示す。比較のために、従来方
法によって駆動した場合の光透過率を、同図の破線で示
した。これより、ON状態の光透過率については両者の
間に差は見られないが、OFF状態の光透過率には明ら
かな差が認められる。本発明によるOFF状態の平均光
透過率は、従来方法によるそれのほぼ 2/3 倍となっ
ている。コントラスト比はOFF状態の光透過率に反比
例するため、コントラスト比は従来のほぼ3/2倍とな
り、1:25から1:35へ向上した。さらに、前述し
たように補償電圧パルスを1個印加しているため、1フ
レーム内に液晶層へ印加される電圧の時間平均値は0と
なり、液晶層内での電荷の偏りは起こらない。The change over time of the actual light transmittance by such a driving method is shown by a solid line in FIG. For comparison, the light transmittance when driven by the conventional method is shown by a broken line in FIG. From this, there is no difference between the two in the light transmittance in the ON state, but a clear difference is recognized in the light transmittance in the OFF state. The average light transmittance in the OFF state according to the present invention is almost 2/3 times that of the conventional method. Since the contrast ratio is inversely proportional to the light transmittance in the OFF state, the contrast ratio is almost 3/2 times that of the conventional one, and is improved from 1:25 to 1:35. Further, as described above, since one compensation voltage pulse is applied, the time average value of the voltage applied to the liquid crystal layer in one frame is 0, and the electric charge is not biased in the liquid crystal layer.
【0025】次に、本発明による駆動方法と従来技術に
よる駆動方法の表示速度を比較する。強誘電相から反強
誘電相への緩和時間が約420μsec であるため、従来
の方法では、選択期間の長さは80×2+420=58
0μsec となる。これに対して、本発明による方法で
は、選択期間(書き込み期間)の長さは160μsecで
ある。したがって、本発明による駆動方法を用いれば、
従来方法による駆動方法よりも約3.5倍の高速化が達
成される。ただし、どの程度高速化されるか、というこ
とは、強誘電相から反強誘電相への緩和時間によって異
なり、緩和時間が長ければ長いほどその効果が大きくな
る。Next, the display speeds of the driving method according to the present invention and the driving method according to the prior art will be compared. Since the relaxation time from the ferroelectric phase to the antiferroelectric phase is about 420 μsec, the length of the selection period is 80 × 2 + 420 = 58 in the conventional method.
0 μsec. On the other hand, in the method according to the present invention, the length of the selection period (writing period) is 160 μsec. Therefore, if the driving method according to the present invention is used,
About 3.5 times higher speed than the conventional driving method is achieved. However, how much the speed is increased depends on the relaxation time from the ferroelectric phase to the antiferroelectric phase, and the longer the relaxation time, the greater the effect.
【0026】[0026]
【0027】(実施例2) 本実施例では、実施例1の駆動方法において、|VD1|
と|VD2|の値の上限V2を3〔v〕として、その範囲
内で変化させた。ただし、実施例1と同様に VD1=−
VD2である。このようにデータ電圧を変調することによ
って、階調表示を行うことができた。(Embodiment 2 ) In this embodiment, | VD1 |
And the upper limit V2 of | VD2 | is set to 3 [v] and changed within that range. However, as in the first embodiment, VD1 = −
VD2. By modulating the data voltage in this way, a gradation display could be performed.
【0028】(実施例3) 本実施例では、図4に示したように、非選択期間に印加
される維持電圧波形に補償電圧波形を重畳した。VS1=
17〔v〕,VS2=−4〔v〕,VH=±9〔v〕,VC=
−13〔v〕,|VD1|=|VD2|=3〔v〕である。し
たがって、維持電圧波形に補償電圧波形を重畳した部分
の電圧(VH+VC)は−4〔v〕となる。本実施例で
も、実施例1と同様な表示特性が得られた。Embodiment 3 In this embodiment, as shown in FIG. 4, a compensation voltage waveform is superimposed on a sustain voltage waveform applied during a non-selection period. VS1 =
17 [v], VS2 = -4 [v], VH = ± 9 [v], VC =
−13 [v], | VD1 | = | VD2 | = 3 [v]. Therefore, the voltage (VH + VC) at the portion where the compensation voltage waveform is superimposed on the sustain voltage waveform is -4 [v]. Also in this embodiment, the same display characteristics as those of the first embodiment were obtained.
【0029】(実施例4) 実施例1と同じ試料を用いて、図5に示したように維持
電圧波形が直流である電圧波形によって駆動した。VS1
=17〔v〕、VS2=−4〔v〕、VH=−9〔v〕、
|VD1|=|VD2|=3〔v〕、VSE=0〔v〕であ
る。1フレーム期間内での印加電圧の平均値は0ではな
いため、1フレーム毎にすべての電圧波形の極性を反転
することによって、単位時間内での平均値が0になるよ
うにした。表示特性は実施例1と同様に1:17のコン
トラスト比が得られた。また、実施例4と同様に、デー
タ電圧を変調することによって、階調表示を行うことが
できた。Example 4 The same sample as in Example 1 was driven by a voltage waveform whose maintenance voltage waveform was DC as shown in FIG. VS1
= 17 [v], VS2 = -4 [v], VH = -9 [v],
| VD1 | = | VD2 | = 3 [v] and VSE = 0 [v]. Since the average value of the applied voltage within one frame period is not 0, the average value within a unit time is set to 0 by inverting the polarity of all the voltage waveforms for each frame. As for the display characteristics, a contrast ratio of 1:17 was obtained as in Example 1. Further, as in the case of the fourth embodiment, gradation display could be performed by modulating the data voltage.
【0030】[0030]
【0031】(実施例5) 実施例1と同じ構成において、環境温度を100℃とし
た。実施例1の場合よりも温度を高くしたため、強誘電
相から反強誘電相への緩和速度が速くなった。したがっ
て、PW1=160μsecとしても駆動することができ、
1:31のコントラスト比が得られた。(Embodiment 5 ) In the same configuration as in Embodiment 1, the environmental temperature was set to 100 ° C. Since the temperature was higher than in Example 1, the relaxation rate from the ferroelectric phase to the antiferroelectric phase was increased. Therefore, it can be driven even when PW1 = 160 μsec,
A contrast ratio of 1:31 was obtained.
【0032】[0032]
【発明の効果】以上述べたように本発明によれば、反強
誘電相と電場誘起強誘電相との間のスイッチングを用い
る液晶電気光学素子のマルチプレックス駆動において、
従来の方法よりもOFF状態の光透過率を低くすること
ができるため、より高いコントラスト比を得ることがで
きる、という効果を有する。本発明は、大型・高精細液
晶ディスプレイやライトバルブへ応用することができ
る。As described above, according to the present invention, in a multiplex drive of a liquid crystal electro-optical element using switching between an antiferroelectric phase and an electric field induced ferroelectric phase,
Since the light transmittance in the OFF state can be reduced as compared with the conventional method, a higher contrast ratio can be obtained. INDUSTRIAL APPLICABILITY The present invention can be applied to a large-sized and high-definition liquid crystal display and a light valve.
【0033】[0033]
【図1】本発明による第1の実施例を示す図。FIG. 1 is a diagram showing a first embodiment according to the present invention.
【図2】第1の実施例において、液晶層へ印加される電
圧波形と、液晶の電気光学応答を示す図。FIG. 2 is a diagram showing a voltage waveform applied to a liquid crystal layer and an electro-optical response of the liquid crystal in the first embodiment.
【図3】低電圧領域でのヒステリシス特性を示す図。FIG. 3 is a diagram showing hysteresis characteristics in a low voltage region.
【図4】本発明による第3の実施例を示す図。FIG. 4 is a diagram showing a third embodiment according to the present invention.
【図5】本発明による第4の実施例を示す図。FIG. 5 is a diagram showing a fourth embodiment according to the present invention.
【図6】表示原理を示す図。 FIG. 6 is a diagram showing a display principle.
【図7】実施例で用いた試料において得られるヒステリ
シス特性を示す図。FIG. 7 is a diagram showing hysteresis characteristics obtained in a sample used in an example.
【図8】従来の駆動方法を示す図。FIG. 8 is a diagram showing a conventional driving method.
Claims (2)
る基板との間に液晶層が挟持されてなり、前記液晶層は
反強誘電相の配向状態と強誘電相の配向状態を有してな
る液晶電気光学素子の駆動方法において、 選択期間内に前記液晶層のいずれかの配向状態を選択す
るための電圧を前記液晶層に印加する工程と、 非選択期間に前記選択した配向状態を維持するための電
圧を前記液晶層に印加する工程と、 を有し、 前記選択期間内に前記液晶層を前記反強誘電相の配向状
態に選択する際に前記液晶層に印加される電圧は、その
極性が互いに異なる2レベルの電圧を含み、各電圧レベ
ルの絶対値が前記反強誘電相から強誘電相へ相転移させ
るときのしきい値電圧の絶対値以下に設定されているこ
とを特徴とする液晶電気光学素子の駆動方法。A liquid crystal layer is sandwiched between a substrate having a scanning electrode and a substrate having a signal electrode, wherein the liquid crystal layer has an orientation state of an antiferroelectric phase and an orientation state of a ferroelectric phase. Applying a voltage to the liquid crystal layer for selecting one of the alignment states of the liquid crystal layer during a selection period, and maintaining the selected alignment state during a non-selection period. Applying a voltage to the liquid crystal layer to perform the operation, the voltage applied to the liquid crystal layer when the liquid crystal layer is selected to be in the antiferroelectric phase alignment state during the selection period, It includes two levels of voltages whose polarities are different from each other, and the absolute value of each voltage level is set to be equal to or less than the absolute value of the threshold voltage when the phase transition from the antiferroelectric phase to the ferroelectric phase is performed. Method for driving a liquid crystal electro-optical element.
に選択する際に前記液晶層に印加される電圧は、その極
性が互いに異なる2レベルの電圧を含み、先に前記液晶
層に印加される電圧の絶対値は前記反強誘電相から強誘
電相へ相転移させるときの飽和値電圧の絶対値以上に設
定され、後に前記液晶層に印加される電圧の絶対値は前
記強誘電相から反強誘電相へ相転移させるときのしきい
値電圧の絶対値以上に設定されていることを特徴とする
液晶電気光学素子の駆動方法。2. The two-level voltage according to claim 1, wherein the voltage applied to the liquid crystal layer when the liquid crystal layer is selected to be in the ferroelectric phase alignment state during the selection period is different in polarity. The absolute value of the voltage previously applied to the liquid crystal layer is set to be equal to or greater than the absolute value of the saturation voltage when the phase transition from the antiferroelectric phase to the ferroelectric phase is performed, and the absolute value of the voltage applied later to the liquid crystal layer is set. the driving method of the liquid crystal electro-optical element is the absolute value of that voltage, characterized in that it is set to more than the absolute value of the threshold voltage at which to phase transition to an antiferroelectric phase from the ferroelectric phase.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07923991A JP3149451B2 (en) | 1991-04-11 | 1991-04-11 | Driving method of liquid crystal electro-optical element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07923991A JP3149451B2 (en) | 1991-04-11 | 1991-04-11 | Driving method of liquid crystal electro-optical element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04311922A JPH04311922A (en) | 1992-11-04 |
| JP3149451B2 true JP3149451B2 (en) | 2001-03-26 |
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ID=13684314
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| JP07923991A Expired - Fee Related JP3149451B2 (en) | 1991-04-11 | 1991-04-11 | Driving method of liquid crystal electro-optical element |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5886755A (en) * | 1995-09-18 | 1999-03-23 | Citizen Watch Co., Ltd. | Liquid crystal display device |
| EP0992835B1 (en) | 1998-03-10 | 2005-01-12 | Citizen Watch Co. Ltd. | Antiferroelectric liquid crystal display and method of driving |
| JP4524867B2 (en) * | 2000-06-16 | 2010-08-18 | ソニー株式会社 | Driving method of liquid crystal display element |
| US7560299B2 (en) * | 2004-08-27 | 2009-07-14 | Idc, Llc | Systems and methods of actuating MEMS display elements |
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1991
- 1991-04-11 JP JP07923991A patent/JP3149451B2/en not_active Expired - Fee Related
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