JP3170259B2 - Semiconductor device manufacturing method and semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device having a capacity of 4 Mbit or more.
The present invention relates to a semiconductor device manufacturing method and a semiconductor device which are optimally used for a RAM or the like and can mount a large semiconductor chip in a small semiconductor package.

[0002]

2. Description of the Related Art Conventionally, the above-described large semiconductor chip is mounted on a small semiconductor package, for example, as described in Nikkei Microdevice, May 1988, No. 54.
From page 57 to page 57, "Hidden Ball, Lead Frame for Putting Large Chip in 300 Mills" has been proposed in which the die pad of the lead frame is eliminated and this inner frame is routed above or below the semiconductor chip. I have.

[0003] As shown in FIGS. 3 and 4, an insulating tape 2 such as a polyimide tape is pasted on the upper surface of a semiconductor chip 1, and inner leads 3 a of some leads 3 are mounted on the upper surface of the insulating tape 2. After the electrodes 1a of the semiconductor chip 1 are electrically connected to the tips of the inner leads 3a with the bonding wires 4, the outer leads 3b are exposed to the outside and sealed with a sealing resin 5. The semiconductor device is configured by stopping and performing post-processes.

Here, the bonding of the bonding wires 4 to the tips of the inner leads 3a located on the insulating tape 2 is performed on the insulating tape 2 using the semiconductor chip 1 as a base.

[0005]

However, since the bonding of the bonding wires to the inner leads is performed on the insulating tape as the buffer member as described above, the ultrasonic waves and the load are sufficiently transmitted during the bonding. Instead, the bonding of the bonding wires here may be difficult and unstable.

Further, when foreign matter such as silicon is adhered on the semiconductor chip and wire bonding to the inner lead is performed on the foreign matter, the buffer is not sufficiently performed by the insulating tape, and the semiconductor chip as a base is not formed. It may be damaged, and it is not preferable to perform wire bonding to the inner leads on the semiconductor chip in order to obtain reliability as a semiconductor device.

Further, as shown in FIGS. 3 and 4, the inner lead sometimes includes a part of a lead that is considerably shorter than the other leads. It is considered that there is a problem that the pull-out strength of the lead is deteriorated.

SUMMARY OF THE INVENTION In view of the above problems, the present invention allows a large semiconductor chip to be mounted on a small semiconductor package, eliminates wire bonding to the inner leads on the semiconductor chip, and reduces the length of the inner leads. The purpose is to provide something that can be taken sufficiently.

[0009]

In order to achieve the above object, the present invention relates to a method of manufacturing a semiconductor device, comprising the steps of: forming an insulating tape on which wiring has been applied, by setting the outer edge of the insulating tape to the outer edge of the upper surface of the semiconductor chip; Placing the semiconductor chip away from the upper surface of the semiconductor chip so as to fit inside the semiconductor chip,
Bonding one end of the wiring of the insulating tape to the tip of the inner lead of the lead; bonding the other end of the wiring of the insulating tape to an electrode of the semiconductor chip; A method of manufacturing a semiconductor device, comprising a step of resin-sealing a periphery of a tape and the inner leads, and a space between the insulating tape and the semiconductor chip with a sealing resin. Further, the present invention is a semiconductor chip having electrodes, and an insulating tape that is disposed on the semiconductor chip via a resin and is provided with wiring, wherein the insulating tape is viewed from the upper surface side of the semiconductor chip. An insulating tape disposed so that an outer edge thereof fits inside the outer edge of the upper surface of the semiconductor chip; and a lead having at least an inner lead disposed on the insulating tape; one end of the wiring of the insulating tape and the lead And a tip of the inner lead is electrically connected, and the other end of the wiring of the insulating tape is electrically connected to an electrode of the semiconductor chip. .

According to the present invention constructed as described above, the tip of each inner lead and each electrode of the semiconductor chip are connected via the wiring provided on the insulating tape. By bonding one end of the wiring and then bonding the other end of the wiring to the electrode of the semiconductor chip, wire bonding on the semiconductor chip can be eliminated.

[0011] Further, by extending the above-mentioned wiring into the inside of the insulating tape and lengthening the inner lead, it is possible to improve the moisture resistance and pull-out strength of the lead.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

For example, a DR having a capacity of 4 Mbit or more
An insulating tape 2 such as a polyimide tape is adhered to the upper surface of the semiconductor chip 1 as an AM in a state where the electrodes 1a provided on both side edges are exposed.

The surface of the insulating tape 2 is provided with a plurality of wirings 6 which are bent in the shape of a hook and extend in the width direction, the ends of which protrude to the side of the insulating tape 2. 6 is bent downward so that the lower surface of the protruding end is located below a plane formed by the back surface of the insulating tape 2.

The base end of each wiring 6 is connected via a bump 7 to the tip of an inner lead 3a of a linear lead 3 arranged on the upper surface of the insulating tape 2, and the protruding end is connected to this end. The provided projection 6a and the bump 8 are provided.
Are connected to the respective electrodes 1a of the semiconductor chip 1 via the wirings 6, whereby the respective electrodes 1a of the semiconductor chip 1 and the tips of the inner leads 3a of the leads 3 are electrically connected via the respective wires 6. The inner leads 3a and the wirings 6 do not overlap each other.

Further, the lead 3 is provided with a stepped portion 3c which is continuous on both side surfaces and a lower surface thereof, thereby making the inner lead 3a from the stepped portion 3c to the tip end thinner than the outer lead 3b. It is designed to improve moisture resistance and lead pull-out strength.

Then, in a state where the outer leads 3b are exposed to the outside, the semiconductor device is sealed with a sealing resin 5 to form a semiconductor device.

The connection between the end of each inner lead 3a and each electrode 1a of the semiconductor chip 1 by the wiring 6 provided on the insulating tape 2 is performed as follows.

That is, first, the inner lead 3a and one end of the wiring 6 of the insulating tape 2 are joined via the bump 7, and thereafter, the other end of the wiring 6 and the electrode 1a of the semiconductor chip 1 are connected.
And are joined. This eliminates wire bonding on the semiconductor chip 1 and prevents damage to the semiconductor chip due to bonding.

Further, the distance L from the mold outer frame to the junction between the inner lead 3a and the wiring 6 is increased by making the inner lead 3a enter the inside of the upper surface of the semiconductor chip 1, thereby increasing the moisture resistance. At the same time, the lead pull-out strength can be improved.

[0021]

Since the present invention has the above configuration,
A large semiconductor chip can be mounted on a small semiconductor package, and the tip of each inner lead and each electrode of the semiconductor chip are connected via wiring provided on an insulating tape. Since one end of the wiring of the insulating tape can be joined, and then the other end of the wiring and the electrode of the semiconductor chip can be joined, thereby eliminating wire bonding on the semiconductor chip, It is possible to prevent poor bonding of the inner leads and damage to the semiconductor chip during bonding.

Further, the wiring provided on the insulating tape can be inserted into the inside of the insulating tape to lengthen the inner lead, whereby the moisture resistance and the pull-out strength of the lead can be improved. is there.

[Brief description of the drawings]

FIG. 1 is a plan view showing a state in which a semiconductor chip and an inner lead are connected according to an embodiment of the present invention.

FIG. 2 is an enlarged sectional view of a main part after resin sealing.

FIG. 3 is a partially cutaway perspective view showing a conventional example.

FIG. 4 is a plan view of the same.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 1a Same electrode 2 Insulating tape 3 Lead 3a Inner lead 3b Outer lead 5 Sealing resin 6 Wiring

Claims (2)

(57) [Claims] 1. An insulating tape on which wiring is applied is viewed from the upper surface of the semiconductor chip in such a state that the outer edge of the insulating tape fits inside the outer edge of the upper surface of the semiconductor chip when viewed from the upper surface side of the semiconductor chip. Arranging the wires separated from each other; bonding one end of the wiring of the insulating tape to a tip of an inner lead of a lead; bonding the other end of the wiring of the insulating tape to an electrode of the semiconductor chip. A step of resin-sealing the periphery of the semiconductor chip, the insulating tape and the inner lead, and the space between the insulating tape and the semiconductor chip with a sealing resin. Device manufacturing method. 2. A semiconductor chip having electrodes, and an insulating tape disposed on the semiconductor chip via a resin and provided with wiring, the outer edge of the insulating tape being viewed from the upper surface side of the semiconductor chip. An insulating tape disposed so as to fit inside the outer edge of the upper surface of the semiconductor chip, and a lead having at least an inner lead disposed on the insulating tape, and one end of the wiring of the insulating tape and the lead. While the tip of the inner lead is electrically connected,
A semiconductor device, wherein the other end of the wiring of the insulating tape and an electrode of the semiconductor chip are electrically connected.