JP3399583B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP3399583B2 JP3399583B2 JP10518593A JP10518593A JP3399583B2 JP 3399583 B2 JP3399583 B2 JP 3399583B2 JP 10518593 A JP10518593 A JP 10518593A JP 10518593 A JP10518593 A JP 10518593A JP 3399583 B2 JP3399583 B2 JP 3399583B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- sio
- manufacturing
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は半導体装置の製造方法に
関し、特に配線として銅（Ｃｕ）を用いた半導体装置の
製造方法に関するものである。
【０００２】
【従来の技術】近年、半導体装置の配線としてＣｕ膜が
注目されている。特に多層配線の半導体装置の配線材と
してＣｕが使用される。
【０００３】上記の、配線材としてＣｕを用いた多層構
造の半導体装置は、例えば図５に示すように、半導体基
板１上に開口部２を有する絶縁膜としてのＳiＯ2膜３を
ＣＶＤ法等により形成し、続いて配線材としてのＣｕ膜
４をスパッタリング法などにより堆積させた後、Ｃｕ膜
４上に層間絶縁膜としてのＳiＯ2膜７をＣＶＤ法等によ
り形成し、更にその上にＣｕ膜、ＳiＯ2膜の形成を繰り
返すことにより製造している。
【０００４】しかしながら、実際には図６に示すよう
に、ＳiＯ2膜７の形成前に、Ｃｕ膜４の表面が外気に触
れて酸化されることによりＣｕ酸化膜５が自然生成する
ため、図７に示すように、Ｃｕ酸化膜５がＳiＯ2膜７と
Ｃｕ膜４との間に介在するようになることから、その後
に形成されるＳiＯ2膜７とＣｕ膜４との接着性能が悪化
し、ＳiＯ2膜７が基板１から剥離し易いという問題点が
あった。
【０００５】そこで、Ｃｕ膜４の表面に自然生成したＣ
ｕ酸化膜５を、ＳiＯ2膜７の形成前にエッチング法によ
り取り除く、或いはＣｕ酸化膜５が自然生成しないよう
にＣｕ膜及びＳiＯ2膜の成膜をロードロックを経由して
行う等の製造方法が取られてきた。
【０００６】
【発明が解決しようとする課題】しかしながら、上述の
エッチング法によりＣｕ酸化膜５を除去する方法は、工
程が煩雑であり、またＣｕ膜５及びＳiＯ2膜７の形成を
ロードロックを経由して行うことによりＣｕ酸化膜５を
自然生成させないようにする方法は、製造装置が複雑に
なるという問題点があった。
【０００７】このような従来技術の問題点に鑑み、本発
明の主な目的は、製造工程が煩雑化することのない、ま
た製造装置が複雑化することのないＣｕ配線を用いた半
導体装置の製造方法を提供することにある。
【０００８】
【課題を解決するための手段】上述した目的は本発明に
よれば、半導体基板上に配線としてのＣｕ膜を形成する
過程と、前記Ｃｕ膜上に層間絶縁膜としての酸化シリコ
ン（ＳiＯ2）膜を形成する過程とを有する半導体装置の
製造方法に於いて、前記Ｃｕ膜を形成した後に、ＣＶＤ
装置を用いて、前記Ｃｕ膜に水素（Ｈ2）ガス及び所定
のエネルギーを供給することにより、前記Ｃｕ膜の表面
に生成した自然酸化膜を還元する過程と、前記還元過程
に連続して、前記ＣＶＤ装置にて、前記Ｃｕ膜の表面に
酸化シリコン（ＳiＯ2）膜を形成する過程とからなるこ
とを特徴とする半導体装置の製造方法を提供することに
より達成される。
【０００９】
【作用】このようにすれば、Ｃｕ膜の表面上に形成され
たＣｕ酸化膜の除去を、ＳiＯ2の成膜するチャンバと同
じチャンバ内で行うことができる。
【００１０】
【実施例】以下に、本発明の好適実施例を添付の図面に
ついて詳しく説明する。
【００１１】図１〜図４は、本発明が適用された一実施
例である半導体装置の製造方法を工程順に示す部分断面
図である。
【００１２】まず、図１に示すように、半導体基板１上
に開口部２を有するＳiＯ2膜３を形成し、前記開口部２
の面内及び前記ＳiＯ2膜３上に電極・配線材料としての
Ｃｕ膜４をスパッタリング法等により成膜する。
【００１３】続いて、Ｃｕ膜４が成膜された前記半導体
基板１をＣＶＤ装置の反応チャンバ内にローディングし
た後、図２に示すように、還元剤としての水素（Ｈ2）
ガスを反応チャンバ内に流通させつつ、熱あるいは光等
のエネルギーを供給することによりＣｕ膜４の表面に形
成されたＣｕ2Ｏ等のＣｕ酸化膜層５を還元して、図３
に示すように酸化前のＣｕ膜の状態に復元する。
【００１４】続いて、前記還元過程に連続して前記ＣＶ
Ｄ装置を用いて、還元されたＣｕ膜６上にＳiＯ2膜７を
成膜する。
【００１５】
【発明の効果】以上の説明により明らかなように、本発
明による半導体装置の製造方法によれば、Ｃｕ膜の表面
に自然生成してＳiＯ2膜が剥離し易くなる要因としての
Ｃｕ酸化膜を、チャンバ内で水素ガスを用いて銅に還元
することにより、また、連続して同一チャンバ内でＳi
Ｏ2膜を形成することにより、ロードロックが不要とな
るため製造装置が複雑にならず、またエッチング法を用
いないので製造工程が複雑にならない。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device using copper (Cu) as a wiring. 2. Description of the Related Art In recent years, attention has been paid to a Cu film as a wiring of a semiconductor device. In particular, Cu is used as a wiring material of a semiconductor device having a multilayer wiring. In the above-described semiconductor device having a multilayer structure using Cu as a wiring material, for example, as shown in FIG. 5, a SiO 2 film 3 as an insulating film having an opening 2 on a semiconductor substrate 1 is formed by a CVD method or the like. After depositing a Cu film 4 as a wiring material by a sputtering method or the like, an SiO 2 film 7 as an interlayer insulating film is formed on the Cu film 4 by a CVD method or the like, and further a Cu film is formed thereon. It is manufactured by repeating the formation of a film and a SiO 2 film. However, in actuality, as shown in FIG. 6, before the SiO 2 film 7 is formed, the surface of the Cu film 4 is oxidized by being exposed to outside air, so that the Cu oxide film 5 is spontaneously formed. as shown in 7, since the Cu oxide film 5 is so interposed between the SiO 2 film 7 and the Cu film 4, the adhesive performance is deteriorated with the SiO 2 film 7 and the Cu film 4 formed thereafter However, there was a problem that the SiO 2 film 7 was easily peeled from the substrate 1. Therefore, the naturally generated C on the surface of the Cu film 4
Manufacturing such as removing the u-oxide film 5 by an etching method before forming the SiO 2 film 7 or forming a Cu film and a SiO 2 film via a load lock so that the Cu oxide film 5 is not spontaneously formed. The way has been taken. However, the method of removing the Cu oxide film 5 by the above-mentioned etching method requires complicated steps, and the formation of the Cu film 5 and the SiO 2 film 7 is load-locked. The method in which the Cu oxide film 5 is not spontaneously generated by performing the process has a problem that a manufacturing apparatus becomes complicated. [0007] In view of such problems of the prior art, a main object of the present invention is to provide a semiconductor device using Cu wiring which does not complicate the manufacturing process and does not complicate the manufacturing apparatus. It is to provide a manufacturing method. According to the present invention, there is provided a semiconductor device comprising: a step of forming a Cu film as a wiring on a semiconductor substrate; and a step of forming a silicon oxide film as an interlayer insulating film on the Cu film. in the method of manufacturing a semiconductor device having a step of forming a SiO 2) film, after forming the Cu film, CVD
By supplying hydrogen (H 2 ) gas and predetermined energy to the Cu film using an apparatus, a natural oxide film formed on the surface of the Cu film is reduced, and the reduction process is continued. Forming a silicon oxide (SiO 2 ) film on the surface of the Cu film by the CVD apparatus. In this way, the removal of the Cu oxide film formed on the surface of the Cu film can be performed in the same chamber as that for forming the SiO 2 film. Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. 1 to 4 are partial sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps. First, as shown in FIG. 1, a SiO 2 film 3 having an opening 2 is formed on a semiconductor substrate 1 and the opening 2 is formed.
A Cu film 4 as an electrode / wiring material is formed by sputtering or the like on the surface of the substrate and on the SiO 2 film 3. Subsequently, after loading the semiconductor substrate 1 on which the Cu film 4 is formed into a reaction chamber of a CVD apparatus, as shown in FIG. 2, hydrogen (H 2 ) as a reducing agent is used.
By supplying energy such as heat or light while flowing the gas into the reaction chamber, the Cu oxide film layer 5 such as Cu 2 O formed on the surface of the Cu film 4 is reduced, and FIG.
As shown in (2), the state of the Cu film before oxidation is restored. Subsequently, continuously with the CV,
An SiO 2 film 7 is formed on the reduced Cu film 6 using the D apparatus. As is apparent from the above description, according to the method of manufacturing a semiconductor device according to the present invention, Cu as a factor which is likely to be spontaneously formed on the surface of the Cu film to easily peel off the SiO 2 film. By reducing the oxide film to copper using hydrogen gas in the chamber, and continuously reducing Si in the same chamber.
By forming the O 2 film, a load lock is not required, so that the manufacturing apparatus is not complicated, and the manufacturing process is not complicated because no etching method is used.
【図面の簡単な説明】
【図１】本発明が適用された半導体装置の製造方法を図
２乃至図４と共に示す縦断面図である。
【図２】本発明が適用された半導体装置の製造方法を図
１、図３及び図４と共に示す縦断面図である。
【図３】本発明が適用された半導体装置の製造方法を図
１、図２及び図４と共に示す縦断面図である。
【図４】本発明が適用された半導体装置の製造方法を図
１乃至図３と共に示す縦断面図である。
【図５】従来の半導体装置の製造方法を図６及び図７と
共に示す縦断面図である。
【図６】従来の半導体装置の製造方法を図５及び図７と
共に示す縦断面図である。
【図７】従来の半導体装置の製造方法を図６及び図７と
共に示す縦断面図である。
【符号の説明】
１ 半導体基板
２ 開口部
３ ＳiＯ2膜
４ Ｃｕ膜
５ Ｃｕ酸化膜
６ 還元後のＣｕ膜
７ ＳiＯ2膜BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a longitudinal sectional view showing a method for manufacturing a semiconductor device to which the present invention is applied, together with FIGS. FIG. 2 is a longitudinal sectional view showing a method for manufacturing a semiconductor device to which the present invention is applied, together with FIGS. 1, 3, and 4; FIG. 3 is a longitudinal sectional view showing a method for manufacturing a semiconductor device to which the present invention is applied, together with FIGS. 1, 2 and 4; FIG. 4 is a longitudinal sectional view showing a method for manufacturing a semiconductor device to which the present invention is applied, together with FIGS. 1 to 3; 5 is a longitudinal sectional view showing a conventional method for manufacturing a semiconductor device together with FIGS. 6 and 7. FIG. 6 is a longitudinal sectional view showing a conventional method for manufacturing a semiconductor device together with FIGS. 5 and 7. FIG. 7 is a longitudinal sectional view showing a conventional method for manufacturing a semiconductor device together with FIGS. 6 and 7. FIG. [Description of Symbols] 1 semiconductor substrate 2 opening 3 SiO 2 film 4 Cu film 5 Cu oxide film 6 Cu film after reduction 7 SiO 2 film
Claims (1)
形成する過程と、前記Ｃｕ膜上に層間絶縁膜としての酸
化シリコン（ＳiＯ2）膜を形成する過程とを有する半導
体装置の製造方法に於いて、 前記Ｃｕ膜を形成した後に、ＣＶＤ装置を用いて、前記
Ｃｕ膜に水素（Ｈ2）ガス及び所定のエネルギーを供給
することにより、前記Ｃｕ膜の表面に生成した自然酸化
膜を還元する過程と、 前記還元過程に連続して、前記ＣＶＤ装置にて、前記Ｃ
ｕ膜の表面に酸化シリコン（ＳiＯ2）膜を形成する過程
とからなることを特徴とする半導体装置の製造方法。(57) [Claim 1] A process of forming a Cu film as a wiring on a semiconductor substrate and a process of forming a silicon oxide (SiO 2 ) film as an interlayer insulating film on the Cu film In the method of manufacturing a semiconductor device having the following, after the formation of the Cu film, a hydrogen (H 2 ) gas and a predetermined energy are supplied to the Cu film using a CVD apparatus, so that the Cu film is formed. A step of reducing a natural oxide film formed on the surface; and a step of:
forming a silicon oxide (SiO 2 ) film on the surface of the u film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10518593A JP3399583B2 (en) | 1993-04-06 | 1993-04-06 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10518593A JP3399583B2 (en) | 1993-04-06 | 1993-04-06 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06291201A JPH06291201A (en) | 1994-10-18 |
| JP3399583B2 true JP3399583B2 (en) | 2003-04-21 |
Family
ID=14400624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10518593A Expired - Fee Related JP3399583B2 (en) | 1993-04-06 | 1993-04-06 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3399583B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3463979B2 (en) * | 1997-07-08 | 2003-11-05 | 富士通株式会社 | Method for manufacturing semiconductor device |
| US20010049181A1 (en) * | 1998-11-17 | 2001-12-06 | Sudha Rathi | Plasma treatment for cooper oxide reduction |
| US6355571B1 (en) | 1998-11-17 | 2002-03-12 | Applied Materials, Inc. | Method and apparatus for reducing copper oxidation and contamination in a semiconductor device |
| WO2016157616A1 (en) | 2015-03-27 | 2016-10-06 | 三菱電機株式会社 | Semiconductor device and method for manufacturing same |
-
1993
- 1993-04-06 JP JP10518593A patent/JP3399583B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06291201A (en) | 1994-10-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |