JPS5910064B2 - Manufacturing method of multilayer wiring structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing multilayer interconnections particularly suitable for large-scale semiconductor integrated circuits (hereinafter referred to as LSI).

In the manufacture of LSIs, demands for high density and high speed have led to multilayer wiring, and so-called multilayer wiring structures are often used.

An example of a conventional multilayer wiring structure is shown in FIG.

Figure 1 shows the case of a two-layer wiring structure, where 1 is a silicon substrate, 2 is a silicon oxide formed by thermal oxidation, and 3 is a silicon substrate.
, 6 are respective first and second wiring metal layers, LSIC! ) if aluminum is used. 4 is an interlayer insulating film for insulating the single-layer wiring aluminum layer 3 and the double-layer wiring aluminum layer 6; in the case of LSI, low-temperature silicon oxide formed by chemical vapor phase reaction is used; When the film thickness exceeds about 0.8 μm, low-temperature silicon oxide containing phosphorus may be used to prevent cracks.

5 is an opening for electrically connecting necessary parts of the single-layer wiring aluminum layer 3 and the double-layer wiring aluminum layer 6;
This is a so-called through hole.

A drawback of such a structure is that the single-layer wiring aluminum layer 3 and the double-layer wiring aluminum layer 6 in the through hole 5
electrical contact is unstable.

That is, during the formation of the two-layer wiring aluminum layer 6 after forming the through-hole 5, oxygen in the atmosphere reacts with the single-layer wiring aluminum layer 3 exposed in the through-hole 5 to form aluminum oxide (so-called alumina). ), and the contact interface T between the single-layer wiring aluminum layer 3 and the double-layer wiring aluminum layer 6 did not have a perfect ohmic contact. In order to eliminate this drawback, after forming the through hole 5, the aluminum oxide generated in the through hole 5 portion of the wiring aluminum layer 3 is removed by sputter etching or ion etching in a vacuum, and then the same vacuum chamber is used. It has been practiced to immediately form a two-layer wiring aluminum layer without breaking the vacuum inside the device.

According to this method, since the introduction of oxygen is cut off between the removal of aluminum oxide and the formation of the double-layer wiring aluminum layer, good electrical contact can be obtained without the formation of aluminum oxide. However, according to experiments conducted by the present inventors, it was found that this is not necessarily the case. That is, although the reason for this is not yet clear, it is inferred as follows, and this will be explained using FIG. 2. Second
Although the figure shows the case where the aluminum oxide 11 in the through-hole portion is removed by sputter etching, the same applies to the case of ion etching. In the case of sputter etching, etching is performed by ionizing an inert gas such as argon in a low vacuum of about 10@-2 T0rr and colliding it with the object to be etched. At this time, as shown in FIG. 2, the argon ions 8 collide with the low-temperature silicon oxide 4, so that the low-temperature silicon oxide 4 is also etched and simultaneously separated into silicon atoms 9 and oxygen atoms 10. Some of these separated oxygen atoms 10 react with the single-layer wiring aluminum layer 3 of the through hole 5 to generate aluminum oxide 11. Therefore, even if the aluminum oxide in the through hole is removed by sputter etching, it will be regenerated, making complete removal difficult and resulting in unstable electrical contact. The present invention has been made in view of the above-mentioned circumstances, and its purpose is to clean the surface of a wiring metal layer exposed by the through hole after forming a through hole in an interlayer insulating layer made of a silicon oxide layer. Provided is a method for manufacturing a multilayer wiring structure in which good electrical contact can be obtained in through holes by preventing the surface of the wiring metal layer in the through holes from being oxidized by oxygen generated when etching is performed by sputter etching or ion etching. It's about doing.

Hereinafter, the present invention will be explained in detail using the drawings. FIG. 3 is a schematic configuration diagram for explaining an embodiment of the method for manufacturing a multilayer wiring structure according to the present invention, and shows a case of two-layer wiring.

In this embodiment, a low-temperature silicon oxide layer 4 formed by a chemical vapor phase reaction or a plasma chemical vapor phase reaction is laminated on the surface of a single-layer wiring aluminum layer 3, and a plasma chemical vapor phase layer 4 is formed on the surface of the silicon oxide layer 4. A low temperature silicon nitride layer 12 formed by a gas phase reaction is laminated. Next, after opening through-holes 5 in each of these silicon layers 12 and 4, the aluminum oxide formed in the through-hole portions of the wiring aluminum layer 3 is removed by sputter etching in a vacuum. A two-layer wiring aluminum layer 6 electrically connected to the single-layer wiring aluminum layer 3 through the through hole 5 is laminated on the silicon nitride layer 12. In this case, the low-temperature silicon nitride layer 12 is formed by maintaining a mixed gas of silane gas, ammonia, and nitrogen gas at a pressure of 0.1 to 0.4 T0rr, and applying high frequency power of 400 to 600 W at a silicon substrate temperature of 200 to 300°C. It can be easily formed by causing a plasma chemical vapor phase reaction. In FIG. 3, the same or corresponding parts as in FIGS. 1 and 2 are designated by the same reference numerals. In this way, according to the method of the above embodiment,
2 consisting of a silicon oxide layer 4 and a silicon nitride layer 12
After forming the through hole 5 in the interlayer insulating layer of the layered structure, when cleaning the surface of the through hole 5 by sputter etching to remove the oxide on the surface of the wiring aluminum layer 3, the silicon nitride layer 12 is also removed. It is etched and separated, but since this decomposition product consists of silicon atoms and nitrogen atoms, the through-holes are affected by the oxygen generated when the interlayer insulating layer made of silicon oxide layer is etched, unlike in the conventional case. It has been experimentally confirmed that no aluminum oxide is formed on the wafer, and that good electrical contact can be obtained.

In the above embodiments, an example of a multilayer wiring structure of an LSI has been described, but it goes without saying that the present invention can also be applied to all other things that require multilayer wiring, such as printed circuit boards.

In addition, although the case where aluminum is used as the first and second wiring metal layers has been described, At alloy, Ti, MO, Au,
Other metals such as Cr can be similarly applied. As explained above, according to the present invention, by forming an interlayer insulating layer having a laminated structure consisting of a silicon oxide layer and a silicon nitride layer as an interlayer insulating layer between a first wiring metal layer and a second wiring metal layer, After forming a through hole in this interlayer insulating layer, the silicon oxide layer is covered with a silicon nitride layer when the surface of the first wiring metal layer exposed by the through hole is cleaned by sputter etching or ion etching. Therefore, the surface of the wiring metal layer in the through hole can be prevented from being oxidized, and therefore good electrical contact can be obtained in the through hole, which is highly effective in improving reliability. be able to.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram showing an example of a conventional multilayer wiring structure.
FIG. 2 is an explanatory diagram showing the manner in which oxygen is separated from the low-temperature silicon oxide layer during sputter etching, and FIG. 3 is a schematic configuration diagram for explaining an embodiment of the method for manufacturing a multilayer wiring structure according to the present invention. It is. 1...Silicon substrate, 2...Silicon oxide, 3...Single wiring aluminum layer, 4...
...Low temperature silicon oxide layer, 5...Through hole, 6...Two-layer wiring aluminum layer, 12.
...Low temperature silicon nitride layer.

Claims (1)

[Claims] 1. Forming a silicon oxide layer on the surface of the first wiring metal layer, laminating a silicon nitride layer on the silicon oxide layer, and forming an interlayer insulating layer using the silicon oxide layer and the silicon nitride layer; forming an opening reaching the first wiring metal layer in a part of the interlayer insulating layer; and after this step forming an opening on the silicon nitride layer to be electrically connected to the first wiring metal layer. When forming a second wiring metal layer, the surface of the first wiring metal layer exposed through the opening is cleaned by etching in a vacuum, and then a second wiring metal layer is formed in the same vacuum. 1. A method for manufacturing a multilayer wiring structure, comprising the step of forming a layer.