JP3404838B2 - GaInAs / InP heterojunction Hall element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to enhancement of the sensitivity of compound semiconductor Hall devices, especially GaInAs / InP heterojunction Hall devices.

[0002]

2. Description of the Related Art A Hall element is a kind of magnetic sensor and is widely used as a rotation and position detecting sensor. Recently, a Hall element composed of a GaInAs / InP heterojunction has been developed to meet the demand for a high-performance Hall element (for example, Shinobu Okuyama et al., Proc. No. 3 of the 53rd Autumn Meeting of the Applied Physics Society of Japan). 1992, published by Japan Society of Applied Physics, Lecture No. 16a-SZC-16,
1078). This GaInAs / InP heterojunction Hall element has a relatively small change in characteristics with temperature. It also has excellent product sensitivity. This is because the electron mobility at room temperature is extremely high (for example, Kenjiro Onuma et al., Proc. No. 1 of 53rd Autumn Meeting of the Applied Physics Society of Japan, published by the Society of Applied Physics, 1992), Lecture No. 18a-ZE-3. , 28
Page 3, or Hilde Hardtdegen et al.,
J. Cryst. Growth, 116, (199
2), page 521).

Conventionally, a heterojunction between GaInAs and InP has been formed by a vapor phase growth method such as MOCVD. This is because the semiconductor thin film containing P can be stably grown. The layers forming this heterojunction are usually deposited on the InP crystal substrate from the viewpoint of lattice matching. What is used for the substrate is a semi-insulating crystal doped with Fe or the like. First, InP on the InP crystal substrate
Layers are deposited. This is to reduce the amount of Fe impurities in the substrate that thermally diffuses into the magneto-sensitive layer. GaInAs is used for the magnetic sensitive layer.
Is used. It is a conventional general method to sequentially deposit these layers on an InP substrate to form a heterojunction.

In the GaInAs / InP Hall element, the InP layer is usually an undoped layer. This is because some resistance is required as the buffer layer. GaInA
Looking at the step of forming the s / InP heterojunction, in the conventional technique, the growth of GaInAs is not started immediately after the growth of the InP layer. This is because the source gas for growing the Group V element is switched. In MOCVD growth, it is general to use PH ₃ as a P source and AsH ₃ as an As source. When AsH ₃ flows through the system before PH ₃ is not completely removed from the reaction system, a layer having an unstable composition such as GaInAsP appears at the early stage of growth of the GaInAs layer (for example, K. Streubel et al., J. Appl. .Ph
Ys, Vol. 71, No. 7 (1992), 3300). When such a layer appears, it becomes difficult to stably maintain the lattice matching of GaInAs. In order to avoid this, the addition of PH _{3 into} the system is temporarily stopped. After a while, AsH ₃ is introduced into the system. The conventional growth technique is to provide a period during which the source gas of the group V element is not introduced into the system for a certain period of time.

PH ₃ is not added to the growth system for a certain period because of gas switching. The surface of the grown InP layer is exposed to a carrier gas such as hydrogen. Generally, the heating temperature of the InP layer is not changed when the gas is switched. This is because if the temperature is changed, it takes time to stabilize the temperature again for the growth of the GaInAs layer.
Therefore, the grown InP layer is kept at high temperature,
It will be exposed to a carrier gas such as hydrogen gas. MO
The growth temperature of the InP layer formed by the CVD method is 60 as compared with the conventional one.
It is 0-700 degreeC. Since PH ₃ is not supplied, thermal desorption of P occurs from the surface of the InP layer kept at such a high temperature. The desorption of P deteriorates the surface state of the InP layer. Also, the surface is altered. Due to this alteration, the carrier concentration distribution near the surface of the InP layer changes. The desorption of P reduces the carrier concentration near the surface of the InP layer. This is because in the III-V group compound semiconductor layer, the vacancies of the V group element act as acceptors.

Conventionally, a GaInAs layer has been deposited as a magnetosensitive layer on such an InP layer whose surface has been altered. That is,
InP in which P is thermally desorbed and the vicinity of the surface has a low carrier concentration
A magnetosensitive layer was deposited on the layer. FIG. 3 shows a carrier concentration profile obtained by such a conventional lamination method. Ga _0.47 In _0.53 As / InP hetero interface (10
9) The carrier concentration on the InP layer side sharply drops in the vicinity region. As shown in FIG. 3, even if the carrier concentration inside the InP layer is 2 × 10 ¹⁵ cm ⁻³ , the surface concentration of the InP layer may decrease to 1 × 10 ¹⁴ cm ⁻³ . I say here
The surface concentration (represented by n ₀ ) of the nP layer means the lowest carrier concentration in the InP layer existing in a region within 200 nm from the hetero interface (109). The carrier concentration (represented by n) inside the InP layer is 200 n from the hetero interface.
It means the carrier concentration in the deep portion of the InP layer that exceeds m. 200
The reason why the depth exceeds nm is that the high resistance region having a low carrier concentration due to the alteration of the surface of the InP layer grown by the conventional MOCVD method is generally recovered at this depth.

In order to obtain a magnetically sensitive layer of suitable conductivity, GaI
The nAs layer may be doped. The n may increase due to the diffusion of the dopant. On the other hand, since the degree of thermal desorption of P is not stable, the carrier concentration of the high resistance region appearing in the vicinity of the hetero interface and the width of the region are not constant. Therefore, the degree of increase in carrier concentration in the high resistance region due to the diffusion of the dopant is not uniform.

[Problems to be Solved by the Invention]

The presence of the high resistance region at the hetero interface is not preferable for the operation of the Hall element. Not only does the resistance of the device increase, but the current flows unevenly. This is because the carrier concentration of the high resistance region and the width of the high resistance region are not constant. Heat is generated when an electric current is passed through the high resistance region. The heat generation may deteriorate the sensitivity characteristics of the Hall element.

However, in the past, GaInAs / I was used.
The carrier concentration of the high resistance region, which affects the characteristics of the nP Hall element, particularly the region width, has been unclear.
Further, there is no measure to prevent the generation of the high resistance region on the InP layer side of the hetero interface. Furthermore, when a heterojunction with such an InP layer is provided, GaInAs that provides high sensitivity characteristics
The surface carrier concentration of the layer was not clear. Therefore, high room temperature mobility cannot be stably obtained, and GaInAs
/ There was a problem in increasing the sensitivity of the InP Hall element.

The object of the present invention is to clarify the carrier concentration in the high resistance region which affects the characteristics of the GaInAs / InP heterojunction Hall element, particularly the sensitivity characteristics. Based on this, it is to find a method of suppressing the generation of the high resistance region.

[0011]

The surface carrier concentration of the InP layer heterojunction with the GaInAs layer is 0.75 times or more and 1.5 times or less the carrier concentration inside the InP layer. Furthermore, the surface carrier concentration of the GaInAs layer is 5 ×
It is preferably 10 ¹⁵ cm ⁻³ or more and 5 × 10 ¹⁶ cm ⁻³ or less. Ga at the heterojunction interface with the InP layer
The carrier concentration of the InAs layer is 1 × 10 ¹⁵ cm ⁻³ or more and 5 ×
It is preferably 10 ¹⁷ cm ⁻³ or less.

The GaInAs / InP heterojunction is formed on a semi-insulating InP single crystal substrate. First, the InP layer is deposited as a buffer layer. After the deposition of the InP buffer layer, the temperature is not changed and the supply of the P source to the growth system is stopped. Temperature is In
The growth temperature of the P buffer layer is maintained.

In the MOCVD method, PH ₃ is used as a P source. The As source during the growth of GaInAs is AsH ₃ . An interval is provided when switching from PH ₃ to AsH ₃ . This is because PH ₃ is completely discharged from the system. The interval is a few seconds to a few minutes. If a long time interval is provided, the thermal desorption of P from the surface of the InP layer, which is kept at a high temperature, becomes severe and the surface state is impaired. In the conventional technique, only the carrier gas is circulated in the system during this period. As the carrier gas, hydrogen may be used as usual. In the present invention, a gas containing a group IV element or a group VI element is supplied onto the surface of the InP buffer layer together with the carrier gas during this period. Group IV element Si
Examples of the gas containing the like include SiH ₄ and Si ₂ H ₆ . H
₂ S, H ₂ Se, etc. are examples of gases containing S and Se of Group VI elements. These gases are used as so-called doping gas.

These doping gases are added to the growth system immediately before or after the supply of PH ₃ is stopped. It is more effective to supply the doping gas in advance before stopping the PH ₃ . Even if the doping gas is added at an interval after the PH ₃ is stopped, the efficiency is not good. This is because the surface state of the InP buffer layer has already deteriorated due to the desorption of P. GaI
If the nA s magnetic sensitive layer is doped, the distribution of the doping gas may be continued even after the supply of AsH ₃ is started. However, if necessary, the flow rate of the doping gas is adjusted to obtain a desired carrier concentration. If it is an undoped layer, the supply of the doping gas may be stopped in synchronization with the start of the supply of AsH ₃ .

By circulating the doping gas during the switching of the group V source gas according to the present invention, the decrease in the carrier concentration (n) on the surface of the InP buffer layer, which has been a problem in the past, can be reduced. The degree of reduction depends on the amount of doping gas added. The addition amount may be controlled by the product value of the concentration of the dopant, the flow rate of the doping gas and the flow time. As the amount of addition increases, the degree of decrease in n decreases. If the addition amount is extremely increased, n becomes high. In some cases, the carrier concentration increases in a peak shape. FIG. 4 shows an example of a peak-shaped carrier concentration profile. If there is a peak-shaped high carrier concentration region, a large number of carriers exist, so that the electron mobility decreases. This is not preferable because it hinders the high sensitivity of the Hall element.

The amount of doping gas added to the system is n
_It may be set to be 0.75 times or more of ₀ . However,
Since it is not preferable that there is a carrier concentration peak as shown in FIG. 4, it is avoided to set it to 1.5 times or more. That is, the ratio n / n ₀ must be 0.75 or more and 1.5 times or less. If this ratio is 1, then n = n ₀ . The smaller the ratio, the lower the carrier concentration near the surface. The ratio of 0.75 times or more depends on the relationship between the decrease in electron mobility and the n / n ₀ ratio. FIG. 5 shows the relationship. The surface carrier concentration is 0.
This is because if it is less than 75 times, the decrease in electron mobility becomes severe. Further, even if the n / n ₀ ratio exceeds 1.5 times, the electron mobility is drastically reduced.

A Ga _x In ₁ -x As magnetosensitive layer is grown on the InP buffer layer. Ga mixed crystal ratio x is 0.37
It is desirable that ≦ x ≦ 0.57. This is because as the mixed crystal ratio deviates from x = 0.47, which is lattice-matched to InP, that is, the degree of lattice mismatch becomes remarkable and a large amount of crystal defects are induced, resulting in deterioration of crystallinity. In addition, the electrical characteristics such as a decrease in electron mobility are also deteriorated.

The carrier concentration on the surface of the GaInAs layer is 5
× and 10 ¹⁵ cm ^-3 or more 5 × ¹⁶ cm ^-3 or less. If the surface carrier concentration is less than 5 × 10 ¹⁵ cm ^-3 , the Hall element
It becomes difficult to give good ohmic characteristics to the output electrode. When it exceeds 5 × 10 ¹⁶ cm ⁻³ , the electron mobility of the magnetosensitive layer is lowered, which hinders obtaining a high-sensitivity Hall element.

GaI at the heterojunction with the InP buffer layer
The carrier concentration of the nAs layer is 1 × 10 ¹⁵ cm ⁻³ or more and 5 × 1.
It should be 0 ¹⁷ cm ^-3 or less. N of the InP buffer layer shown in FIG.
This is because it is necessary to limit the carrier concentration of the GaInAs layer at the heterojunction in order to obtain high room temperature electron mobility due to the same relationship between / n ₀ and the obtained room temperature electron mobility.

The growth method of the InP layer and the GaInAs layer is not particularly limited. The MBE method is not limited to the MOCVD method. MO / M combining the MBE method and MOCVD method
BE is okay. In addition, the InP layer is formed by, for example,
The GaInAs layer grown by VD and containing no P is MBE
You may grow it by law. There is no problem even if the growth methods are different on both sides.

There is no particular limitation on the film thickness of the GaInAs layer. However, a mesa etching process is adopted in the actual manufacture of the mesa-type Hall element. At this time, if the thickness of the growth layer to be removed by mesa etching for insulation between elements increases, the time required for mesa etching is inevitably increased. This causes a remarkable difference in mesa shape due to the difference in crystal orientation. This eventually leads to an increase in the unbalance rate, which is one of the important characteristics of the Hall element. Therefore, good results are obtained when the total thickness of the GaInAs layer and the InP buffer layer is less than 5 μm.

GaIn using the above-mentioned heterojunction material
An As / InP heterojunction Hall element is manufactured. In manufacturing, known process processing techniques such as photolithography technique and etching technique may be used. According to the present invention, about 12,000 cm ² / V · s at room temperature, a much higher electron mobility can be stably obtained compared with the conventional 6,000 to 7,000 cm ² / V · s. .

[0023]

Function: A high electron mobility is provided by optimizing the carrier concentration at the GaInAs / InP heterojunction interface.

[0024]

EXAMPLES The present invention will be specifically described below based on examples. FIG. 1 is a schematic plan view of a GaInAs / InP heterostructure Hall element according to the present invention. FIG. 2 is a schematic sectional view taken along the broken line AA ′ of FIG. (101) is a Fe-doped semi-insulating InP single crystal used as a substrate. The plane orientation is (100). The specific resistance is about 10 ⁷ Ω ・
It was cm. The thickness of the substrate crystal was about 350 μm.

(102) is a normal pressure M on the substrate (101).
It is an undoped InP buffer layer having a film thickness of about 1000 nm grown by the OCVD method. The growth temperature was 630 ° C. PH ₃ gas diluted with 10% hydrogen was used as a P source. The flow rate of PH ₃ gas was 400 cc / min. The carrier gas was hydrogen. The flow rate of hydrogen was set to 7 l / min. C ₅ H ₅ In was used as the In source. I
The carrier concentration of the nP layer (102) was 2 × 10 ¹⁵ cm ⁻³ .

Three minutes after the growth of the InP layer (102) was completed, the supply of PH ₃ gas to the growth system was stopped. PH ₃
The supply of H ₂ S was started at the same time when the gas was stopped. H ₂ S is diluted with hydrogen gas to 5 ppm. The flow rate of H ₂ S was 25 cc / min. The flow time of H ₂ S was set to 60 seconds. During this time, the InP layer (102) is exposed to H ₂ S and hydrogen carrier gas. The temperature does not change 63
Hold at 0 ° C. The flow rate of the hydrogen carrier gas was not changed either.

After supplying H ₂ S for 60 seconds, the flow of AsH ₃ gas was started. After stabilizing at a predetermined flow rate, the supply of C ₅ H ₅ In as an In source was restarted. AsH ₃ gas (10
The flow rate of (% hydrogen dilution) was set to 200 cc / min. Ga
(CH ₃ ) ₃ Ga was used as a source. C ₅ H ₅ I
The supply ratios of n, (CH ₃ ) ₃ Ga, and AsH ₃ were set so that GaInAs with a Ga mixed crystal ratio of 0.47 was obtained.
The growth temperature was 630 ° C. An n-type Ga _0.47 In _0.53 As magnetosensitive layer (103) having a mixed crystal ratio of 0.47 was grown on the InP buffer layer (102). The film thickness was about 400 nm.
The carrier concentration was about 2 × 10 ¹⁶ cm ^-3 . FIG. 6 shows a carrier concentration profile. No high resistance layer having a carrier concentration of 1 × 10 ¹⁵ cm ⁻³ or less was found near the surface of the InP layer (102).

The wafer having such a structure was subjected to mesa processing by utilizing known photolithography technology, etching technology and the like. After that, the Au and
The Ge alloy was vacuum deposited. The electrode material was alloyed to form an ohmic electrode (104).

The surface of the elementized wafer was covered with a SiO ₂ insulating film (105) by a usual plasma CVD method. The thickness of the SiO ₂ film (105) was about 300 nm. Next, in order to separate the Hall elements individually, the SiO ₂ film (105) covering the dicing line (106) was removed with an inorganic acid. Further, in order to facilitate the dicing, the back surface of the substrate (101) is etched with a hydrochloric acid aqueous solution to obtain an initial thickness of 350 μm to about 130 μm.
The thickness is m. After backside etching, dicing was performed along the dicing line (106) to form individual chips. The chip size was 350 μm × 350 μm, which is extremely common for Hall elements.

The electrical characteristics of the manufactured Hall element were evaluated. Table 1 shows characteristic values of the case of the present invention and the conventional example in comparison. The conventional example is the above-mentioned Ga _0.47 In _0.53
In the InP layer near the hetero interface between the As layer and the InP layer,
A high resistance InP layer having a carrier concentration of 2 × 10 ¹⁴ cm ⁻³ is present. As shown in Table 1, a significant difference in electron mobility at room temperature was observed between the Hall element according to the present invention and the conventional Hall element. The magnitude of electron mobility affects the product sensitivity of the Hall element. Therefore, according to the present invention, a highly sensitive GaInAs / InP Hall element can be provided.

[0031]

[Table 1]

[0032]

EFFECT OF THE INVENTION Higher electron mobility is achieved and the sensitivity of the Hall element is improved.

[Brief description of drawings]

FIG. 1 is a schematic plan view of a Hall element according to the present invention.

FIG. 2 is a schematic cross-sectional view taken along the broken line AA ′ of the Hall element shown in FIG.

FIG. 3 is a diagram showing a carrier concentration profile of a conventional heterojunction structure.

FIG. 4 is a diagram showing another carrier concentration profile of the heterojunction structure.

FIG. 5 is a diagram showing the relationship between the carrier mobility decrease rate on the InP layer surface and the electron mobility.

FIG. 6 is a diagram showing a carrier concentration profile of a heterojunction structure according to the present invention.

[Explanation of symbols]

(101) InP single crystal substrate (102) InP buffer layer (103) Ga _0.47 In _0.53 As Magnetosensitive layer (104) Ohmic input / output electrode (105) SiO ₂ insulating film (106) Dicing line (107) InP layer Carrier concentration on surface (n) (108) Carrier concentration on deep InP layer (n ₀ ) (109) Heterojunction interface

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-5-275767 (JP, A) JP-A-5-182907 (JP, A) JP-A-6-268279 (JP, A) JP-A-7- 135357 (JP, A) Revue de Physique Appliquee, 1983, Vol. 18, pp. 757-761 Autumn 1992 Proceedings of the 53rd Annual Meeting of the Society of Applied Physics, No. 3, p. 1078 (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 43/06 G01R 33/07 H01L 21/338 H01L 29/778 H01L 29/812

Claims (3)

(57) [Claims] 1. In a Hall element using a heterojunction of GaInAs and InP, 200 n from an interface of the heterojunction of the InP layer heterojunction with the GaInAs layer.
The surface carrier concentration, which is the lowest carrier concentration in the region within m, exceeds 200 nm from the heterojunction interface.
The GaInAs / InP heterojunction Hall element is characterized in that the carrier concentration in the InP layer is 0.75 times or more and 1.5 times or less, which is the deeper carrier concentration . 2. A heterojunction with the InP layer of the GaInAs layer is formed.
The carrier concentration on the surface opposite to the eggplant surface is 5 × 10
The GaInAs / InP heterojunction Hall element according to claim 1, having a size of ¹⁵ cm ^-3 or more and 5 x 10 ¹⁶ cm ^-3 or less. 3. G at the heterojunction interface with the InP layer
3. The G according to claim 1 or 2, wherein the carrier concentration of the aInAs layer is 1 × 10 ¹⁵ cm ⁻³ or more and 5 × 10 ¹⁷ cm ⁻³ or less.
aInAs / InP heterojunction Hall element.